TEA1553T_技术文档

TEA1553T

GreenChip II SMPS control IC

Rev. 01 — 3 July 2007

Product data sheet

1. General description

The GreenChip II is the second generation of green Switched Mode Power Supply

(SMPS) controller ICs operating directly from the rectiﬁed universal mains. A high level of

integration leads to a cost effective power supply with a very low number of external

components.

The special built-in green functions allow optimum efﬁciency at all power levels. This

applies to quasi-resonant operation at high power levels, as well as ﬁxed frequency

operation with valley switching at medium power levels. At low power (standby) levels, the

system operates at reduced frequency and with valley detection.

The proprietary high voltage BCD800 process makes direct start-up possible from the

rectiﬁed universal mains voltage in an effective and green way. A second low voltage

BICMOS IC is used for accurate, high speed protection functions and control.

Highly efﬁcient, reliable supplies can easily be designed using the GreenChip II controller.

2. Features

2.1 Distinctive features

I Universal mains supply operation (70 V AC to 276 V AC)

I High level of integration, giving a very low external component count

2.2 Green features

I Valley/zero voltage switching for minimum switching losses

I Frequency reduction at low power standby for improved system efﬁciency (< 1 W)

I On-chip start-up current source

I Efﬁcient quasi-resonant operation at high power levels

I Cycle skipping mode at very low loads; input power < 300 mW at no-load operation for

a typical adapter application

I Standby indication pin to indicate low output power consumption

2.3 Protection features

I Safe restart mode for system fault conditions

I Continuous mode protection by means of demagnetization detection (zero switch-on

current)

I Accurate and adjustable versatile Overvoltage Protection (OVP) (latched)

I Short winding protection

I Undervoltage protection (foldback during overload)

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

I Overtemperature Protection (OTP) (latched)

I Low and adjustable Overcurrent Protection (OCP) trip level

I General purpose LOCK input for external protection

I Mains voltage-dependent operation-enabling level

I Soft (re)start

I Advanced Overpower Protection (OPP) functions

3. Applications

Besides typical application areas, i.e. adapters and chargers, the device can be used in all

applications that demand an efﬁcient and cost effective solution up to 250 W.

4. Ordering information

Table 1.

Ordering information

Type number

Package

Name

Description

Version

TEA1553T

SO16

plastic small outline package; 16 leads; body width 3.9 mm

SOT109-1

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

2 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

5. Block diagram

TEA1553T

8

DRAIN

V

9

CC

SUPPLY

START UP

MANAGEMENT

CURRENT SOURCE

START

UVLO

INTERNAL

SUPPLY

VALLEY

6, 7 HVS

16 DEM

CLAMP

V

mains(oper)(en)

VOLTAGE

CONTROLLED

OSCILLATORS

S1

GND 11

LOGIC

+

80 mV

OVERVOLTAGE

PROTECTION

STDBY

4

1

FREQUENCY

CONTROL

300 Ω

2

OVPFCAP

UP/DOWN

COUNTERS

I

VCOADJ

5.6 V

VCOADJ

DRIVER

5

DRIVER

LOGIC

I

startup(soft)

prot(CTRL)

LEB

POWER-ON

RESET

0.5 V

S

R

Q

CTRL 14

S2

−1

BLANK

UVLO

+

MAXIMUM

ON-TIME

0.88 V

PROTECTION

OVERPOWER

PROTECTION

ISENSE

3

MINIMUM FREQ.

ENABLING AND

TIMING

I

AOP

300 Ω

ADVANCED

OVERPOWER

PROTECTION

CSTART 15

ENABLE/DISABLE

5.6 V

0.5 V

S3

LOCK

DETECT

12 VCC5V

300 Ω

LOCK 13

S

Q

5 V/1 mA

(MAX)

5.6 V

2.5 V

R

VCC

< 4.5 V

OVERTEMPERATURE

PROTECTION

014aaa004

Fig 1. Block diagram of TEA1553T

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

3 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

6. Pinning information

6.1 Pinning

VCO ADJ

OVPFCAP

ISENSE

STDBY

DRIVER

HVS

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

DEM

CSTART

CTRL

LOCK

VCC5V

TEA1553T

GND

n.c.

HVS

VCC

DRAIN

014aaa000

Fig 2. Pin conﬁguration for TEA1553T

6.2 Pin description

Table 2.

Pin description

Symbol

VCOADJ

OVPFCAP

ISENSE

STDBY

DRIVER

HVS

1

Description

Voltage Controlled Oscillator (VCO) adjustment input

OVP ﬁlter timing capacitor

2

3

programmable current sense input

standby control output

4

5

gate driver output

6

high voltage safety spacer, not connected

HVS

7

DRAIN

8

drain of external MOS switch, input for start-up current and valley

sensing

V_CC

9

supply voltage

n.c.

10

11

12

13

14

15

16

not connected

GND

ground

VCC5V

LOCK

CTRL

CSTART

DEM

5 V output

LOCK input (“general purpose input for switching off the IC”).

control input

IPEAK reduction timing capacitor

input from auxiliary winding for demagnetization timing, OVP and

OPP

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

4 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

7. Functional description

The TEA1553T is a controller for a compact ﬂyback converter, with the IC situated on the

primary side. An auxiliary winding of the transformer provides demagnetization detection

and powers the IC after start-up.

V MAINS

OUTPUT

TEA1553T

9

8

7

VCC

DRAIN

HVS

10 n.c.

11

GND

HVS

6

5

POWER

MOSFET

12

VCC5V

DRIVER

STDBY

13

14

15

16

LOCK

4

3

CTRL

ISENSE

2

1

R

CSTART

OVPFCAP

VCOADJ

SENSE

DEM

R

DEM

014aaa001

(1) If a 600 V MOSFET is used, the DRAIN connection can be made directly to the Vin; a

center-tap from the transformer is not necessary.

Fig 3. Basic application

The TEA1553T operates in multi modes, see Figure 4.

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

5 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

f

VCO

FIXED

quasi-resonant

125 kHz

25 kHz

POWER

014aaa002

Fig 4. Multi mode operation

The next converter stroke is started only after demagnetization of the transformer current

(zero current switching), while the drain voltage has reached the lowest voltage to prevent

switching losses (green function). The primary resonant circuit of primary inductance and

drain capacitor ensures this quasi-resonant operation. The design can be optimized in

such a way that zero voltage switching can be achieved over almost the whole of the

universal mains range.

To prevent very high frequency operation at lower loads, the quasi-resonant operation

changes smoothly in ﬁxed frequency Pulse Width Modulation (PWM) control.

At low power levels, the frequency is controlled via the Voltage Controlled Oscillator

(VCO), down to a minimum of about 25 kHz.

At very low power levels (standby), a cycle skipping mode will be activated.

7.1 Start-up, mains enabling operation level and undervoltage lock-out

Initially, the IC is self-supplying from the rectiﬁed mains voltage via pin DRAIN. Supply

capacitor C_VCCis charged by the internal start-up current source to a level of about 4 V or

higher, depending on the drain voltage. Once the drain voltage exceeds V_{mains(oper)(en)}

(mains-dependent operation-enabling voltage), the start-up current source will continue

charging capacitor C_VCC(switch S1 will be opened); see Figure 1. The IC will activate the

power converter as soon as the voltage on pin V_CCpasses the V_startuplevel. The IC supply

is taken over by the auxiliary winding as soon as the output voltage reaches its intended

level and the IC supply from the mains voltage is subsequently stopped for high efﬁciency

operation (green function).

The moment the voltage on pin V_CCdrops below the V_th(UVLO)(undervoltage lock-out)

level, the IC stops switching and enters a safe restart from the rectiﬁed mains voltage.

Inhibiting the auxiliary supply by external means causes the converter to operate in a

stable, well deﬁned burst mode. (See Figure 14 and Figure 15).

7.2 Supply management

All (internal) reference voltages are derived from a temperature compensated, on-chip

band gap circuit.

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

6 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

7.3 Current mode control

Current mode control is used for its good line regulation behavior.

The on-time, is controlled by the internally inverted control pin voltage, which is compared

with the primary current information. The primary current is sensed across an external

resistor. The driver output is latched in the logic, preventing multiple switch-on.

The internal control voltage is inversely proportional to the external control pin voltage,

with an offset of 1.5 V. This means that a voltage range from 1 to 1.5 V on pin CTRL will

result in an internal control voltage range from 0.5 V to 0 V (a high external control voltage

results in a small duty cycle).

7.4 Oscillator

The maximum ﬁxed frequency of the oscillator is set by an internal current source and

capacitor. The maximum frequency is reduced once the control voltage enters the VCO

control window. It then changes linearly with the control voltage until the minimum

frequency is reached (see Figure 5 and Figure 6).

V

sense(max)

0.52 V

1 V

1.5 V

V

CTRL

(TYP)

014aaa003

Fig 5. The V_sense(max)voltage as a function of V_CTRL

f

125 kHz

25 kHz

VCO

V

2

1

sense(max)

LEVEL

014aaa005

Fig 6. The VCO frequency as a function of V_{sense (max)}

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

7 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

7.5 VCO adjust

The VCOADJ pin can be used to set the VCO operation point. As soon as the peak

voltage on the sense resistor is controlled below half the voltage on the VCOADJ pin

(VCO₁level), frequency reduction will start. (The actual peak voltage on R_sensewill be

somewhat higher due to switch-off delay, see Figure 8.) The frequency reduction will stop

about 50 mV lower (VCO₂level), when the minimum frequency is reached.

A current of typically 10 µA ﬂows out of the VCOADJ pin, enabling the VCO operation

point to be set with a single resistor. When a more low-ohmic connection is desired (e.g.

due to noise), a voltage divider can be made from the VCC5V pin (see Figure 7).

CURRENT COMPARATOR

1.5 V − V

CTRL

VCC5V

DRIVER

ISENSE

DRIVER

× 2

Vx

5 V

V

OSCILLATOR

VCOADJ

I

014aaa006

Fig 7. Implementation of STDBY and cycle skipping functionality

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

8 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

f

(kHz)

max

s

f

dV

4

dV

3

f

min

dV

1

2

Vx (V)

VCOADJ

STDBY (V)

5

Vx (V)

0

CYCLE SKIPPING

“1”

“0”

Vx (V)

014aaa007

(1) The voltage levels dV₁, dV₂, dV₃and dV₄are ﬁxed in the IC to 50 mV (typ.), 18 mV (typ.),

40 mV (typ.) and 15 mV (typ.) respectively. The level at which the VCO mode of operation

starts/ends can be externally controlled with the VCOADJ pin.

Fig 8. Signal diagram for STDBY and cycle skipping functionality

7.6 Cycle skipping

At very low power levels, a cycle skipping mode will be activated. A high control voltage

will reduce the switching frequency to a minimum of 25 kHz. If the voltage on the control

pin is raised even more, switch-on of the external power MOSFET will be inhibited until the

voltage on the control pin has dropped to a lower value again (see Figure 8).

For system accuracy, the absolute voltage on the control pin is not used to trigger the

cycle skipping mode. Instead, a signal derived from the internal VCO will be used.

If the no-load requirement of the system is such that the output voltage can be regulated

to its intended level at a switching frequency of 25 kHz or above, the cycle skipping mode

will not be activated.

7.7 STDBY output

The STDBY output pin can be used to drive an external NPN or FET, V_STDBY= 5 V, in

order to switch off a Power Factor Correction (PFC) circuit. The STDBY output is activated

by the internal VCO: as soon as the VCO has reduced the switching frequency to almost

the minimum frequency of 25 kHz, the STDBY output will be activated (see Figure 8). The

STDBY output will go low again as soon as the VCO allows a switching frequency close to

the maximum frequency of 125 kHz.

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

9 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

7.8 Demagnetization

The system will be in discontinuous conduction mode all the time. The oscillator will not

start a new primary stroke until the secondary stroke has ended.

Demagnetization features a cycle-by-cycle output short-circuit protection by immediately

lowering the frequency (longer off-time), thereby reducing the power level.

Demagnetization recognition is suppressed during the ﬁrst t_{sup(xfmr_ring)}time. This

suppression may be necessary in applications where the transformer has a large leakage

inductance and at low output voltages/start-up.

7.9 Overvoltage protection

An OVP mode is implemented in the GreenChip series. For the TEA1553T, this works by

sensing the auxiliary voltage via the current ﬂowing into pin DEM during the secondary

stroke. The auxiliary winding voltage is a well-deﬁned replica of the output voltage. Any

voltage spikes are averaged by an internal ﬁlter.

Pin OVPFCAP is used to program the OVP function as follows:

1. Pin grounded: OVP is disabled.

2. Pin at 5 V (e.g. connected to pin 12, the VCC5V pin): the internal OVP circuit is

enabled.

3. A capacitor is connected from the pin to the ground: this capacitor is used to set the

number of OVP events that can occur before the logic determines that an actual OVP

condition exists. The minimum timing is the internal OVP timing.

In the last case, the number of OVP events can be set by an external capacitor connected

to pin OVPFCAP:

I_ch(OVPFCAP)× t_p(OVPFCAP)

C_OVP= n ×

---------------------------------------------------------------------

V_OVPFCAP

Where n is the number of OVP counts which are allowed to occur before an actual OVP

state is detected.

If the output voltage exceeds the OVP trip level, an internal counter starts counting

subsequent OVP events. The counter has been added to prevent incorrect OVP

detections which could occur during ESD / lightning events.

If the output voltage exceeds the OVP trip level a few times, and then does not exceed it in

the next cycle, the internal counter will count down twice as fast as it counted up.

However, when typically 10 cycles of subsequent OVP events are detected, the IC

assumes a true OVP state exists and the OVP circuit switches the MOSFET off. Next, the

controller waits until the V_th(UVLO)level is reached on pin V_CC, and then capacitor C_VCCis

recharged to the V_startuplevel.

Operation only recommences when the V_CCvoltage drops below a level of about 4.5 V, in

practice this only occurs when the mains input voltage has been disconnected for a short

period of time

The output voltage at which the OVP function trips, V_{trip(OVPFCAP)}, can be set by the

demagnetization resistor, R_DEM

:

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

10 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

N_S

V_{trip(OVPFCAP)}

=

× (I_ovp× R_DEM+ V_CL(pos))

-----------

N_aux

Where N_sis the number of secondary turns and N_auxis the number of auxiliary turns of

the transformer.

Current I_ovpis internally trimmed.

The value of the demagnetization resistor, R_DEM, can be adjusted to the turns ratio of the

transformer, thus making an accurate OVP possible.

7.10 Valley switching

(See Figure 9.) A new cycle starts when the power switch is switched on. After the

‘on-time’ (which is determined by the ‘sense’ voltage and the internal control voltage), the

switch is opened and the secondary stroke starts. After the secondary stroke, the drain

1

voltage shows an oscillation with a frequency of approximately

-----------------------------------------------------

(2 × π × (L_p× C_d) )

where L_pis the primary self inductance of the transformer and C_dis the capacitance on

the drain node.

As soon as the oscillator voltage is high again and the secondary stroke has ended, the

circuit waits for the lowest drain voltage before starting a new primary stroke. This method

is called valley detection. Figure 9 shows the drain voltage together with the valley signal,

the signal indicating the secondary stroke and the oscillator signal.

In an optimum design, the reﬂected secondary voltage on the primary side will force the

drain voltage to zero. Thus, zero voltage switching is possible, preventing large capacitive

1

losses P = × C × V²× f , and allowing high frequency operation, which results in small

--

2

and cost effective inductors.

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

11 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

primary

stroke

secondary

stroke

secondary

ringing

drain

valley

secondary

stroke

(2)

(1)

oscillator

014aaa027

(1) Start of new cycle at lowest drain voltage.

(2) Start of new cycle in a classical PWM system at high drain voltage.

Fig 9. Signals for valley switching

7.11 Overcurrent protection

The cycle-by-cycle peak drain current limit circuit uses the external source resistor to

measure the current accurately. This allows optimum size of the transformer core to be

determined (cost issue). The circuit is activated after the leading edge blanking time, t_leb

The OCP protection circuit limits the ‘sense’ voltage to an internal level.

.

7.12 Overpower protection

During the primary stroke, the rectiﬁed mains input voltage is measured by sensing the

current drawn from pin DEM. This current is dependent on the mains voltage, according to

the following formula:

V_auxN × V_mains

I_DEM

≈

-------------- --------------------------

R_DEM

N_aux

Where: N =

-----------

N _p

The current information is used to adjust the peak drain current, which is measured via pin

ISENSE. The internal compensation is such that a maximum output power can be

achieved that is almost mains independent.

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

12 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

The OPP curve is given in Figure 10.

V

sense(max)

0.52 V

(TYP)

0.30 V

(TYP)

−500 µA

I

−120 µA

DEM

(TYP)

014aaa009

Fig 10. OPP correction curve

7.13 Advanced overpower timing via pin CSTART

Overload conditions might lower the switching frequency below 20 kHz, since

demagnetization prevents next cycle occurrence before the transformer current reaches

zero (demagnetization protection). To prevent audible noise, an extra timer of typically

25 kHz is added. When the timer is activated (the frequency is typically below 25 kHz), a

current (I_AOP) of approximately 10 µA is injected into the external soft-start resistor and

capacitor. The current that is being injected is dependent on the V_SENSEvoltage and the

duty cycle, see also Figure 11 and Figure 12.

I

AOP

(µA)

10

7.5

δ ~ 50%

δ ~ 0%

5

0.5

V

SENSE(V)

014aaa010

Fig 11. I_AOPas a function of V_SENSE

The current injection results in a decrease of the primary peak current and a higher

frequency. The injection is only possible when the voltage on the control pin is below 0.5 V

and the CSTART voltage is above 2.5 V. The current injection is disabled when

V_CTRL> 0.5 V (that is, in normal operation and also in frequency reduction mode), during

start-up (CSTART timing) and when V_SENSE> 0.5 V.

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

13 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

I

AOP

0.5 V

F

AOP

DRIVER

ISENSE

R

SS

100 kΩ

C

SS

R

sense

V

OCP

GATE (δ)

014aaa011

Fig 12. Advanced overpower current injection

The charging current, I_opp(adv), will ﬂow as long as the voltage on pin ISENSE is below

approximately 0.5 V. If it exceeds this value, the current source will start to limit the current

I_opp(adv)

.

7.14 Minimum and maximum ‘on-time’

The minimum ‘on-time’ of the SMPS is determined by the Leading Edge Blanking (LEB)

time. The IC limits the maximum ‘on-time’ to 50 µs. When the system requires an ‘on-time’

longer than 50 µs, a fault condition is assumed (e.g. C_ihas been removed), the IC will stop

switching and enter the safe restart mode.

7.15 Short winding protection

After the leading edge blanking time, the short winding protection circuit is also activated.

If the ‘sense’ voltage exceeds the short winding protection voltage, V_swp, the converter will

stop switching. Once V_CCdrops below the V_th(UVLO)level, capacitor C_VCCwill be

recharged and the supply will restart again. This cycle will be repeated until the short

circuit is removed (safe restart mode).

The short winding protection will also protect in case of a secondary diode short circuit.

7.16 LOCK input

Pin 13 is a general purpose (high impedance) input pin, which can be used to switch off

the IC. As soon as the voltage on this pin is raised above 2.5 V, switching will stop

immediately. The voltage on the V_CCpin will cycle between V_startupand V_th(UVLO), but the

IC will not start switching again until the latch function is reset. The latch is reset as soon

as V_CCdrops below 4.5 V (typical value). The internal OVP and OTP will also trigger this

latch (see Figure 3).

The detection level of this input is related to the VCC5V pin voltage in the following way:

0.5 × V_VCC5V± 4 %. An internal Zener clamp of 5.6 V will protect this pin from excessive

voltages. No internal ﬁltering is done on this input.

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

14 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

7.17 Overtemperature protection

An accurate temperature protection is provided in the circuit. When the junction

temperature exceeds the thermal shutdown temperature, the IC will stop switching. When

V_CCdrops to V_th(UVLO), capacitor C_VCCwill be recharged to the V_startuplevel, however the

IC will not start switching again. Subsequently, V_CCwill drop again to the V_th(UVLO)level,

and so on.

Operation only recommences when the V_CCvoltage drops below a level of about 4.5 V, in

practice this only occurs when the mains input voltage has been disconnected for a short

period of time.

7.18 5 V output

Pin 12 can be used for the supply of external circuitry. The maximum output current must

be limited to 1 mA. If higher peak currents are required, an external RC combination

should limit the current drawn from this pin to 1 mA maximum.

The 5 V output voltage will be available as soon as the start-up voltage is reached. As the

high voltage supply cannot supply the VCC5V pin during start-up or shutdown, during

latched shutdown (via pin 13 or other latched protection such as OVP or OTP), the voltage

is switched to zero.

7.19 Open/not connected CTRL pin protection

If the CTRL pin is open/not connected, a fault condition is assumed and the converter will

stop switching. Operation will recommence as soon as the fault condition is removed.

7.20 Soft start-up (pin ISENSE)

To prevent transformer rattle during hiccup, the transformer peak current through the

sense resistor, I_DM, is slowly increased by the soft start function. This can be achieved by

inserting a resistor and a capacitor between pin ISENSE (pin 3) and the sense resistor,

R_sense. An internal current source charges the capacitor to V = I_{startup(soft)}× R_ss, with a

maximum of about 0.5 V.

The start level and the time constant of the increasing primary current level can be

adjusted externally by changing the values of R_ssand C_ss.

V_sense(max)– (I_{startup(soft)}× R_ss)

I_DM

=

---------------------------------------------------------------------------------

R_sense

τ = R_ss× C_ss

The charging current I_{startup(soft)}will ﬂow as long as the voltage on pin ISENSE is below

approximately 0.5 V. If the voltage on pin ISENSE exceeds 0.5 V, the soft start current

source will start limiting the current I_{startup(soft)}. At the V_startuplevel, the I_{startup(soft)}current

source is completely switched off (see Figure 13).

Since the soft start current I_{startup(soft)}is subtracted from pin V_CCcharging current, the R_SS

value will affect the V_CCcharging current level by a maximum of 60 µA (typical value).

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

15 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

I

startup(soft)

startup

0.5 V

DRIVER

ISENSE

R

C

SS

overcurrent

protection

voltage

R

sense

SS

014aaa012

Fig 13. Soft start-up

7.21 Driver

The driver circuit to the gate of the power MOSFET has a current sourcing capability of

typically 170 mA and a current sink capability of typically 700 mA. This permits fast

turning on and off of the power MOSFET for efﬁcient operation.

A low driver source current has been chosen to limit the ∆V/∆t at switch-on. This reduces

the Electromagnetic Interference (EMI) and also limits the current spikes across R_sense

.

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

16 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

8. Limiting values

Table 3.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are measured

with respect to ground (pin 11); positive currents ﬂow into the chip; pin V_CCmay not be current

driven. The voltage ratings are valid provided other ratings are not violated; current ratings are valid

provided the maximum power rating is not violated.

Symbol Parameter Conditions

Voltages

Min

Max

Unit

V_VCOADJvoltage on

pin VCOADJ

input voltage; continuous

−0.4

+5

+7

V

V_OVPFCAPvoltage on

continuous

OVPFCAP

V_ISENSE

V_DRAIN

V_CC

voltage on

pin ISENSE

current limited

−0.4

-

V

voltage on

pin DRAIN

+650

+20

+7

+5

+7

-

supply

voltage

continuous

V_LOCK

V_CTRL

voltage on

pin LOCK

voltage on

pin CTRL

V_CSTARTvoltage on

pin CSTART

V_DEM

voltage on

pin DEM

current limited

input current

Currents

I_ISENSE

current on

pin ISENSE

−1

−0.8

-

+10

-

mA

A

I_STDBY

I_DRIVER

I_DRAIN

current on

pin STDBY

current on

pin DRIVER

d < 10 %

+2

+5

0

current on

pin DRAIN

mA

I_O(VCC5V)output

current on

−1

pin VCC5V

I_CTRL

I_DEM

current on

pin CTRL

-

+5

mA

current on

pin DEM

−1.25

+1.25

General

P_tot

total power T_amb< 70 °C

-

0.7

W

dissipation

T_stg

storage

−55

+150

°C

temperature

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

17 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

Table 3.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are measured

with respect to ground (pin 11); positive currents ﬂow into the chip; pin V_CCmay not be current

driven. The voltage ratings are valid provided other ratings are not violated; current ratings are valid

provided the maximum power rating is not violated.

Symbol Parameter Conditions

Min

Max

Unit

T_j

junction

−20

+145

°C

temperature

ESD

V_ESD

electrostatic class 1

discharge

voltage

[1]

human

body

model

pins 1 to 7 and pins 9 to 16

pin 8 (DRAIN)

-

2000

1500

V

[2]

machine

model

-

200

V

[1] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.

[2] Equivalent to discharging a 200 pF capacitor through a 0.75 µH coil and a 10 Ω resistor.

9. Thermal characteristics

Table 4.

Thermal characteristics

Symbol

Parameter

Conditions

Typ

Unit

K/W

R_th(j-a)

thermal resistance from junction

to ambient

in free air

110

10. Characteristics

Table 5.

Characteristics

T_amb= 25 °C; V_CC= 15 V; all voltages are measured with respect to ground (pin 11); currents are positive when ﬂowing into

the IC, unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Start-up current source (pin 8)

I_DRAIN

current on pin DRAIN input current;

1.0

1.2

1.4

mA

V_CC= 0 V; V_Ion pin

DRAIN > 100 V

with auxiliary supply;

-

100

300

µA

V_Ion pin DRAIN > 100 V

V_BR

breakdown voltage

650

60

-

V

V_{mains(oper)(en)}

mains-dependent

operation-enabling

voltage

100

V_CCmanagement (pin 9)

V_startup

V_th(UVLO)

start-up voltage

10.3

8.1

11

11.7

9.3

V

undervoltage lockout

threshold voltage

8.7

V_hys

hysteresis voltage

V_startup- V_th(UVLO)

2.0

2.3

2.6

V

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

18 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

Table 5.

Characteristics …continued

T_amb= 25 °C; V_CC= 15 V; all voltages are measured with respect to ground (pin 11); currents are positive when ﬂowing into

the IC, unless otherwise speciﬁed.

Symbol

Parameter

high charging current V_Ion pin DRAIN > 100 V;

_CC< 3 V

Conditions

Min

Typ

Max

Unit

I_ch(high)

−1.2

−1

−0.8

mA

V

I_ch(low)

I_restart

low charging current V_Ion pin DRAIN > 100 V;

3 V < V_CC< V_th(UVLO)

−1.2

−650

1.1

−0.75

−550

1.3

−0.45

−450

1.5

mA

µA

restart current

V_Ion pin DRAIN > 100 V;

_th(UVLO)< V_CC< V_startup

V

I_CC(oper)

operating supply

current

no load on pin DRIVER

mA

Demagnetization management (pin 16)

V_DEM

voltage on pin DEM

50

80

110

mV

V

V_CL(neg)

negative clamp

voltage

voltage on pin DEM,

I_Ion pin DEM = −500 µA

−0.5

−0.25

−0.05

V_CL(pos)

positive clamp voltage voltage on pin DEM,

I_Ion pin DEM = 1 mA

0.5

1.1

0.7

1.5

0.9

1.9

V

t_{sup(xfmr_ring)}

transformer ringing

suppression time

µs

Pulse width modulator

t_on(min)

minimum on-time

-

t_leb

50

-

ns

t_on(max)

maximum on-time

40

60

µs

Oscillator

f_osc(low)

low oscillator

frequency

V_Ion pin CTRL > 1.5 V

V_Ion pin CTRL < 1 V

20

100

-

25

30

150

-

kHz

mV

f_osc(high)

high oscillator

frequency

125

VCO₁

V_VCO(start)

start VCO voltage

peak voltage at pin

ISENSE, where frequency

reduction starts. See

Figure 6 and Figure 8

V_VCO(max)

maximum VCO

voltage

peak voltage at pin

ISENSE, where the

frequency is equal to

f_osc(low)

-

VCO₁− 50 -

mV

Duty cycle control (pin 14)

V_min(δmax)

V_max(δmin)

I_CTRL

minimum voltage

(maximum duty cycle)

-

1.0

-

V

maximum voltage

(minimum duty cycle)

-

1.5

-

V

current on pin CTRL input current, V_Ion pin

CTRL = 1.5 V

−1 ^[1]

−0.8

−0.5

µA

5 V output (pin 12)

V_O(VCC5V)

output voltage on pin current on pin

4.75

5.0

-

5.25

-

V

VCC5V

VCC5V = −1 mA

I_O(VCC5V)

output current on pin

VCC5V

−1.0

mA

LOCK input (pin 13)

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

19 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

Table 5.

Characteristics …continued

T_amb= 25 °C; V_CC= 15 V; all voltages are measured with respect to ground (pin 11); currents are positive when ﬂowing into

the IC, unless otherwise speciﬁed.

Symbol

V_trip

Parameter

Conditions

Min

2.37

-

Typ

2.5

4.5

Max

2.63

-

Unit

V

trip voltage

V_{VCC(latch)(reset)}

latch reset voltage on V_trip< 2.3 V

pin V_CC

V

V_LOCK/V_VCC5V

voltage on pin LOCK

to voltage on pin

VCC5V ratio

V_trip= 0.5 × V_{O( VCC5V)}

−4

-

+4

%

Advanced overpower timing via pin CSTART (pin 15)

I_ch(CSTART)

V_trip(CSTART)

I_opp(adv)

charge current on pin

CSTART

−11.5

2.37

−11.5

20

−10

2.5

−10

25

−8.5

2.63

−8.5

33

µA

V

trip voltage on pin

CSTART

advanced over-power V_Ion pin SENSE < 0.1 V

protection current

µA

kHz

f_{act(opp)(adv)}

advanced over-power V_Ion pin CTRL < 0.5 V

protection activation

frequency

and

V_Ion pin CSTART > 2.5 V

VCOadj input (pin 1)

I_VCOADJcurrent on pin

VCOADJ

−11.5

−10

−8.5

µA

Valley switch (pin 8)

(∆V/∆t)_vrec

valley recognition

voltage change with

time

−85

-

+85

-

V/µs

t_d(vrec-swon)

valley recognition to

switch-on delay time

-

150 ^[1]

ns

Current and short winding protection (pin 3)

V_sense(max)

maximum sense

voltage

∆V/∆t = 0.1 V/µs

0.48

0.52

0.56

V

t_PD

propagation delay

∆V/∆t = 0.5 V/µs

-

140

185

ns

V

V_swp

short-winding

0.83

0.88

0.96

protection voltage

t_leb

leading edge blanking

time

300

45

370

60

440

75

ns

I_{startup(soft)}

soft startup current

V_Ion pin SENSE < 0.5 V

µA

Overvoltage protection (pin 16 and pin 2)

[2]

[3]

I_ovp

over-voltage

protection current

279

−36

52

300

−32

60

321

−28

68

µA

V

I_ch(OVPFCAP)

I_dch(OVPFCAP)

V_{trip(OVPFCAP)}

t_p(OVPFCAP)

charge current on pin V_Ion pin OVPFCAP = 1 V

OVPFCAP

discharge current on V_Ion pin OVPFCAP = 1 V

pin OVPFCAP

trip voltage on pin

OVPFCAP

2.37

2.3

2.5

2.8

2.63

3.4

pulse duration on pin

OVPFCAP

µs

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

20 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

Table 5.

Characteristics …continued

T_amb= 25 °C; V_CC= 15 V; all voltages are measured with respect to ground (pin 11); currents are positive when ﬂowing into

the IC, unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

−103

145

Typ

−90

170

Max

−77

195

Unit

pC

[4]

[5]

Q_OVPFCAP

charge on pin

OVPFCAP

charge delivered

charge subtracted

pC

Overpower protection (pin 16)

[6]

[7]

I_opp(DEM)

over-power protection

current on pin DEM

-

−120

−500

-

µA

I_{opp(red)(DEM)}

reduced over-power

protection current on

pin DEM

V_ISENSE< 0.3 V

STDBY output (pin 4)

V_O(STDBY)

output voltage on pin

STDBY

4.75

−25

2

5.0

−22

-

5.25

−20

-

V

I_{source(STDBY)}

I_sink(STDBY)

source current on pin pin STDBY source

STDBY

µA

mA

current, V_STDBY= 1.5 V

sink current on pin

STDBY

pin STDBY sink current,

V_Ion pin STDBY = 1.5 V

Driver (pin 5)

I_{source(DRIVER)}

source current on pin pin DRIVER source

-

−170

−88

mA

DRIVER

current, V_CC= 9.5 V;

V_Ion pin DRIVER = 2 V

I_sink(DRIVER)

sink current on pin

DRIVER

pin DRIVER sink current,

300

-

V_CC= 9.5 V;

V_Ion pin DRIVER = 2 V

V_CC= 9.5 V;

V_Ion pin DRIVER = 9.5 V

400

-

700

-

mA

V

V_o(max)

maximum output

voltage

V_CC= 12 V

11.5

12

Temperature protection

T_pl(max)maximum protection

130

-

140

8 ^[1]

150

-

°C

level temperature

T_pl(hys)

protection level

hysteresis

temperature

[1] Guaranteed by design.

[2] Set by the demagnetization resistor, R_DEM; see Section 7.9 “Overvoltage protection”.

[3] Set by the OVPFCAP capacitor; see Section 7.9 “Overvoltage protection”.

[4] Value equal to the product of the OVPFCAP current pulse width and the OVP ﬁlter timing charge current.

[5] Value equal to the product of the OVPFCAP current pulse width and the OVP ﬁlter timing discharge current.

[6] Set by the demagnetization resistor, R_DEM; see Section 7.12 “Overpower protection”.

[7] Maximum source voltage is limited to 0.3 V.

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

21 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

11. Application information

A converter using the TEA1553T consists of an input ﬁlter, a transformer with a third

winding (auxiliary), and an output stage with a feedback circuit.

Capacitor C_VCC(at pin 9) buffers the supply voltage of the IC, which is powered via the

high voltage rectiﬁed mains during start-up and via the auxiliary winding during operation.

A sense resistor converts the primary current into a voltage at pin ISENSE (pin 3). The

value of this sense resistor deﬁnes the maximum primary peak current.

V MAINS

OUTPUT

PFC

TEA1553T

8

7

9

VCC

DRAIN

10 n.c.

11

HVS

GND

6

5

POWER

12

13

14

15

16

MOSFET

VCC5V

DRIVER

STDBY

ISENSE

Θ

4

3

2

1

LOCK

CTRL

CSS

RSS

RS2

R

SENSE

CSTART OVPFCAP

DEM VCOADJ

R

DEM

014aaa013

(1) The LOCK pin is used in this example for an additional external overtemperature protection. If this pin is not used, it must be

tied to ground.

Fig 14. Application diagram of TEA1553T with controlled PFC

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

22 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

V

IN

V

DRAIN

V

O

V

CC

V

DRIVER

V

mains(oper(en)

V

CC5V

start-up

normal

ovp

normal

output

sequence

operation

short-circuit

014aaa014

Fig 15. Typical waveforms

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

23 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

12. Package outline

SO16: plastic small outline package; 16 leads; body width 3.9 mm

SOT109-1

D

E

A

X

c

y

H

v

M

A

E

Z

16

9

Q

A

2

A

(A )

3

A

1

pin 1 index

θ

L

p

L

1

8

e

w

M

detail X

b

p

0

2.5

scale

5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

(1)

UNIT

A

b

c

D

E

e

H

L

p

Q

v

w

y

Z

θ

1

2

3

p

E

max.

0.25

0.10

1.45

1.25

0.49

0.36

0.25

0.19

10.0

9.8

4.0

3.8

6.2

5.8

1.0

0.4

0.7

0.6

0.7

0.3

mm

1.27

0.05

1.05

0.041

1.75

0.25

0.01

0.25

0.01

0.25

0.1

8^o

0^o

0.010 0.057

0.004 0.049

0.019 0.0100 0.39

0.014 0.0075 0.38

0.16

0.15

0.244

0.228

0.039 0.028

0.016 0.020

0.028

0.012

inches

0.069

0.01 0.004

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT109-1

076E07

MS-012

Fig 16. Package outline SOT109-1 (SO16)

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

24 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

13. Revision history

Table 6.

Revision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

TEA1553T_1

20070703

Product data sheet

-

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

25 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

14. Legal information

14.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Deﬁnition

Objective [short] data sheet

This document contains data from the objective speciﬁcation for product development.

This document contains data from the preliminary speciﬁcation.

This document contains the product speciﬁcation.

Preliminary [short] data sheet Qualiﬁcation

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Deﬁnitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

result in personal injury, death or severe property or environmental damage.

14.2 Deﬁnitions

NXP Semiconductors accepts no liability for inclusion and/or use of NXP

Semiconductors products in such equipment or applications and therefore

such inclusion and/or use is at the customer’s own risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the

full data sheet shall prevail.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/proﬁle/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conﬂict between information in this document and such

terms and conditions, the latter will prevail.

14.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or

warranties, expressed or implied, as to the accuracy or completeness of such

information and shall have no liability for the consequences of use of such

information.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

14.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of a NXP Semiconductors product can reasonably be expected to

GreenChip — is a trademark of NXP B.V.

15. Contact information

For additional information, please visit: http://www.nxp.com

For sales ofﬁce addresses, send an email to: salesaddresses@nxp.com

TEA1553T_1

Product data sheet

Rev. 01 — 3 July 2007

26 of 27

TEA1553T

NXP Semiconductors

GreenChip II SMPS control IC

16. Contents

1

General description . . . . . . . . . . . . . . . . . . . . . . 1

15

16

Contact information . . . . . . . . . . . . . . . . . . . . 26

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

2

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Distinctive features . . . . . . . . . . . . . . . . . . . . . . 1

Green features . . . . . . . . . . . . . . . . . . . . . . . . . 1

Protection features . . . . . . . . . . . . . . . . . . . . . . 1

2.1

2.2

2.3

3

4

5

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Ordering information. . . . . . . . . . . . . . . . . . . . . 2

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6

6.1

6.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

7

7.1

Functional description . . . . . . . . . . . . . . . . . . . 5

Start-up, mains enabling operation level and

undervoltage lock-out . . . . . . . . . . . . . . . . . . . . 6

Supply management. . . . . . . . . . . . . . . . . . . . . 6

Current mode control . . . . . . . . . . . . . . . . . . . . 7

Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

VCO adjust . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Cycle skipping. . . . . . . . . . . . . . . . . . . . . . . . . . 9

STDBY output. . . . . . . . . . . . . . . . . . . . . . . . . . 9

Demagnetization. . . . . . . . . . . . . . . . . . . . . . . 10

Overvoltage protection . . . . . . . . . . . . . . . . . . 10

Valley switching. . . . . . . . . . . . . . . . . . . . . . . . 11

Overcurrent protection . . . . . . . . . . . . . . . . . . 12

Overpower protection . . . . . . . . . . . . . . . . . . . 12

Advanced overpower timing via pin CSTART . 13

Minimum and maximum ‘on-time’. . . . . . . . . . 14

Short winding protection. . . . . . . . . . . . . . . . . 14

LOCK input . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Overtemperature protection . . . . . . . . . . . . . . 15

5 V output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Open/not connected CTRL pin protection . . . 15

Soft start-up (pin ISENSE) . . . . . . . . . . . . . . . 15

Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

7.2

7.3

7.4

7.5

7.6

7.7

7.8

7.9

7.10

7.11

7.12

7.13

7.14

7.15

7.16

7.17

7.18

7.19

7.20

7.21

8

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 17

Thermal characteristics. . . . . . . . . . . . . . . . . . 18

Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 18

Application information. . . . . . . . . . . . . . . . . . 22

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 24

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 25

9

10

11

12

13

14

Legal information. . . . . . . . . . . . . . . . . . . . . . . 26

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 26

Deﬁnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 26

14.1

14.2

14.3

14.4

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 3 July 2007

Document identifier: TEA1553T_1


型号：	TEA1553T
厂家：	NXP
描述：	GreenChip II SMPS control IC 的GreenChip II SMPS控制IC
文件：	总27页 (文件大小：141K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TEA1553T [NXP]

相关型号：

TEA1566

TEA1566J

TEA1566S

TEA1610

TEA1610P

TEA1610P/N5

TEA1610P/N5,112

TEA1610P/N6,112

TEA1610T

TEA1610T/N5

TEA1610T/N5,118

TEA1610T/N5,518