TEA1611T [NXP]
IC SWITCHING CONTROLLER, 485 kHz SWITCHING FREQ-MAX, PDSO20, 7.50 MM, PLASTIC, MS-013, SOT163-1, SOP-20, Switching Regulator or Controller;![TEA1611T](http://pdffile.icpdf.com/pdf2/p00315/img/icpdf/TEA1611T_1893697_icpdf.jpg)
型号: | TEA1611T |
厂家: | ![]() |
描述: | IC SWITCHING CONTROLLER, 485 kHz SWITCHING FREQ-MAX, PDSO20, 7.50 MM, PLASTIC, MS-013, SOT163-1, SOP-20, Switching Regulator or Controller 开关 光电二极管 |
文件: | 总18页 (文件大小:102K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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TEA1611T
Zero voltage switching resonant converter controller
Rev. 01 — 7 September 2009
Product data sheet
1. General description
The TEA1611T is a monolithic integrated circuit implemented in a high voltage Diffusion
Metal Oxide Semiconductor (DMOS) process, which is a high voltage controller for a zero
voltage switching resonant converter. The IC provides the drive function for two discrete
power MOSFETs in a half-bridge configuration. It also includes a level-shift circuit, an
oscillator with accurately programmable frequency range, a latched shut-down function
and a transconductance error amplifier.
To guarantee an accurate 50 % switching duty factor, the oscillator signal passes through
a divide-by-two flip-flop before being fed to the output drivers.
The circuit is very flexible and enables a broad range of applications for different mains
voltages.
V
hs
bridge voltage
VAUX
supply
(high side)
MOSFET
SWITCH
HALF-
BRIDGE
CIRCUIT
RESONANT
CONVERTER
TEA1611
signal ground
power ground
014aaa681
Fig 1. Basic configuration
2. Features
I Integrated high voltage level-shift function
I Integrated high voltage bootstrap diode
I Low start-up current (green function)
I Adjustable non-overlap time
I Internal OverTemperature Protection (OTP)
I OverCurrent Protection (OCP) that activates a shut-down timer
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
I Soft start timing pin
I Transconductance error amplifier for ultra high-ohmic regulation feedback
I Latched shut-down circuit for OverVoltage Protection (OVP)
I Adjustable minimum and maximum frequencies
I UnderVoltage LockOut (UVLO)
I Fault latch reset input
I Wide (max 20 V) supply voltage range
3. Applications
I TV and monitor power supplies
I High voltage power supplies
4. Ordering information
Table 1.
Ordering information
Type number
Package
Name
Description
Version
TEA1611T
SO20
plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
2 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
5. Block diagram
VAUX
V
DD
BOOTSTRAP
13 V
VDD(FLOAT)
LEVEL
SHIFTER
SUPPLY
HIGH SIDE
DRIVER
GH
TEA1611
SH
GL
reset
OVER
LOW SIDE
DRIVER
TEMPERATURE
PROTECTION
PGND
OCP
start/stop oscillation
LOGIC
0.3 V
shut-down
reset
start-up
SD
CT
SGND
2.33 V
: 2
5 µA
RESET
P
g
m
TIMER
I
× 2
ch
OSCILLATOR
2.5 V
2.5 V
3 V
0.6 V
BUFFER
I
dch
×16
CSS
VCO IRS
VREF IFS
CF
014aaa680
Fig 2. Block diagram
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
3 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
6. Pinning information
6.1 Pinning
1
2
20
19
18
17
16
15
14
13
12
11
P
VCO
VREF
SD
3
CSS
IRS
4
CT
CF
5
OCP
IFS
TEA1611
6
PGND
n.c.
RESET
VAUX
7
8
SH
V
DD
9
GH
GL
10
VDD(FLOAT)
SGND
014aaa684
Fig 3. Pin configuration
6.2 Pin description
Table 2.
Symbol
P
Pin description
Pin
1
Description
error amplifier non-inverting input
error amplifier output
soft start capacitor input
timer capacitor input
overcurrent protection input
power ground
VCO
CSS
CT
2
3
4
OCP
PGND
n.c.
5
6
7
not connected[1]
SH
8
high side switch source connection
high side switch gate connection
floating supply high side driver
signal ground
GH
9
VDD(FLOAT)
SGND
GL
10
11
12
13
14
15
16
17
18
19
20
low side switch gate connection
supply voltage
VDD
VAUX
RESET
IFS
auxiliary supply voltage
latch reset input
oscillator discharge current input
oscillator capacitor
CF
IRS
oscillator charge input current
shut-down input
SD
VREF
reference voltage
[1] Provided as a high voltage spacer
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
4 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
7. Functional description
7.1 Start-up
When the applied voltage at VDD reaches VDD(init) (see Figure 4), the low side power
switch is turned on while the high side power switch remains in the non-conducting state.
This start-up output state guarantees the initial charging of the bootstrap capacitor (Cboot
)
used for the floating supply of the high side driver.
During start-up, the voltage on the frequency capacitor pin (CF) is zero and defines the
start-up state. The voltage at the soft start pin (CSS) is set to 2.5 V. The CSS pin voltage
is copied to the VCO pin via a buffer and switching starts at about 80 % of the maximum
frequency at the moment VDD reaches the start level.
The start-up state is maintained until VDD reaches the start level (13.5 V), the oscillator is
activated and the converter starts operating.
V
V
V
DD
0
DD(startup)
DD(init)
GH-SH
0
GL
0
t
014aaa036
Fig 4. Start-up
7.2 Oscillator
The internal oscillator is a current-controlled sawtooth oscillator. The frequency of the
sawtooth is determined by the external capacitor Cf and the currents flowing into the IFS
and IRS pins.
The minimum frequency and the non-overlap time are set by the capacitor Cf and the
resistors Rf(min) and Rno. The maximum frequency is set by resistor R∆f (see Figure 7).
The oscillator frequency is exactly twice the bridge frequency to achieve an accurate 50 %
duty factor. An overview of the oscillator and driver signals is given in Figure 5.
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
5 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
CF
GH-SH
0
GL
0
non-overlap time (high to low)
non-overlap time (low to high)
t
014aaa685
Fig 5. Oscillator and driver signals
7.3 Non-overlap time resistor
The non-overlap time resistor Rno is connected between the 3 V reference pin (VREF) and
the IFS current input pin (see Figure 7). The voltage on the IFS pin is kept at a
temperature-independent value of 0.6 V. The current that flows into the IFS pin is
determined by the value of resistor’s Rno 2.4 V voltage drop divided by its value. The IFS
input current equals 1/16 of the discharge current of capacitor Cf and determines the
falling slope of the oscillator.
The falling slope time is used to create a non-overlap time (tno) between two successive
switching actions of the half-bridge switches:
2.4V
Rno
IIFS
=
-----------
C f × ∆VCf
tno
=
--------------------------
16 × IIFS
7.4 Minimum frequency resistor
The Rf(min) resistor is connected between the VREF pin (3 V reference voltage) and the
IRS current input (kept at a temperature-independent voltage level of 0.6 V). The charge
current of the capacitor Cf is twice the current flowing into the IRS pin.
The Rf(min) resistor has a voltage drop of 2.4 V and its resistance defines the minimum
charge current (rising slope) of the Cf capacitor if the control current is zero. The minimum
frequency is defined by this minimum charge current (IIRS1) and the discharge current:
2.4V
Rf (min)
IIRS1
=
=
-----------------
C f × ∆VCf
tIRS1
--------------------------
2 × IIRS1
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
6 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
1
f osc(min))
=
------------------------
tno × tIRS1
f osc(min)
f bridge(min)
=
---------------------
2
7.5 Maximum frequency resistor
The output voltage is regulated by changing the frequency of the half-bridge converter.
The maximum frequency is determined by the R∆f resistor which is connected between
the error amplifier output VCO and the oscillator current input pin IRS. The current that
flows through the R∆f resistor (IIRS2) is added to the current flowing through the Rf(min)
resistor. As a result, the charge current ICF increases and the oscillation frequency
increases. As the falling slope of the oscillator is constant, the relationship between the
output frequency and the charge current is not a linear function (see Figure 6 and
Figure 7):
VVCO – 0.6
IIRS2
=
=
--------------------------
R∆f
C f × ∆VCf
--------------------------------------------
2 × (IIRS1 + IIRS2
tIRS2
)
The maximum output voltage of the error amplifier and the value of R∆f determine the
maximum frequency:
VVCO(max) – 0.6
IIRS2(max)
=
---------------------------------------
R∆f
C f × ∆VCf
tIRS(min)
=
---------------------------------------------------------
2 × (IIRS2 + IIRS2(max)
)
1
f osc(max)
=
------------
TOSC
f osc(max)
f bridge(max)
=
---------------------
2
TOSC = tIRS(min) + tno
The frequency of the oscillator depends on the value of capacitor Cf, the peak-to-peak
voltage swing VCF and the charge and discharge currents. The accuracy of the oscillator
frequency decreases at higher frequencies due to delays in the circuit.
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
7 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
f
osc
f
osc(max)
f
osc(start)
f
osc(min)
0
I
IRS
014aaa038
Fig 6. Frequency range
7.6 Error amplifier
The error amplifier is a transconductance amplifier. The output current at pin VCO is
determined by the amplifier transconductance, the differential voltage between input pin P,
and the internal 2.5 V reference voltage. The output current IVCO is fed to the IRS input of
the current-controlled oscillator.
The source capability of the error amplifier increases current in the IRS pin with a positive
differential input voltage. Therefore the minimum current is determined by resistor Rf(min)
and the minimum frequency setting is independent of the characteristics of the error
amplifier.
The error amplifier has a maximum output current of 0.5 mA for an output voltage of up to
2.5 V. If the source current decreases, the oscillator frequency also decreases resulting in
a higher regulated output voltage.
During start-up, the output voltage of the amplifier is connected to the soft start (CSS) pin
via a buffer. This will hold the VCO pin at a constant value of 2.5 V.
7.7 Soft start
The CSS pin voltage is copied to the VCO pin via a buffer. This buffer only has a source
capability, i.e. it can only charge the VCO pin. This means that the error amplifier output
can increase the VCO pin voltage above the CSS voltage level.
At start-up the soft start capacitor is charged to 2.5 V setting a start-up frequency of about
80 % of the maximum frequency. After start-up the external soft start capacitor is
discharged by Istart(soft). The VCO pin voltage will follow the CSS voltage (discharging
takes place via R∆f) and the frequency sweeps down. The CSS capacitor will determine
the frequency sweep rate. When the circuit comes into regulation, the error amplifier
output will control the VCO pin voltage and the CSS voltage will sweep down further to
zero volt.
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
8 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
7.8 Overcurrent protection and timer
The OCP input continuously compares the OCP pin voltage with VREF. When the OCP
pin voltage is higher than VREF, the timer capacitor CT will be charged with Ich during the
next full CF cycle. Else the timer capacitor will be discharged with Ileak
.
In case the CT voltage exceeds Vtrip(H), the TEA1611T will switch over to shut-down
mode. The timer capacitor will be discharged with Idch until the CT voltage reaches Vtrip(L)
after which a soft start cycle is started.
7.9 Shut-down
The shut-down input (SD) has an accurate threshold level of 2.33 V. When the voltage on
input SD reaches 2.33 V, the TEA1611T enters shut-down mode.
During shut-down mode, pin VDD is clamped by an internal 12 V Zener diode with a 1 mA
input current. This clamp prevents VDD rising above the rating of 14 V due to low supply
current to the TEA1611T in shut-down mode.
When the TEA1611T is in the shut-down mode, it can be activated again only by lowering
V
DD below the VDD(rst) level (typically 5.3 V) or by making the reset input active. The
shut-down latch is then reset and a new start-up cycle can begin.
In shut-down mode the GL pin is HIGH and the GH pin is LOW. In this way the bootstrap
capacitor remains charged, allowing a new, well defined cycle to start after a reset.
7.10 OverTemperature Protection (OTP)
The TEA1611T continuously monitors its temperature. When the temperature exceeds the
Totp(act) level, the TEA1611T will switch to shut-down mode.
7.11 Latch reset input
The internal shut-down latch can be reset via the reset input. This input is active LOW.
7.12 VAUX input
When the IC is oscillating the start-up resistor is not able to deliver the supply current so
that an auxiliary supply (for instance via an auxiliary winding or a dV/dt supply) is needed.
The VAUX input facilitates a series regulator which regulates its output voltage
(= VDD voltage) to VDD(reg)
.
8. Limiting values
Table 3.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Supply voltages
Vdrv(hs) high-side driver voltage
VDD
Parameter
Conditions
Min
Max
Unit
0
0
0
600
14
V
V
V
[1]
[1]
supply voltage
VCC(AUX)
auxiliary supply voltage
20
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
9 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
Table 3.
Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Voltage on pins P, SD, RESET and OCP
VI
input voltage
0
5
V
Currents
IIFS
current on pin IFS
current on pin IRS
current on pin VREF
-
-
-
1/16
1
mA
mA
mA
IIRS
IVREF
−2
Power and temperature
Ptot
total power dissipation
Tamb < 70 °C
-
0.8
W
Tamb
ambient temperature
storage temperature
operating
−25
−25
+70
+150
°C
°C
Tstg
Handling
VESD
[2]
[3]
electrostatic discharge
voltage
Human body
model
-
-
2000
200
V
V
Machine model
[1] It is recommended that a buffer capacitor is placed as close as possible to the VDD pin (as indicated in
Figure 7 and in the application note).
[2] Human body model class 2: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
[3] Machine model class 2: equivalent to discharging a 200 pF capacitor through a 0.75 mH coil and 10 Ω
resistor.
9. Thermal characteristics
Table 4.
Thermal characteristics
Parameter
Symbol
Conditions
Typ
Unit
Rth(j-a)
thermal resistance from junction in free air
to ambient
100
K/W
10. Characteristics
Table 5.
Characteristics
All voltages are referred to the ground pins which must be connected externally; positive currents flow into the IC; VDD = 13 V
and Tamb = 25 ˚C; tested using the circuit shown in Figure 7, unless otherwise specified.
Symbol
High voltage pins VDD(FLOAT), GH and SH
Ileak leakage current
Parameter
Conditions
Min
Typ
Max
Unit
VDD(F), VGH and
-
-
30
µA
VSH = 600 V
Supply pins VDD, VAUX
VDD(init)
initial supply voltage
defined driver output;
-
4
5
V
low side on; high side off
VDD(startup) start-up supply voltage
12.9
9.0
13.4
9.4
13.9
9.8
V
V
V
VDD(stop)
VDD(hys)
stop supply voltage
hysteresis of supply voltage
3.8
4.0
4.2
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
10 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
Table 5.
Characteristics …continued
All voltages are referred to the ground pins which must be connected externally; positive currents flow into the IC; VDD = 13 V
and Tamb = 25 ˚C; tested using the circuit shown in Figure 7, unless otherwise specified.
Symbol
VDD(reg)
VDD
Parameter
Conditions
Min
Typ
12.6
12
Max
Unit
V
regulation supply voltage
supply voltage
VAUX = 17 V
-
-
-
-
current capability series
regulator;
V
VCC(AUX) = 17 V;
IDD = 50 mA
clamp voltage in
shut-down state; low
side on; high side off;
11.0
4.5
12.0
5.3
13.0
6.0
V
V
IDD = 1 mA
Vrst
IDD
reset voltage
[1]
supply current
start-up
210
260
2.4
310
-
µA
mA
µA
operating
shut-down
-
-
220
270
Reference voltage on pin VREF
Vref
Iref
Zo
reference voltage
reference current
output impedance
temperature coefficient
Iref = 0 mA
source only
Iref = −1 mA
2.9
3.0
-
3.1
V
−2.0
-
-
-
mA
Ω
-
-
5.0
−0.3
TC
Iref = 0 mA;
mV/K
Tj = 25 °C to 150 °C
Current controlled oscillator pins IRS, IFS, CF
Ich(CF)min
Ich(CF)max
VIRS
minimum charge current on
pin CF
IIRS = 15 µA; VCF = 2 V
28
30
32
µA
µA
maximum charge current on
pin CF
IIRS = 200 µA; VCF = 2 V
340
380
420
voltage on pin IRS
IIRS = 200 µA
590
47
620
50
650
53
mV
Idch(CF)min minimum discharge current on
pin CF
IIFS = 50/16 µA;
µA
VCF = 2 V
Idch(CF)max maximum discharge current on
pin CF
IIFS = 1/16 µA; VCF = 2 V
0.89
0.94
0.99
mA
VIFS
voltage on pin IFS
IIFS = 1/16 mA
Cf = 100 pF;
570
156
600
167
630
178
mV
fbridge(min) minimum bridge frequency
kHz
IIFS = 0.5/16 mA;
IIRS = 50 µA;
f OSC
fbridge
=
------------
2
[2]
fbridge(max) maximum bridge frequency
Cf = 100 pF;
IFS = 1/16 mA;
395
440
485
kHz
I
IIRS = 200 µA;
f OSC
fbridge
=
------------
2
Vtrip(L)
Vtrip(H)
LOW-level trip voltage
HIGH-level trip voltage
pin CF; DC level
pin CF; DC level
-
-
1.27
2.97
-
-
V
V
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
11 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
Table 5.
Characteristics …continued
All voltages are referred to the ground pins which must be connected externally; positive currents flow into the IC; VDD = 13 V
and Tamb = 25 ˚C; tested using the circuit shown in Figure 7, unless otherwise specified.
Symbol
VCF(p-p)
tno
Parameter
Conditions
DC level
Min
1.6
Typ
1.7
Max
1.8
Unit
V
peak-to-peak voltage on pin CF
non-overlap time
Cf = 100 pF;
0.58
0.63
0.68
µs
IIFS = 0.5/16 mA;
IIRS = 50 µA
Idch(osc)/IIFS oscillator discharge current to
current on pin IFS ratio
IIFS = 0.5/16 mA;
14.4
16
17.6
Output drivers
Isource(GH) source current on pin GH
high side;
-
-
300
480
-
-
mA
mA
VDD(F) = 11.2 V;
VSH = 0 V; VGH = 0 V
Isink(GH)
sink current on pin GH
high side;
VDD(F) = 11.2 V;
VSH = 0 V; VGH = 11.2 V
Isource(GL)
Isink(GL)
VOH
source current on pin GL
sink current on pin GL
HIGH-level output voltage
low side; VGL = 0 V
low side; VGL = 13 V
pin GH; high side;
-
-
-
300
580
10.9
-
-
-
mA
mA
V
VDD(F) = 11.2 V;
VSH = 0 V; IGH = 10 mA
pin GL; low side;
IGL = 10 mA
-
-
12.6
0.17
-
-
V
V
VOL
LOW-level output voltage
pin GL; high side;
VDD(F) = 11.2 V;
VSH = 0 V; IGH = 10 mA
pin GL; low side;
IGL = 10 mA
-
0.18
1.6
-
V
V
VFd(bs)
bootstrap diode forward voltage
IO = 5 mA
1.3
1.9
Shut-down input pin SD
II
input current
VSD = 2.33 V
-
-
0.5
µA
Vth(SD)
threshold voltage on pin SD
2.26
2.33
2.40
V
Error amplifier pins P, VCO
II(cm)
common-mode input current
VI(CM) = 1 V
VI(CM) = 1 V;
-
−0.1
−0.5
2.5
+2
µA
V
VI(cm)
VI(offset)
common-mode input voltage
offset input voltage
-
-
−2
0
mV
IVCO = −10 mA
gm
transconductance
open-loop gain
VI(CM) = 1 V; source only
-
-
330
70
-
-
µA/mV
Gol
RL = 10 kΩ to GND;
dB
V
I(CM) = 1 V
RL = 10 kΩ to GND;
I(CM) = 1 V
GB
gain bandwidth product
-
5
-
MHz
V
V
VVCO(max) maximum VCO voltage
operating;
3.2
3.6
4.0
RL = 10 kΩ to GND
IVCO(max)
VO
maximum VCO current
output voltage
operating; VVCO = 1 V
−0.4
−0.5
−0.6
mA
V
during start-up;
2.5
2.7
2.9
IVCO = 0.3 mA
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
12 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
Table 5.
Characteristics …continued
All voltages are referred to the ground pins which must be connected externally; positive currents flow into the IC; VDD = 13 V
and Tamb = 25 ˚C; tested using the circuit shown in Figure 7, unless otherwise specified.
Symbol
Reset pin
Vrst
Parameter
Conditions
Min
Typ
Max
Unit
reset voltage
2.15
2.4
0.65
-
2.65
V
Vrst(hys)
II(rst)
hysteresis of reset voltage
reset input current
-
-
-
V
1
µA
CSS pin
Istart(soft)
CT pin
Ich
soft start current
12
15
18
µA
charge current
discharge current
leakage current
21
8
27
33
12
1
µA
µA
µA
µA
Idch
10
Ileak
0.1
2.4
0.3
2.7
Ich/Idch
charge current to discharge
current ratio
3.0
Vtrip(H)
Vtrip(L)
OCP pin
Vref
HIGH-level trip voltage
LOW-level trip voltage
2.7
0.6
3
3.3
0.8
V
V
0.7
reference voltage
280
120
305
135
330
150
mV
OTP
Totp(act)
activation overtemperature
protection temperature
°C
[1] The supply current IDD increases with an increasing bridge frequency to drive the capacitive load of two MOSFETs. Typical MOSFETs
for the TEA1611T application are 8N50 (NXP type PHX80N50E, QG(tot) = 55 nC typ.) and these will increase the supply current at
150 kHz according to the following formula:
∆IDD = 2 × QG(tot) × f bridge = 2 × 55nC × 150kHz = 16.5mA
low side on; high side off; Cf = 100 pF; IIFS = 0.5 mA; IIRS = 50 µA; low side off; high side off; VDD = 9 V
[2] The frequency of the oscillator depends on the value of capacitor Cf, the peak-to-peak voltage swing VCF and the charge/discharge
currents ICF(ch) and ICF(dis)
.
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
13 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
11. Application information
bridge voltage supply (high side)
output voltage
+
−
C
VDD
V
DD
13
14
18 V
VAUX
10 VDD(FLOAT)
L
p
12.6 V
9 GH
8 SH
LEVEL
SHIFTER
HIGH SIDE
DRIVER
TEA1611
L
r(ext)
C
boot
on/off
12
GL
LOW SIDE
DRIVER
C
p
C
r
6 PGND
11
SUPPLY
SGND
LOGIC
5
OCP
SD
0.3 V
15
1
latch reset RESET
regulator
19
overvoltage protection
2.33 V
feedback
g
m
P
: 2
(1)
2.5 V
2.7 V
OSCILLATOR
(2)
TIMER
3 V
start-up
600 mV
600 mV
17
20
18
16
3
2
VCO
CSS
IRS
V
IFS
CF
REF
C
f
C
T
R
∆f
R
f(min)
R
no
C
SS
014aaa683
(1) Construction 1: Regulation feedback connected to pin 1.
(2) Construction 2: Regulation feedback connected to pin 19 with resistor.
Fig 7. Application diagram
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
14 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
12. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25
0.01
0.25
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT163-1
075E04
MS-013
Fig 8. Package outline SOT163-1 (SO20)
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
15 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
13. Revision history
Table 6.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TEA1611T_1
20090907
Product data sheet
-
-
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
16 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
14. Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
14.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
14.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
15. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
TEA1611T_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
17 of 18
TEA1611T
NXP Semiconductors
Zero voltage switching resonant converter controller
16. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
Functional description . . . . . . . . . . . . . . . . . . . 5
Start-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Non-overlap time resistor . . . . . . . . . . . . . . . . . 6
Minimum frequency resistor . . . . . . . . . . . . . . . 6
Maximum frequency resistor. . . . . . . . . . . . . . . 7
Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Soft start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Overcurrent protection and timer . . . . . . . . . . . 9
Shut-down. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
OverTemperature Protection (OTP) . . . . . . . . . 9
Latch reset input . . . . . . . . . . . . . . . . . . . . . . . . 9
VAUX input . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
8
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal characteristics. . . . . . . . . . . . . . . . . . 10
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 10
Application information. . . . . . . . . . . . . . . . . . 14
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
9
10
11
12
13
14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
14.1
14.2
14.3
14.4
15
16
Contact information. . . . . . . . . . . . . . . . . . . . . 17
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 7 September 2009
Document identifier: TEA1611T_1
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