TZA1035HL [NXP]

High speed advanced analog DVD signal processor and laser supply; 高速先进的模拟DVD信号处理器和激光电源
TZA1035HL
型号: TZA1035HL
厂家: NXP    NXP
描述:

High speed advanced analog DVD signal processor and laser supply
高速先进的模拟DVD信号处理器和激光电源

光电 消费电路 商用集成电路 DVD
文件: 总48页 (文件大小:197K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
DATA SHEET  
TZA1035HL  
High speed advanced analog DVD  
signal processor and laser supply  
Preliminary specification  
2003 Jun 03  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
CONTENTS  
7.4  
Internal digital control, serial bus and external  
digital input signal relationships  
STANDBY mode  
RF only mode  
Signal descriptions  
Data path signals through pins A to D  
Data signal path through input pins RFSUMP  
and RFSUMN  
HF filtering  
Focus signals  
1
2
3
4
5
6
7
FEATURES  
7.4.1  
7.4.2  
7.5  
7.5.1  
7.5.2  
GENERAL DESCRIPTION  
ORDERING INFORMATION  
QUICK REFERENCE DATA  
BLOCK DIAGRAM  
7.5.3  
7.5.4  
7.5.5  
7.5.5.1  
PINNING  
FUNCTIONAL DESCRIPTION  
Radial signals  
DPD signals (DVD-ROM mode) with no  
drop-out concealment  
7.1  
RF data processing  
7.2  
Servo signal processing  
7.2.1  
7.2.2  
7.2.3  
7.2.4  
7.2.4.1  
7.2.4.2  
7.2.4.3  
Servo signal path set-up  
Focus servo  
Radial servo  
Differential phase detection  
Drop-out concealment  
Push-pull and three-beam push-pull  
Enhanced push-pull (dynamic offset  
compensation for beam landing)  
Offset compensation  
Automatic dual laser supply  
Power-on reset and general power on  
Compatibility with TZA1033HL/V1  
Software compatibility  
7.5.5.2  
DPD signals (DVD-ROM mode) with  
drop-out concealment  
Three-beam push-pull (CD mode)  
Enhanced push-pull  
7.5.5.3  
7.5.5.4  
8
LIMITING VALUES  
9
THERMAL CHARACTERISTICS  
CHARACTERISTICS  
10  
11  
7.2.4.4  
7.2.5  
7.2.6  
7.2.7  
7.2.7.1  
7.2.7.2  
7.2.8  
7.3  
7.3.1  
7.3.2  
7.3.3  
7.3.4  
7.3.5  
APPLICATION INFORMATION  
11.1  
Signal relationships  
Data path  
Servo path  
Programming examples  
Energy saving  
Initial DC and gain setting strategy  
Electrical offset from pick-up  
Gain setting servo  
DC level in RF path  
Gain setting RF path  
11.1.1  
11.1.2  
11.2  
11.3  
11.4  
11.4.1  
11.4.2  
11.4.3  
11.4.4  
Hardware compatibility  
Interface to the system controller  
Control registers  
Register 0: power control  
Register 1: servo and RF modes  
Register 2: focus offset DAC  
Register 3: RF path gain  
Register 4: RF left and right, or sum offset  
compensation  
12  
PACKAGE OUTLINE  
SOLDERING  
13  
7.3.6  
7.3.7  
Register 5: RF sum offset compensation  
Register 6: servo gain and dynamic radial  
offset compensation factor  
Register 7: servo path gain and bandwidth and  
RF path bandwidth and pre-emphasis  
Register 8: RF channel selection  
Register 11: radial servo offset cancellation  
Register 12: central servo offset cancellation  
inputs A and B  
Register 13: central servo offset cancellation  
inputs C and D  
Register 14: RF filter settings  
Register 15: DPD filter settings  
13.1  
Introduction to soldering surface mount  
packages  
Reflow soldering  
Wave soldering  
Manual soldering  
13.2  
13.3  
13.4  
13.5  
7.3.8  
7.3.9  
7.3.10  
7.3.11  
Suitability of surface mount IC packages for  
wave and reflow soldering methods  
14  
15  
16  
DATA SHEET STATUS  
DEFINITIONS  
7.3.12  
DISCLAIMERS  
7.3.13  
7.3.14  
2003 Jun 03  
2
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
1
FEATURES  
2
GENERAL DESCRIPTION  
Operates with DVD-ROM, DVD+RW, DVD-RW,  
CD-ROM and CD-RW  
The TZA1035HL is an analog preprocessor and laser  
supply circuit for DVD and CD read-only players. The  
device contains data amplifiers, several options for radial  
tracking and focus control. The preamplifier forms a  
versatile, programmable interface between single light  
path voltage output CD or DVD mechanisms to Philips  
digital signal processor family for CD and DVD (for  
example, Gecko, HDR65 or Iguana). A separate  
high-speed RFSUM input is available.  
Operates up to 64 × CD-ROM and 12 × DVD-ROM  
RF data amplifier with wide, fine pitch programmable  
noise filter and equalizer equivalent to 64 × CD or  
12 × DVD  
Programmable RF gain for DVD-ROM, CD-RW and  
CD-ROM applications (approximately 50 dB range to  
cover a large range of disc-reflectivity and OPUs)  
The device contains several options for radial tracking:  
Conventional three-beam tracking for CD  
Differential phase detector for DVD  
Additional RF sum input  
Balanced RF data signal transfer  
Universal photodiode IC interface using internal  
conversion resistors and offset cancellation  
Push-pull with flexible left and right weighting to  
compensate dynamic offsets e.g. beam landing offset  
Input buffers and amplifiers with low-pass filtering  
Three different tracking servo strategies:  
– Conventional three-beam tracking for CD  
A radial error signal to allow Fast Track Count (FTC)  
during track jumps.  
The dynamic range of this preamplifier and processor  
combination can be optimized for LF servo and RF data  
paths. The gain in both channels can be programmed  
separately and so guarantees optimal playability for all  
disc types.  
– Differential Phase Detection (DPD) for DVD-ROM,  
including option to emulate traditional drop-out  
detection: Drop-Out Concealment (DOC)  
– Advanced push-pull with dynamic offset  
compensation.  
The RF path is fully DC coupled. The DC content  
compensation techniques provide fast settling after disc  
errors.  
Enhanced signal conditioning in DPD circuit for optimal  
tracking performance under noisy conditions  
Radial error signal for Fast Track Counting (FTC)  
The device can accommodate astigmatic, single foucault  
and double foucault detectors and can be used with P-type  
lasers with N-sub or P-sub monitor diodes. After an initial  
adjustment, the circuit will maintain control over the laser  
diode current. With an on-chip reference voltage  
generator, a constant stabilized output power is ensured  
and is independent of ageing.  
RF only mode: servo outputs can be set to 3-state, while  
RF data path remains active  
Radial servo polarity switch  
Flexible adaption to different light pen configurations  
Two fully automatic laser controls for red and infrared  
lasers, including stabilization and an on/off switch  
An internal Power-on reset circuit ensures a safe start-up  
condition.  
Automatic selection of monitor diode polarity  
Digital interface with 3 and 5 V compatibility.  
2003 Jun 03  
3
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
3
ORDERING INFORMATION  
PACKAGE  
TYPE NUMBER  
NAME  
DESCRIPTION  
VERSION  
TZA1035HL  
LQFP48  
plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm  
SOT313-2  
4
QUICK REFERENCE DATA  
SYMBOL  
Tamb  
Supplies  
DDA1, VDDA2  
VDDA3, VDDA4  
VDDD3  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
ambient temperature  
0
60  
°C  
V
,
analog supply voltage  
4.5  
5.0  
5.5  
V
3 V digital supply voltage  
5 V digital supply voltage  
supply current  
2.7  
4.5  
3.3  
5.0  
98  
5.5  
5.5  
120  
1
V
VDDD5  
V
IDD  
without laser supply  
STANDBY mode  
note 1  
mA  
mA  
V
VI(logic)  
logic input compatibility  
2.7  
3.3  
5.5  
Servo signal processing  
BLF(3dB) 3 dB bandwidth of  
60  
75  
100  
kHz  
LF path  
IO(LF)  
output current  
focus servo output  
radial servo output  
0
12  
12  
µA  
µA  
V
0
VO(FTC)(p-p)  
BFTC  
FTC output voltage  
(peak-to-peak value)  
2.0  
FTC bandwidth  
FTCHBW = 0  
600  
kHz  
kHz  
V
FTCHBW = 1; note 2  
1200  
VI(FTCREF)  
FTC reference input  
voltage  
1.25  
2.75  
RF data processing  
ARF  
linear current gain  
programmable gain  
RF channels  
6
49  
+31  
dB  
RFSUM channels  
6  
200  
dB  
BRF(3dB)  
f0(RF)  
3 dB bandwidth of RFP  
and RFN signal path  
RFEQEN = 0;  
RFNFEN = 0  
300  
MHz  
noise filter and equalizer  
corner frequency  
BWRF = 0  
8
12.0  
145  
14.5  
182  
0.5  
MHz  
MHz  
ns  
BWRF = 127  
100  
td(RF)  
flatness delay in RF data  
path  
equalizer on; flat from  
0 to 100 MHz;  
BWRF = 127  
Zi  
input impedance of  
pins A to D  
100  
kΩ  
2003 Jun 03  
4
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
Vi(RF)(FS)  
PARAMETER  
input voltage on  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
at the appropriate signal  
pins A to D for full-scale at path gain setting  
output  
RF signal path  
600  
mV  
mV  
mV  
LF signal path  
700  
Vi(SUM)(dif)  
differential input voltage  
on pins RFSUMP and  
RFSUMN  
GRFSUM = 6 dB  
1800  
VI(DC)  
DC input voltage range on with respect to VSS  
pins RFSUMP and  
RFSUMN  
1.3  
V
DDA 1.0  
V
V
Vo(RF)(dif)(p-p)  
differential output voltage  
on pins RFP and RFN  
(peak-to-peak value)  
1.4  
VO(RF)(DC)  
DC output voltage on  
pins RFP and RFN  
0.35  
0.8  
V
DDA 1.9  
V
V
Vi(RFREF)(CM)  
input reference voltage on  
pin RFREF for common  
mode output  
1.2  
2.1  
Laser supply  
Io(laser)(max)  
maximum current output  
to laser  
120  
mA  
Vi(mon)  
input voltage from laser  
monitor diode  
P-type monitor diode  
LOW level voltage  
HIGH level voltage  
N-type monitor diode  
LOW level voltage  
HIGH level voltage  
V
DDA4 0.155 −  
DDA4 0.190 −  
V
V
V
0.155  
0.185  
V
V
Notes  
1. Input logic voltage level follows the supply voltage applied at pin VDDD3  
.
2. High FTC bandwidth is achieved when IS1 and IS2 > 1.5 µA.  
2003 Jun 03  
5
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
5
BLOCK DIAGRAM  
V
V
V
V
V
V
RFREF  
38  
DDA1  
5
DDA2  
43  
DDA3  
37  
DDA4  
32  
DDD3  
15  
DDD5  
23  
1
2
RFSUMP  
RF DATA PROCESSING  
39  
RFP  
RFN  
RFSUMN  
VARIABLE  
GAIN STAGES  
40  
MULTIPLEXER  
4
A to D  
OPUREF  
5
TZA1035HL  
36  
35  
34  
33  
OA  
OB  
OC  
OD  
S1  
8
SERVO SIGNAL PROCESSING  
A
4
9
B
3-BEAM  
TRACKING  
10  
11  
3
C
30  
29  
D
DPD  
SELECT; SWAP  
S1 S2  
E
F
S2  
4
12  
28  
25  
OPUREF  
OCENTRAL  
FTC  
PUSH-PULL  
OFFSET  
COMPENSATION  
FTC  
27  
47  
FTCREF  
20  
21  
V
DDL  
COP  
COM  
VOLTAGE AND  
CURRENT  
REFERENCES  
DUAL  
LASER  
SUPPLY  
44  
REXT  
22  
FTC  
COO  
COMPARATOR  
46  
45  
CDMI  
CDLO  
LASER 1  
LASER 2  
SERIAL  
INTERFACE  
7
DVDMI  
DVDLO  
48  
14  
26  
TM  
TDO  
6
42  
41  
31  
19  
16  
SIDA  
17  
SICL  
18  
SILD  
MCE104  
V
V
V
V
V
SSD  
SSA1  
SSA2  
SSA3  
SSA4  
Fig.1 Block diagram.  
6
2003 Jun 03  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
6
PINNING  
SYMBOL  
PIN  
DESCRIPTION  
RFSUMP  
1
positive RF sum input  
negative RF sum input  
input E  
RFSUMN  
E
2
3
F
4
input F  
VDDA1  
VSSA1  
DVDMI  
A
5
analog supply voltage 1 (RF input stage)  
6
analog ground 1  
7
input signal from DVD laser monitor diode  
8
input A  
B
9
input B  
C
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
input C  
D
input D  
OPUREF  
n.c.  
reference input from Optical Pick-Up (OPU)  
not connected  
TM  
test mode input (factory test only)  
VDDD3  
SIDA  
SICL  
SILD  
VSSD  
COP  
COM  
COO  
VDDD5  
n.c.  
digital supply voltage (serial interface 3 V I/O pads and FTC comparator)  
serial host interface data input  
serial host interface clock input  
serial host interface load  
digital ground  
positive FTC comparator input  
inverting FTC comparator input  
FTC comparator output  
digital supply voltage (5 V digital core)  
not connected  
FTC  
fast track count output  
TDO  
FTCREF  
OCENTRAL  
S2  
test data output (factory test only)  
FTC reference input  
test pin for offset cancellation  
servo current output 2 for radial tracking  
servo current output 1 for radial tracking  
analog ground 4  
S1  
VSSA4  
VDDA4  
OD  
analog supply voltage 4 (servo signal processing)  
servo current output for focus D  
servo current output for focus C  
servo current output for focus B  
servo current output for focus A  
analog supply voltage 3 (RF output stage)  
DC reference input for RF channel common mode output voltage  
positive RF output  
OC  
OB  
OA  
VDDA3  
RFREF  
RFP  
RFN  
negative RF output  
2003 Jun 03  
7
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
VSSA3  
PIN  
DESCRIPTION  
41  
42  
43  
44  
45  
46  
47  
48  
analog ground 3  
analog ground 2  
VSSA2  
VDDA2  
REXT  
CDLO  
CDMI  
VDDL  
analog supply voltage 2 (internal RF data processing)  
reference current input (connect via 12.1 kto VSSA4  
)
CD laser output  
input signal from CD laser monitor diode  
laser supply voltage  
DVDLO  
DVD laser output  
36  
1
2
OA  
OB  
OC  
RFSUMP  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
RFSUMN  
3
E
F
4
OD  
V
V
5
DDA1  
DDA4  
V
V
SSA4  
6
SSA1  
TZA1035HL  
7
DVDMI  
S1  
S2  
8
A
9
B
OCENTRAL  
FTCREF  
TDO  
C
D
10  
11  
12  
OPUREF  
FTC  
MGW551  
Fig.2 Pin configuration.  
8
2003 Jun 03  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
7
FUNCTIONAL DESCRIPTION  
RF data processing  
When it is not possible to have a DC connection between  
the TZA1035HL and the decoder, the signals on servo  
outputs OA to OD can be used as they contain the same  
LP-filtered and DC coupled information.  
7.1  
The RF data path is a fully DC-coupled, multi-stage  
amplifier (see Fig.3). The input signal for data can be  
selected from RF inputs A to D or from the summed  
RF inputs RFSUMP and RFSUMN. Switching between the  
two sets of signals is performed by an internal multiplexer.  
The signals are fully balanced internally to improve signal  
quality and reduce power supply interference.  
Summing of the photodiode signals A to D is performed in  
the second amplifier stage G2. Each individual diode  
channel can be switched on, off or inverted with switches  
SW-A to SW-D.  
Switching between photodiode signals and RFSUM input  
is performed immediately before the third amplifier  
stage G3. This stage has a variable gain with fine  
resolution to allow automatic gain adjustment to be  
controlled by the decoder.  
RF outputs RFP and RFN can be DC coupled to the  
Analog-to-Digital Converter (ADC) of the decoder.  
The RF input signals are from photodiodes and have  
a large DC content by nature. This DC component must be  
removed from the signals for good system performance.  
Built-in DACs, located after the input stages  
The filter stage limits the bandwidth according to the  
maximum playback speed of the disc. This is to optimize  
the noise performance. The filter stage consists of an  
equalizer and a noise filter, both of which can be  
bypassed, also the boost factor of the equalizer can be set.  
The corner frequencies of the equalizer and noise filter are  
equal and can be programmed to a 7-bit resolution.  
G1 and RFSUM, have the ability to do this. The DAC range  
and resolution is scaled with the gain setting of the first  
amplifier stage. When the DC content is removed, the  
RF signal can be DC coupled to the decoder. The main  
advantage of DC coupling is fast recovery from signal  
swings due to disc defects since there is no AC coupling  
capacitance to slow the recovery. When using DC  
coupling, both AC and DC content in the data signal is  
known. The Philips Iguana decoders have on-chip control  
loops to support Automatic Gain Control (AGC) and DC  
cancellation.  
The RF output signals RFP and RFN can be DC coupled  
to a decoder with a differential input pair (as with Philips  
Iguana decoders). The common mode output voltage can  
be set externally at pin RFREF.  
The signals for differential phase detection are tapped  
from the inputs A to D at the RF amplifier G1 stages.  
DC cancellation for the A to D and RFSUM signal paths  
can be set independently or simultaneously.  
Two separate DACs are available for cases where the left  
and right side DC conditions can be different.  
2003 Jun 03  
9
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ahdnbok,uflapegwidt  
RFREF  
38  
RFSUM  
1
2
RFSUMP  
RFSUMN  
RF  
OFFSS  
12  
8
OPUREF  
SW-A  
G
39  
40  
1
RFP  
RFN  
A
RF  
outputs  
NOISE  
FILTER  
G
EQUALIZER  
TZA1035HL  
DPD  
3
DPD-A  
RF  
OFFSL  
SW-B  
G
9
1
B
C
DPD-B  
SW-C  
RF  
inputs  
G
2
G
1
10  
DPD-A  
DPD-D  
DPD-C  
DPD-B  
30  
29  
servo  
radial  
S1  
S2  
FILTER  
DOC  
DPD-C  
OFFSR  
SW-D  
outputs  
RF  
central aperture signal  
G
1
11  
D
DPD-D  
MCE105  
Fig.3 RF data and DPD processing.  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
7.2  
Servo signal processing  
The photodiode configurations and naming conventions  
are shown in Figs 4 and 5.  
left  
handbook, halfpage  
7.2.1  
SERVO SIGNAL PATH SET-UP  
tangential direction  
A block diagram of the servo signal path is shown in Fig.6.  
In general, the servo signal path comprises:  
right  
A voltage-to-current converter with programmable offset  
voltage source VLFOFFS that is common to all inputs  
MGW554  
A
B C  
D
A 4-bit DAC for each of the six channels to compensate  
for offset per channel  
Data = A + B + C + D  
Push-pull = A D  
Focus = C B  
A variable gain stage to adapt the signal level to the  
specific pick-up and disc properties  
Low-pass filtering and output stage for the photodiode  
current signals  
DPD2 = phase (A, D)  
DPD4 not applicable  
Error output stage in the radial data path for fast track  
counting.  
Fig.5 Foucault diode configuration.  
Servo output signals OA to OD, S1 and S2 are unipolar  
current signals which represent the low-pass filtered  
photodiode signals. In DPD radial tracking, the S1 and S2  
signals are the equivalent of the satellite signals commonly  
found in traditional CD systems.  
7.2.2  
FOCUS SERVO  
Focus information is reflected in the four outputs  
OA to OD. Gain and offset can be programmed.  
The servo output signals OA to OD, S1 and S2 are set to  
3-state if bit RFonly = 1 (register 13, bit 11).  
For optical pick-ups where only channels B and C are  
used for focus, channels A and D can be switched off  
(bit Focus_mode = 0).  
handbook, halfpage  
For initial alignment, a copy of the output currents can be  
made available on pin OCENTRAL.  
A
B
C
left  
tangential direction  
7.2.3  
RADIAL SERVO  
right  
D
MGW553  
Radial information can be obtained from the two output  
signals S1 and S2, and the gain and offset can be  
programmed. The TZA1035HL provides differential phase  
detection, push-pull and three-beam push-pull for radial  
tracking. The signal FTC is made available for fast track  
counting and is primarily the voltage error signal derived  
from signals S1 or S2.  
Data = A + B + C + D  
Push-pull = (A + B) (C + D)  
Focus = (A + C) (B + D)  
DPD2 = phase (A + B, C + D)  
DPD4 = phase (A,D) + phase (C,B)  
The polarity of the radial loop can be reversed via the serial  
control bus (RAD_pol).  
Fig.4 Astigmatic diode configuration.  
2003 Jun 03  
11  
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ahdnbok,uflapegwidt  
25  
27  
30  
FTC  
FTC  
DPD  
8
MUX  
FTCREF  
S1  
26k  
14k  
A
B
C
D
E
F
V
/
I
MUX  
SWAP  
G
α
LFR  
LFR  
C
C
C
C
R
R
OFFSA  
servo  
radial  
outputs  
9
30k  
V
/
I
29  
14k  
G
S2  
2α  
OFFSB  
10  
11  
3
30k  
CA  
V
/
I
14k  
36  
35  
34  
33  
RF  
inputs  
G
OA  
OB  
OC  
OD  
OFFSC  
LFC  
LFC  
LFC  
LFC  
30k  
V
/
I
14k  
G
G
G
OFFSD  
servo  
focus  
outputs  
15k  
V
/
I
OFFSE  
4
15k  
V
/
I
OFFSF  
V
LFOFFS  
28  
TZA1035HL  
OCENTRAL  
F
OCENTRAL  
OFFS  
12  
LF  
OPUREF  
OFFS  
MCE106  
Fig.6 Servo signal path.  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
7.2.4  
DIFFERENTIAL PHASE DETECTION  
in a three-spot optical system with Three-Beam Push-Pull  
(TBPP). The built-in multiplexer gives a flexible method of  
dealing with many detector arrangements. For push-pull,  
the input signals are taken from channels A to D. There is  
also a command that switches off channels B and C,  
leaving channels A and D for push-pull  
The TZA1035HL provides differential phase detection to  
support DVD in various ways:  
DPD2 with four channels programmed to be active gives  
DPD as required in the standard specification  
(bits RT_mode[2:0]).  
Two of the four channels can be excluded from the DPD  
for pick-ups with an alternative photodiode arrangement  
For TBPP, the input signal is taken from channels E and F,  
irrespective of bit RFSUM setting.  
An increase in performance, dedicated for DVD+RW,  
can be obtained by using the DPD4 method. Then two  
truly separated phase detectors are active. After the  
phase detection of the two input pairs the result is  
summed.  
7.2.4.3  
Enhanced push-pull (dynamic offset  
compensation for beam landing)  
This option cancels offsets due to beam landing. A factor α  
can be programmed to re-balance the signal gain between  
channels S1 and S2. In a simplified form this can be  
described as:  
Input signals for DPD are taken from input pins A to D after  
the first gain stage G1 (see Fig.3). Pre-emphasis is applied  
by means of a programmable lead/lag filter. Additionally, a  
programmable low-pass filter is available to improve the  
signal quality under noisy signal conditions at lower  
speeds. For further signal improvements the DPD pulse  
stretcher can be programmed to higher values at lower  
speeds.  
S1 = ALFR × α × input left  
S2 = ALFR × (2 α) × input right.  
Factor α can be programmed in a range from 0.6 to 1.35,  
with 1.0 as the balanced condition (bits α[3:0]).  
The DPD signal is low-pass filtered by two internal  
capacitors. The signal is then fed to pins S1 and S2, or  
directed via the drop-out concealment circuit to the outputs  
(see Section 7.5).  
7.2.4.4  
Offset compensation  
A provision is made to compensate electrical offset from a  
light pen. The offset voltage from the light pen can be  
positive or negative. In general, the offset between any two  
channels is smaller than the absolute offsets. As negative  
input signals cannot be handled by the TZA1035HL  
internal servo channels, a two-step approach is adopted:  
7.2.4.1  
Drop-out concealment  
A special function is built in for compatibility with drop-out  
detection strategies, based on level detection in the  
S1 and S2 signals. When using DPD in a fundamental  
way, there is no representation of mirror level information  
from the light pen.  
A coarse DAC, common to all the input channels, adds  
an offset that shifts the input signals in positive direction  
until all inputs are 0. The DAC used (LFOFFS) has a  
2-bit resolution (bits LFOFF[1:0]).  
When the drop-out concealment function is enabled  
(bit DOCEN = 1), a portion of the Central Aperture (CA)  
signal is added to S1 and S2. Also, when the CA signal  
drops below the DOC threshold, the DPD signal is  
gradually attenuated.  
A fine setting per channel is provided to cancel the  
remainder of the offset between the channels. This is  
achieved by DACs subtracting the DC component from  
the signals and bringing the inputs to approximately zero  
offset (within 1 mV). The DACs (registers 11 to 13)  
have a 4-bit resolution.  
The DPD detection cannot work properly when the input  
signal becomes very small. The output of the DPD may  
then show a significant offset. The DOC may not conceal  
this offset completely because:  
The range of both DACs can be increased by a factor of  
three to compensate for higher offset values by means of  
control parameter bit SERVOOS.  
DOC is gradually controlled from the CA signal  
With a switched-off laser, the result of the offset  
cancellation can be observed at each corresponding  
output pin, OA to OD, S1 and S2, or via a built-in  
multiplexer to pin OCENTRAL (central channels only).  
See registers 11 to 13 for DAC and multiplexer control.  
The CA signal may not become 0 during disc-defect.  
For details see Section 7.5.5.2  
7.2.4.2  
Push-pull and three-beam push-pull  
The TZA1035HL can also provide radial information by  
means of push-pull signals (from the photodiode inputs) or  
2003 Jun 03  
13  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
7.2.5  
AUTOMATIC DUAL LASER SUPPLY  
7.2.7  
COMPATIBILITY WITH TZA1033HL/V1  
The TZA1035HL can control the output power of two  
lasers; it has an Automatic Laser Power Control (ALPC)  
that stabilizes the laser output power and compensates  
the effects of temperature and ageing of the laser.  
7.2.7.1  
Software compatibility  
The TZA1035HL is highly software compatible with the  
TZA1033HL/V1. Provided that some conditions are met,  
the software the TZA1035HL can be used as a successor  
with just minor modifications. This compatibility is  
achieved with the implementation of the TZA1035HL  
mode control bit (bit K2_Mode). When bit K2_Mode = 0,  
the TZA1035HL will act as a TZA1033HL/V1. When  
bit K2_Mode = 1, the TZA1035HL will act as a  
ALPC automatically detects if there is a P-type or N-type  
monitor diode in use in either of the laser circuits. The  
regulation loop formed by the ALPC, the laser, the monitor  
diode and the associated adjustment resistor will settle at  
the monitor input voltage. The monitor input voltage can be  
programmed to HIGH (180 mV) or LOW (150 mV),  
according to frequently-used pre-adjustments of the light  
pen. This set point can be set independently for both  
ALPCs. Bandwidth limitation and smooth switch-on  
behaviour is realized using an internal capacitor.  
TZA1033HL/K2 and the new functions will be available  
(but require a software update).  
Other conditions or restrictions are:  
Register bits of the TZA1035HL which were not defined  
are programmed to a logic 0. Registers 9, 10, 14 and 15  
may be left undefined  
A protection circuit is included to prevent laser damage  
due to dips in laser supply voltage VDDL. If a supply voltage  
dip occurs, the output can saturate and restrict the  
required laser current. Without the protection circuit, the  
ALPC would try to maximize the output power with  
destructive results for the laser when the supply voltage  
recovers. The protection circuit monitors the supply  
voltage and shuts off the laser when the voltage drops  
below a safe value. The ALPC recovers automatically after  
the dip has passed.  
The G4 stage high gain setting of the TZA1033HL/V1 is  
not available in the TZA1035HL; if this value was set to  
logic 0, there will be no difference  
When bit K2_Mode = 0 the RF bandwidth will be fixed to  
the minimum value of 10 MHz (typical); bit K2_Mode = 1  
to select a higher bandwidth; the bandwidth is now lower  
than using a TZA1033HL/V1.  
7.2.7.2  
Hardware compatibility  
Only one laser can be activated at the same time.  
An internal break-before-make circuit ensures safe  
start-up for the laser when a toggle situation between the  
two lasers is detected. When both lasers are programmed  
on, neither laser will be activated.  
The package is changed from LQFP64 for the TZA1033HL  
to LQFP48 for the TZA1035HL.  
The hardware differences are:  
Input pins STB, HEADER and LAND of the TZA1033HL  
are not present  
7.2.6  
POWER-ON RESET AND GENERAL POWER ON  
Input pins CD of TZA1033HL/V1 are not used;  
TZA1035HL has RFSUM inputs instead; the RFSUM  
inputs of TZA1035HL may be connected to ground  
when not used.  
When the supply voltage is switched on, bit PWRON is  
reset by the Power-On Reset (POR) signal. This  
concludes in a STANDBY mode at power up. POR is  
intended to prevent the lasers being damaged due to  
random settings. All other functions may be switched when  
power is on. The TZA1035HL becomes active when  
bit PWRON = 1.  
2003 Jun 03  
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Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
7.2.8  
INTERFACE TO THE SYSTEM CONTROLLER  
should go uniquely with the SILD signal. When  
SILD = HIGH, the TZA1035HL will not respond to any  
signal on SIDA or SICL.  
Programming the registers of TZA1035HL is done via a  
serial bus (see Fig.7). The circuitry is formed by a serial  
input shift register and a number of registers that store the  
data. The registers can always be programmed,  
irrespective of STANDBY mode.  
During a transmission, the serial data is first stored in an  
input shift register. At the rising edge of SILD, the content  
of the input register is copied into the addressed register.  
This is also the moment the programmed information  
becomes effective.  
If required, the bus lines can be connected in parallel with  
an I2C-bus. The protocol needs no switching of the data  
line during SICL = HIGH. This means that other I2C-bus  
devices will not recognise any START or STOP  
The input pins have CMOS compatible threshold levels for  
both 3.3 and 5 V supplies.  
commands. Control words addressed to TZA1035HL  
SICL  
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 A0 A1 A2 A3  
D0 D1 D2 D3 D4  
A1 A2 A3  
SIDA  
SILD  
t
load(H)  
MGW496  
Fig.7 Two word transmission.  
7.3  
Control registers  
The TZA1035HL is controlled by serial registers. To keep programming fast and efficient, the control bits are sent in 16-bit  
words. Four bits of the word are used for the address and for each address there are 12 data bits.  
Table 1 Overview of control parameters  
SYMBOL  
Data path  
PARAMETER  
VALUES  
REGISTER  
BITS  
G1 (A1)  
G2 (A2)  
G3 (A3)  
GRFSUM  
gain of first RF amplifier stage 0, 6 and 12 dB (1×, 2× and 4×)  
(or linear amplification)  
3
3
11 and 10  
9 and 8  
7 to 4  
gain of second RF amplifier  
stage (or linear amplification)  
6, 12, 18 and 24 dB (2×, 4×, 8× and 16×)  
0 to 13 dB in steps of 0.8 dB (1× to 4×)  
gain of third RF amplifier  
3
stage (or linear amplification)  
gain of RFSUM input stage (or 6, 0, 6, 12 and 18 dB  
0
7 to 5  
(ARFSUM  
)
linear amplification)  
(0.5×, 1×, 2×, 4× and 8×)  
BWRF  
bandwidth limitation in  
RF path  
f0(RF) = 12 to 145 MHz  
14  
6 to 0  
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Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
RFOFFSL  
PARAMETER  
VALUES  
REGISTER  
BITS  
DC offset compensation in left RFSUM = 0; full range depends on  
4
11 to 6  
RF input path  
G1 setting:  
G1 = 0 dB: 0 to 450 mV in 7.1 mV steps  
G1 = 6 dB: 0 to 225 mV in 3.6 mV steps  
G1 = 12 dB: 0 to 120 mV in 1.9 mV steps  
RFOFFSR  
DC offset compensation in  
right RF input path  
RFSUM = 0; full range depends on  
G1 setting:  
4
5 to 0  
5 to 0  
G1 = 0 dB: 0 to 450 mV in 7.1 mV steps  
G1 = 6 dB: 0 to 225 mV in 3.6 mV steps  
G1 = 12 dB: 0 to 120 mV in 1.9 mV steps  
RFOFFSS  
DC offset compensation in  
RFSUM path  
RFSUM = 1; full range depends on  
GRFSUM setting:  
4 or 5  
GRFSUM = 6 dB; 0 to 1700 mV  
GRFSUM = 0 dB; 0 to 850 mV  
GRFSUM = 6 dB; 0 to 425 mV  
GRFSUM = 12 dB; 0 to 210 mV  
GRFSUM = 18 dB; 0 to 105 mV  
Servo radial path  
LFOFFS  
DC offset compensation for  
LF path (common for all servo  
inputs)  
SERVOOS = 0:  
11  
11 and 10  
V
LFOFFS = 0, 5, 10 or 15 mV  
SERVOOS = 1:  
LFOFFS = 0, 15, 30 or 45 mV  
V
RLFR  
CD satellite path input  
transresistance  
15 kfixed  
RLFPP  
ROFFSE  
DVD push-pull signal  
transresistance  
30 kfixed  
DC offset compensation for  
radial servo path (input E)  
SERVOOS = 0: VROFFSE = 0 to 20 mV  
SERVOOS = 1: VROFFSE = 0 to 60 mV  
SERVOOS = 0: VROFFSF = 0 to 20 mV  
SERVOOS = 1: VROFFSF = 0 to 60 mV  
α = 0.6 to 1.35 in 15 steps of 0.05  
11  
7 to 4  
ROFFSF  
DC offset compensation for  
radial servo path (input F)  
11  
3 to 0  
α
dynamic radial offset  
compensation factor  
6
1
3 to 0  
5
I(FS)(DPD),  
I(FS)(DPD)(DOC)  
full scale DPD current, fixed  
value based on bandgap  
voltage across external  
resistor  
DOCEN = 0: fixed value = 20 µA  
DOCEN = 1: fixed value = 6.6 µA  
IREFRAD(CM)  
internally generated common 3.5 µA fixed  
mode DC reference current in  
DPD mode  
fstart_DPD  
start frequency lead/lag filter  
of DPD block  
fstart_DPD = 1, 5 or 10 MHz  
(TZA1033HL/V1 compatible)  
start_DPD = 1, 5, 10, 18 or 24 MHz  
7
1 and 0  
5 to 3  
f
15  
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Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
GLFR (ALFR  
PARAMETER  
VALUES  
REGISTER  
BITS  
)
low frequency gain, radial path 15 to +9 dB in steps of 3 dB  
6
11 to 8  
output stage (or linear  
amplification)  
(0.18× to 2.8×)  
RFTC  
gain of fast track count output 680 kΩ ±20% fixed for ±2 V (p-p)  
Servo focus path  
RLFC  
LF path input transresistance 14 kfixed  
COFFSA  
DC offset compensation for  
central servo path A  
SERVOOS = 0: 0 to 20 mV  
SERVOOS = 1: 0 to 60 mV  
SERVOOS = 0: 0 to 20 mV  
SERVOOS = 1: 0 to 60 mV  
SERVOOS = 0: 0 to 20 mV  
SERVOOS = 1: 0 to 60 mV  
SERVOOS = 0: 0 to 20 mV  
SERVOOS = 1: 0 to 60 mV  
12  
7 to 4  
COFFSB  
COFFSC  
COFFSD  
DC offset compensation for  
central servo path B  
12  
13  
13  
6
3 to 0  
7 to 4  
3 to 0  
7 to 4  
DC offset compensation for  
central servo path C  
DC offset compensation for  
central servo path D  
GLFC (ALFC  
)
low frequency gain, central  
path output stage (or linear  
amplification)  
15 to +9 dB in steps of 3 dB  
(0.18× to 2.8×)  
β
focus offset compensation  
β = 0 to 31  
2
2
4 to 0  
10  
32  
FOFFSEN  
full range offset compensation DAC enabled: IFOFFS = 400 nA (fixed)  
for focus  
DAC disabled: IFOFFS = 0 nA  
7.3.1  
REGISTER 0: POWER CONTROL  
Table 2 Register address 0H  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
GRF  
SUM2  
GRF  
SUM1  
GRF  
SUM0  
DVD_ MILVL CD_MILVL DVD_ LDON CD_LDON  
PWRON  
SYMBOL  
Table 3 Description of register bits (address 0H)  
BIT SYMBOL  
15 to 12 AD[3:0]  
FUNCTION  
0000 = address 0H  
not used  
11 to 8  
7 to 5  
GRFSUM[2:0]  
Gain of RFSUM input stage.  
000 = 6 dB  
001 = 0 dB  
010 = 6 dB  
011 = 12 dB  
100 = 18 dB  
4
DVD_MILVL  
DVD monitor input level. 0 = 150 mV; 1 = 180 mV.  
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Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
BIT  
SYMBOL  
CD_MILVL  
FUNCTION  
3
2
1
0
CD monitor input level. 0 = 150 mV; 1 = 180 mV.  
DVD laser on. 0 = laser off; 1 = laser on.  
CD laser on. 0 = laser off; 1 = laser on.  
DVD_LDON  
CD_LDON  
PWRON  
Power on. 0 = STANDBY mode; 1 = power on.  
7.3.2  
REGISTER 1: SERVO AND RF MODES  
Table 4 Register address 1H  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
DPD_DCC  
RAD_pol  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
DOCEN  
Focus_  
mode  
RT_mode2 RT_mode1 RT_mode0  
RFSUM  
SYMBOL  
Table 5 Description of register bits (address 1H)  
BIT SYMBOL  
15 to 12 AD[3:0]  
FUNCTION  
0001 = address 1H  
11  
DPD_DCC  
RF offset DAC for DPD signal control. 0 = DAC controlled by register 4,  
bits RFOFFSL[5:0]; 1 = DAC controlled by register 5, bits RFOFFSS[5:0].  
10 and 9  
not used  
8
RAD_pol  
Radial polarity switch. 0 = inverse; 1 = normal (default).  
not used  
7 and 6  
5
4
DOCEN  
Focus_mode  
Drop-out concealment enable. 0 = disable; 1 = enable.  
Focus mode. 0 = two-channel focus (channels B and C only); 1 = four-channel  
focus.  
3 to 1  
RT_mode[2:0]  
Radial tracking mode.  
000 = DPD2; DPD = phase (A,D)  
001 = push-pull; channels A,D only  
100 = DPD2; DPD = phase (A + C, B + D)  
101 = push-pull; four channels  
110 = DPD4; DPD = phase (A,D) + phase (C,B)  
X11 = TBPP channels E and F  
0
RFSUM  
RF channel selection. 0 = diode inputs selected; 1 = RFSUM input selected.  
2003 Jun 03  
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Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
7.3.3  
REGISTER 2: FOCUS OFFSET DAC  
Table 6 Register address 2H  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
K2_Mode  
FOFFSEN  
β4  
β3  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
β2  
β1  
β0  
SYMBOL  
Table 7 Description of register bits (address 2H)  
BIT SYMBOL  
15 to 12 AD[3:0]  
FUNCTION  
0010 = address 2H  
K2 mode. 0 = disable; 1 = enable.  
Focus offset enable. 0 = enable; 1 = disable.  
11  
10  
K2_Mode  
FOFFSEN  
β[4:0]  
9 to 5  
4 to 0  
Focus offset compensation. 00000 to 11111: β = 0 to β = 3132.  
not used  
7.3.4  
REGISTER 3: RF PATH GAIN  
Table 8 Register address 3H  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
G11  
G10  
G21  
G20  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
G33  
G32  
G31  
G30  
SYMBOL  
Table 9 Description of register bits (address 3H)  
BIT SYMBOL  
FUNCTION  
15 to 12 AD[3:0]  
11 and 10 G1[1:0]  
0011 = address 3H  
First RF amplifier stage gain.  
00 = 0 dB  
01 = 6 dB  
10 = 12 dB  
11 = not used  
9 and 8 G2[1:0]  
Second RF amplifier stage gain.  
00 = 6 dB  
01 = 12 dB  
10 = 18 dB  
11 = 24 dB  
7 to 4  
3 to 0  
G3[3:0]  
Third RF amplifier stage gain. 0000 to 1111: 0 to 13 dB in 0.8 dB steps.  
not used  
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Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
7.3.5  
REGISTER 4: RF LEFT AND RIGHT, OR SUM OFFSET COMPENSATION  
Table 10 Register address 4H  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
RFOFFSL5  
RFOFFSL  
4
RFOFFSL  
3
RFOFFSL2  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
RFOFFSL1 RFOFFSL  
0
RFOFFSR5/ RFOFFSR4/ RFOFFSR3/ RFOFFSR2/ RFOFFSR1/ RFOFFSR0/  
RFOFFSS RFOFFSS RFOFFSS RFOFFSS RFOFFSS RFOFFSS  
SYMBOL  
5
4
3
2
1
0
Table 11 Description of register bits (address 4H)  
BIT SYMBOL  
FUNCTION  
15 to 12 AD[3:0]  
0100 = address 4H  
Left channel RF offset compensation definition.  
11 to 6 RFOFFSL[5:0]  
bit RFSUM = 0: left RF channel offset compensation value  
bit RFSUM = 1: not used  
5 to 0  
RFOFFSR[5:0]  
Right channel RF offset compensation definition.  
bit RFSUM = 0: right RF channel offset compensation value (symbol is RFOFFSR  
bit RFSUM = 1 and bit DPD_DCC = 1: not used  
)
bit RFSUM = 1 and bit DPD_DCC = 0: the decoder controls DPD and RFSUM  
channels automatically, in parallel and with same values (symbol is RFOFFSS).  
7.3.6  
REGISTER 5: RF SUM OFFSET COMPENSATION  
Table 12 Register address 5H  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
RFOFFSS5  
RFOFFSS  
4
RFOFFSS  
3
RFOFFSS  
2
RFOFFSS  
1
RFOFFSS0  
SYMBOL  
Table 13 Description of register bits (address 5H)  
BIT SYMBOL  
15 to 12 AD[3:0]  
FUNCTION  
0101 = address 5H  
not used  
11 to 6  
5 to 0  
RFOFFSS[5:0]  
RF offset compensation definition  
bit RFSUM = 0: not used  
bit RFSUM = 1 and bit DPD_DCC = 0: not used  
bit RFSUM = 1 and bit DPD_DCC = 1: the decoder controls RFSUM channels;  
the DPD channels can be set independently from the microprocessor.  
2003 Jun 03  
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Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
7.3.7  
REGISTER 6: SERVO GAIN AND DYNAMIC RADIAL OFFSET COMPENSATION FACTOR  
Table 14 Register address 6H  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
GLFR3  
GLFR2  
GLFR1  
GLFR0  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
GLFC3  
GLFC2  
GLFC1  
GLFC0  
α3  
α2  
α1  
α0  
SYMBOL  
Table 15 Description of register bits (address 6H)  
BIT SYMBOL  
FUNCTION  
15 to 12 AD[3:0]  
11 to 8 GLFR[3:0]  
0110 = address 6H  
Low frequency gain, radial path output stage. 0000 to 1000: 15 to +9 dB  
in 3 dB steps.  
7 to 4  
3 to 0  
G
LFC[3:0]  
Low frequency gain, central path output stage. 0000 to 1000: 15 to +9 dB  
in 3 dB steps.  
α[3:0]  
Dynamic radial offset compensation factor. 0000 to 1111: 0.60 to 1.35  
in 0.05 steps; 1000 = balanced value (default).  
7.3.8  
REGISTER 7: SERVO PATH GAIN AND BANDWIDTH AND RF PATH BANDWIDTH AND PRE-EMPHASIS  
Definitions in register 7 are intended mainly for software compatibility with the TZA1033HL/V1. New features that require  
more bit-space to program are moved to registers 14 and 15. Only DPD stretch remains programmed in register 7. Some  
parameters are slightly modified.  
Table 16 Register address 7H  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
DPDLPF1  
DPDLPF0  
DPD_  
stretch2  
DPD_  
stretch1  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
DPD_ DPD_  
stretch0 testmode  
DVDALAS_  
mode  
EQRF2  
EQRF  
1
EQRF  
0
fstart_DPD  
1
fstart_DPD0  
SYMBOL  
Table 17 Description of register bits (address 7H)  
BIT SYMBOL  
FUNCTION  
K2_Mode = 0  
K2_Mode = 1  
15 to 12 AD[3:0]  
0111 = address 7H  
DPD low-pass filter.  
0111 = address 7H  
not applicable  
11 and 10 DPDLPF[1:0]  
0X : B3db = 50 MHz (equivalent to TZA1023)  
1X : B3db = 10 MHz  
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Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
FUNCTION  
BIT  
SYMBOL  
K2_Mode = 0  
DPD pulse stretcher (tP).  
000 = 1.9 ns  
K2_Mode = 1  
9 to 7  
DPD_stretch [2:0]  
DPD pulse stretcher (tP).  
000 = 30 ns  
001 = 3.8 ns (equivalent to TZA1023)  
010 = 7.5 ns  
001 = 15 ns  
010 = 7.5 ns  
011 = 15 ns  
011 = 3.8 ns  
100 = 30 ns  
100 = 1.9 ns  
101 = not used  
101 = 1.2 ns  
6
5
DPD_ testmode  
For factory test purposes only.  
For factory test  
purposes only.  
DVDALAS_ mode  
DVDALAS mode bit. 0 = disables control of  
bits 11 to 6 and creates behaviour equivalent to  
TZA1023; 1 = enables DPD low-pass filter and time  
stretcher equivalent to TZA1033HL/V1.  
not applicable  
4 to 2  
EQRF[2:0]  
RF channel low-pass filter (BRF). 001 = 10 MHz  
not applicable  
not applicable  
1 and 0  
fstart_DPD[1:0]  
Start frequency lead/lag filter, DPD block.  
00 = 1 MHz  
01 = 5 MHz  
10 = 10 MHz  
11 = not used  
7.3.9  
REGISTER 8: RF CHANNEL SELECTION  
Table 18 Register address 8H  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
SW-Dmute SW-Dinv  
SW-Cmute  
SW-Cinv  
SW-Bmute  
SW-Binv  
SW-Amute  
SW-Ainv  
SYMBOL  
Table 19 Description of register bits (address 8H)  
BIT SYMBOL  
15 to 12 AD[3:0]  
FUNCTION  
1000 = address 8H.  
not used  
0 = pass D signal; 1 = mute D signal.  
11 to 8  
7
6
5
4
3
SW-Dmute  
SW-Dinv  
SW-Cmute  
SW-Cinv  
SW-Bmute  
0 = pass D signal with no inversion; 1 = pass D signal with inversion.  
0 = pass C signal; 1 = mute C signal.  
0 = pass C signal with no inversion; 1 = pass C signal with inversion.  
0 = pass B signal; 1 = mute B signal.  
2003 Jun 03  
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Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
BIT  
SYMBOL  
SW-Binv  
FUNCTION  
2
1
0
0 = pass B signal with no inversion; 1 = pass B signal with inversion.  
0 = pass A signal; 1 = mute A signal.  
SW-Amute  
SW-Ainv  
0 = pass A signal with no inversion; 1 = pass A signal with inversion.  
7.3.10 REGISTER 11: RADIAL SERVO OFFSET CANCELLATION  
Table 20 Register address BH  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
LFOFFS1  
LFOFFS  
0
SERVOOS  
FTCHBW  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
R
OFFSE3 ROFFSE  
2
ROFFSE  
1
ROFFSE  
0
ROFFSF  
3
ROFFSF  
2
ROFFSF  
1
ROFFSF0  
SYMBOL  
Table 21 Description of register bits (address BH)  
BIT SYMBOL  
FUNCTION  
15 to 12 AD[3:0]  
1011 = address BH  
DC offset compensation for LF path (VLFOFFS). Common for all servo inputs:  
11 and 10 LFOFFS[1:0]  
SERVOOS = 0  
00 = 0 mV  
SERVOOS = 1  
00 = 0 mV  
01 = 5 mV  
01 = 15 mV  
10 = 30 mV  
11 = 45 mV  
10 = 10 mV  
11 = 15 mV  
9
SERVOOS  
Servo offset scale (DACs ROFFSx, COFFSx and LFOFFS). 0 = normal range;  
1 = triple range.  
8
FTCHBW  
FTC bandwidth. 0 = 600 kHz (approximately); 1 = 1.2 MHz (approximately.)  
7 to 4  
ROFFSE[3:0]  
Programmable DC offset compensation for radial servo path (E input).  
SERVOOS = 0: 0 to 20 mV; bit SERVOOS = 1: 0 to 60 mV.  
3 to 0  
ROFFSF[3:0]  
Programmable DC offset compensation for radial servo path (F input).  
SERVOOS = 0: 0 to 20 mV; bit SERVOOS = 1: 0 to 60 mV.  
7.3.11 REGISTER 12: CENTRAL SERVO OFFSET CANCELLATION INPUTS A AND B  
Table 22 Register address CH  
BIT  
15  
14  
13  
12  
D11  
D10  
D9  
D8  
AD3  
AD2  
AD1  
AD0  
TSTDPDRF TSTSRV2  
TSTSRV1  
TSTSRV0  
SYMBOL  
BIT  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
C
OFFSA3 COFFSA  
2
COFFSA  
1
COFFSA  
0
COFFSB  
3
COFFSB  
2
COFFSB  
1
COFFSB0  
SYMBOL  
2003 Jun 03  
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Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
Table 23 Description of register bits (address CH)  
BIT  
SYMBOL  
FUNCTION  
15 to 12 AD[3:0]  
1100 = address CH  
11  
TSTDPDRF  
DPD RF test bit. With this bit the DPD filter performance is checked. 0 = normal  
operation; 1 = RF signal filtered by the DPD block is connected to the RF output.  
10 to 8 TSTSRV[2:0]  
Test matrix for servo signals to pin OCENTRAL.  
000 = normal operation  
001 = filter DAC current for test purposes  
011 = CA (sum A to D)  
100 = channel A  
101 = channel B  
110 = channel C  
111 = channel D  
7 to 4  
3 to 0  
C
OFFSA[3:0]  
OFFSB[3:0]  
Central servo input A offset cancellation. Bit SERVOOS = 0: 0 to 20 mV;  
bit SERVOOS = 1: 0 to 60 mV.  
C
Central servo input B offset cancellation. Bit SERVOOS = 0: 0 to 20 mV;  
bit SERVOOS = 1: 0 to 60 mV.  
7.3.12 REGISTER 13: CENTRAL SERVO OFFSET CANCELLATION INPUTS C AND D  
Table 24 Register address DH  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
RFonly  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
COFFSC  
3
COFFSC  
2
COFFSC  
1
COFFSC  
0
COFFSC  
3
COFFSC  
2
COFFSC  
1
COFFSC0  
SYMBOL  
Table 25 Description of register bits (address DH)  
BIT SYMBOL  
15 to 12 AD[3:0]  
FUNCTION  
1101 = address DH  
11  
RFonly  
Operation mode. 0 = normal operation; 1 = RF only mode (servo outputs  
OA to OD, S1 and S2 are 3-state).  
10 to 8  
7 to 4  
not used  
C
OFFSC[3:0]  
OFFSD[3:0]  
Central servo input C offset cancellation. Bit SERVOOS = 0: 0 to 20 mV;  
bit SERVOOS = 1: 0 to 60 mV.  
3 to 0  
C
Central servo input D offset cancellation. Bit SERVOOS = 0: 0 to 20 mV;  
bit SERVOOS = 1: 0 to 60 mV.  
2003 Jun 03  
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Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
7.3.13 REGISTER 14: RF FILTER SETTINGS  
Table 26 Register address EH  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
RFNFEN  
RFEQEN  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
RFKEQ BWRF6  
BWRF5  
BWRF4  
BWRF3  
BWRF2  
BWRF1  
BWRF0  
SYMBOL  
Table 27 Description of register bits (address EH); bit K2_Mode = 1  
BIT SYMBOL  
FUNCTION  
15 to 12 AD[3:0]  
1110 = address EH  
not used  
11 and 10 −  
9
8
RFNFEN  
RFEQEN  
RFKEQ  
Noise filter enable. 0 = disable; 1 = enable.  
Equalizer enable. 0 = disable; 1 = enable.  
7
Boost factor. 0 = boost factor low; 1 = boost factor high.  
Bandwidth limitation in RF path. 000 0000 to 111 1111: f0(RF) = 12 to 145 MHz.  
6 to 0  
BWRF[6:0]  
7.3.14 REGISTER 15: DPD FILTER SETTINGS  
Table 28 Register address FH  
BIT  
15  
14  
13  
12  
11  
10  
9
8
AD3  
AD2  
AD1  
AD0  
SYMBOL  
BIT  
7
6
5
4
3
2
1
0
DPD_LL2  
DPD_LL1  
DPD_LL0  
DPD_LPF2 DPD_LPF1 DPD_LPF0  
SYMBOL  
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Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
Table 29 Description of register bits (address FH); bit K2_Mode = 1  
BIT  
SYMBOL  
FUNCTION  
15 to 12 AD[3:0]  
1111 = address FH  
not used  
11 to 6  
5 to 3  
DPD_LL[2:0]  
DPD lead/lag filter start frequency (fstart).  
000 = 1 MHz  
001 = 5 MHz  
010 = 10 MHz  
011 = 18 MHz  
100 = 24 MHz  
2 to 0  
DPD_LPF[2:0]  
DPD low-pass filter (f3dB).  
000 = 10 MHz  
001 = 50 MHz  
010 = 100 MHz  
011 = 180 MHz  
111 = 240 MHz  
7.4  
Internal digital control, serial bus and external  
digital input signal relationships  
7.5  
Signal descriptions  
The variables A1 to A3, ARFSUM, ALFC and ALFR, are the  
linear equivalents of G1 to G3, GRFSUM, GLFC and GLFR  
The settings of all internal switches, DACs and modes of  
operation can be programmed via the serial bus. There are  
also a few external digital signals which influence the  
programmed settings.  
.
7.5.1  
DATA PATH SIGNALS THROUGH PINS A TO D  
With bit RFSUM = 0:  
7.4.1  
STANDBY MODE  
(DVDRFP DVDRFN) =  
A2 × 1/4 × [SW-A {(A OPUREF) × A1 RFOFFSL  
}
To ensure a safe start-up, the TZA1035HL has an internal  
Power-on reset that resets on bit PWRON. During  
STANDBY mode, most circuits, including laser supplies,  
are switched off.  
+ SW-B {(B OPUREF) × A1 RFOFFSL  
+ SW-C {(C OPUREF) × A1 RFOFFSR  
+ SW-D {(D OPUREF) × A1 RFOFFSR}]  
}
}
RFP = RFREF + 0.5 × A3 × (DVDRFP DVDRFN  
)
bit CD_LDON = 1 if CD laser is on and POWERON  
bit DVD_LDON = 1 if DVD laser is on and POWERON.  
RFN = RFREF 0.5 × A3 × (DVDRFP DVDRFN  
)
Thus:  
7.4.2  
RF ONLY MODE  
RFdif  
=
The servo outputs can be disabled for easy interfacing in  
systems where two front-end signal processors are used.  
This mode will set the outputs OA to OD, S1 and S2 to  
3-state. The RF data path remains active.  
A + B + C + D  
-----------------------------------  
4
A3 × A2 × A1 ×  
OPUREF RF  
OFFS  
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High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
Switches SW-A to SW-D can be programmed 1, 1 or 0  
1
1
H n (s ) =  
×
-------------------------------------------- ----------------------  
s2  
s
(respectively pass, invert or not pass the signal) for each  
channel. In this way the data can be read by any  
combination of diode inputs.  
s
1 +  
------------  
1 +  
+
-------------- ------------  
ω 0RF  
2
ω 0RF  
ω0RF  
The first gain stage also carries the signals for DPD  
tracking. Therefore this stage will also be active when  
RFSUM input and DPD is selected. The DC offset  
cancellation is also active in this situation but left and right  
channels are controlled from a single DAC. Also in this  
situation, the A to D and RFSUM inputs are used  
simultaneously.  
The corner frequency ω0RF is equal to that of the equalizer  
filter. The noise filter is switched on with bit RFNFEN.  
7.5.4  
FOCUS SIGNALS  
Focus servo signals:  
1
OA =  
× ALFC × (A OPUREF + LFOFFS COFFSA  
)
)
------------  
R LFC  
Control of the DC offset DACs can be chosen to be from  
the same register or from two independent registers  
(registers 4 and 5).  
+ β × FOFFS  
1
R LFC  
OB =  
× ALFC × (B OPUREF + LFOFFS COFFSB  
------------  
7.5.2  
DATA SIGNAL PATH THROUGH INPUT PINS RFSUMP  
AND RFSUMN  
+ (1 − β) × FOFFS  
With bit RFSUM = 1:  
1
R LFC  
OC =  
× ALFC × (C OPUREF + LFOFFS COFFSC  
)
------------  
(DVDRFP DVDRFN) =  
ARFSUM × [RFSUMP RFSUMN RFOFFSS  
]
+ β × FOFFS  
RFP = RFREF + 0.5 × A3 × (DVDRFP DVDRFN  
)
1
OD =  
× ALFC × (D OPUREF + LFOFFS COFFSD  
)
------------  
R LFC  
+ (1 − β) × FOFFS  
RFN = RFREF 0.5 × A3 × (DVDRFP DVDRFN  
)
Thus:  
The parameter β can be programmed via the serial bus.  
RFdif = ARFSUM × [RFSUMP RFSUMN RFOFFSS  
7.5.3  
]
The focus offset DAC can be switched on with the control  
HF FILTERING  
bit FOFFSEN  
.
The differential HF signal from the G3 stage is sent to a  
filter section that consists of an equalizer and a noise filter,  
which are controlled by bits BWRF, RFKEQ, RFEQEN and  
RFNFEN. The equalizer has a transfer function H1 (s)  
which is modelled after a target transfer function He (s):  
7.5.5  
RADIAL SIGNALS  
7.5.5.1  
DPD signals (DVD-ROM mode) with no  
drop-out concealment  
DPD tracking can be activated with bits RT_mode[2:0] of  
register 1. Input signals are taken from the diode inputs  
A to D, through the input stage G1 and the DC offset  
cancellation DAC. When bit RFSUM = 0, the input stage is  
also used for the RF signal. When bit RFSUM = 1, the  
setting for G1 and DC offset control can be independent of  
the setting for the data signal which goes through RFSUM.  
t  
s2  
1 + k ×  
--------------  
2
ω0RF  
1
He(s) =  
×
------------------------------------------------------- -------------------------------  
s 2  
s
s
1 + τ ×  
------------  
1 +  
+ α ×  
------------  
---------------  
2
ω 0RF  
ω 0RF  
ω 0RF  
This represents a third-order equi-ripple phase filter with a  
good delay response. The boost factor k is programmable  
via the serial bus control bit RFKEQ. The corner  
frequency ω0RF = 2πf0RF is programmable via control  
parameter bit BWRF. The equalizer is switched on with  
control bit RFEQEN.  
S1DPD = I(FS)(DPD)  
×
+ IREFRAD  
------  
T P  
t  
S2DPD = I(FS)(DPD)  
×
+ IREFRAD  
------  
T P  
t  
is the time difference between the two input signals,  
------  
T P  
The noise filter has a transfer function H2 (s) which is  
modelled after a third-order Butterworth low-pass filter with  
target transfer function Hn (s):  
relative to the period time TP of the input signal. I(FS)(DPD)  
is the full scale range.  
2003 Jun 03  
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Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
The bandwidth of the DPD signal is limited by the 100 kHz  
phase detector integration filters and the bandwidth of the  
output stages (100 kHz for S1 and S2).  
For S1 and S2 bit RAD_pol is assumed to be set to logic 1.  
Otherwise the signals appearing at S1 and S2 will be  
swapped.  
The input signals used for DPD depend on the  
programmed radial tracking mode (bits RT_mode[2:0]):  
The DPD detection can not work properly when the input  
signal becomes very small. The output of the DPD may  
then show a significant offset. The DOC may not conceal  
this offset completely because:  
t  
------  
TP  
t  
------  
T P  
DPDmode = DPD2:  
(A,D) or DPD2:  
(A + C, B + D)  
DOC is gradually controlled from the CA signal  
The CA signal may not become 0 during disc-defect.  
t  
------  
T P  
t  
------  
T P  
DPDmode = DPD4: 0.5[  
(A,D) +  
(C,B)]  
7.5.5.3  
Three-beam push-pull (CD mode)  
t  
T P  
Range of  
is from 0.5 to + 0.5.  
------  
When the three-beam system is used, the radial signals  
S1 and S2 can be composed from inputs E and F.  
t  
T P  
> 0 if A,C phase leads with respect to D,B phase.  
E OPUREF + LFOFFS + ROFFSE  
------  
S1PP = ALFR  
×
×
----------------------------------------------------------------------------------------  
RLFR  
FTC = (S1 S2) × (RFTC + FTCREF)  
F OPUREF + LFOFFS ROFFSF  
For S1 and S2 bit RAD_pol is assumed to be set to logic 1.  
Otherwise the signals appearing at S1 and S2 will be  
swapped.  
S2PP = ALFR  
---------------------------------------------------------------------------------------  
RLFR  
FTC = (S1 S2) × RFTC + FTCREF (bandwidth limited  
to 600 kHz).  
7.5.5.2  
DPD signals (DVD-ROM mode) with  
drop-out concealment  
For S1 and S2 bit RAD_pol is assumed to be set to logic 1.  
Otherwise the signals appearing at S1 and S2 will be  
swapped.  
With bit DOCEN = 1, drop-out concealment is activated  
and the S1 and S2 outputs change:  
The common mode level (IREFRAD) is now determined by  
the CA signal  
7.5.5.4  
Enhanced push-pull  
The scaling changes.  
Top hold push-pull method is supported but only in  
conjunction with a compatible decoder. The peak hold  
function is executed in the decoder, by measuring the  
mirror levels of the gap-zones in each header. The  
TZA1035HL will compensate for offset errors in two ways:  
At low signal levels (SUM < DOCthreshold), the contribution  
t  
T P  
of  
is reduced smoothly.  
------  
The DC offset from the pick-up can be compensated by  
means of a DAC (COFFSx) in each channel  
t  
------  
T P  
S1DPD = C × I(FS)(DPD)(DOC)  
×
+ 0.25 × CA.  
+ 0.25 × CA.  
The dynamic offsets can be compensated by means of  
the multiplier ratio α.  
t  
S2DPD = C × I(FS)(DPD)(DOC)  
×
------  
T P  
The correction values must be calculated in the decoder  
and programmed via the serial bus. The method is called  
the enhanced push-pull method.  
Where:  
I(FS)(DPD)(DOC) is the full scale range  
For S1 and S2 bit RAD_pol is assumed to be set to logic 1.  
Otherwise the signals appearing at S1 and S2 will be  
swapped.  
C = concealment multiplier, C = 0 to 1 when CA is  
0 to DOCthreshold  
CA = OA + OB + OC + OD  
DOCthreshold is typically 3 µA.  
2003 Jun 03  
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Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
A + B 2 × OPUREF + 2 × LFOFFS (COFFSA COFFSB  
)
S1PP = ALFR × α ×  
------------------------------------------------------------------------------------------------------------------------------------------------------  
RLFPP  
C + D 2 × OPUREF + 2 × LFOFFS (COFFSC COFFSD  
)
S2PP = ALFR × (2 α ) ×  
-------------------------------------------------------------------------------------------------------------------------------------------------------  
RLFPP  
or:  
A OPUREF + LFOFFS C  
-------------------------------------------------------------------------O----F---F----S---A-  
RLFPP  
S1PP = ALFR × α ×  
D OPUREF + LFOFFS COFFSD  
S2PP = ALFR × (2 α ) ×  
-----------------------------------------------------------------------------------------  
RLFPP  
The signals from the B and C channels can be switched off, depending on the photodiode configuration  
(bit RT_mode[2:0]).  
2003 Jun 03  
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Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
8
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
SYMBOLS  
VDD  
PARAMETER  
supply voltage  
CONDITIONS  
MIN.  
MAX.  
5.5  
UNIT  
0
V
Tamb  
Vesd  
ambient temperature  
60  
°C  
V
electrostatic discharge  
voltage  
Human Body Model (HBM); note 1  
Machine Model (MM); note 1  
2000  
200  
V
Note  
1. ESD behaviour is tested in accordance with JEDEC II standard:  
HBM is equivalent to discharging a 100 pF capacitor through a 1.5 kseries resistor.  
MM is equivalent to discharging a 200 pF capacitor through a 0.75 µH series inductor.  
9
THERMAL CHARACTERISTICS  
SYMBOL  
Rth(j-a)  
PARAMETER  
CONDITIONS  
VALUE  
UNIT  
thermal resistance from  
junction to ambient  
in free air  
76  
K/W  
10 CHARACTERISTICS  
VDDA = 5 V; VDDD3 = 3.3 V; VDDD5 = 5 V; VRFREF = 1.2 V; Tamb = 25 °C; RF inputs A to D are referred to pin OPUREF;  
0(RF) = 50 MHz; Rext = 12.1 k(pin REXT); RF output max. load on pins RFP and RFN is ZO(max): 5 pF parallel with  
10 kto VSS; unless otherwise specified.  
f
SYMBOL PARAMETER  
Tamb ambient  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
0
60  
°C  
temperature  
Supplies  
DDA1,VDDA2, analog supply  
VDDA3, VDDA4 voltage  
V
4.5  
2.7  
4.5  
2.7  
3.3  
5.0  
3.3  
5.0  
3.3  
3.5  
5.5  
5.5  
5.5  
5.5  
3.7  
V
V
V
V
V
VDDD3  
VDDD5  
VI(logic)  
VPOR  
IDD  
3 V digital supply  
voltage  
5 V digital supply  
voltage  
logic input  
compatibility  
note 1  
Power-on reset  
voltage  
supply current  
without laser supply  
STANDBY mode  
98  
120  
1
mA  
mA  
2003 Jun 03  
30  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
RF data path, input: pins A to D and OPUREF  
Vi(OPUREF)  
Vi(RF)(FS)  
input voltage on  
pin OPUREF  
note 2  
1.5  
0.5VDDA  
V
DDA 2  
V
input voltage on  
pins A to D for  
full-scale at output  
referred to VOPUREF  
G1 = 0 dB  
600  
300  
150  
mV  
mV  
mV  
V
G1 = 6 dB  
G1 = 12 dB  
VI(DC)  
DC component of  
input voltage  
1.8  
0.5VDDA  
VDDA 1.4  
VRFOFFSL  
VRFOFFSR  
,
DC offset  
compensation  
voltage  
G1 = 0 dB  
G1 = 6 dB  
G1 = 12 dB  
G1 = 0 dB  
G1 = 6 dB  
G1 = 12 dB  
350  
175  
90  
450  
225  
120  
7.1  
3.6  
1.9  
550  
275  
160  
mV  
mV  
mV  
mV  
mV  
mV  
µA  
VRFOFFSL  
VRFOFFSR  
,
DC offset  
compensation  
voltage resolution  
II(bias)  
Zi  
ARF(min)  
ARF(max)  
input bias current  
on pins A to D  
5
input impedance of  
pins A to D  
100  
4
kΩ  
dB  
dB  
minimum gain  
G1 = 0 dB, G2 = 6 dB,  
G3 = 0 dB; note 3  
6
8
maximum gain  
G1 = 12 dB,  
48  
49  
52  
G2 = 24 dB,  
G3 = 13 dB; note 3  
TCgain  
G1  
gain temperature  
coefficient  
5
5
0.025  
7
7
dB/°C  
dB  
first RF amplifier  
stage gain step size  
6
6
G2  
secondRF amplifier  
stage gain step size  
dB  
RF data path, input: pins RFSUMP and RFSUMN  
VI(DC)  
DC input voltage  
with respect to VSS  
1.3  
5
V
DDA 1.0  
V
VI(SUM)(dif)  
differential input  
voltage  
GRFSUM = 6 dB  
1800  
1400  
700  
350  
175  
mV  
mV  
mV  
mV  
mV  
µA  
kΩ  
GRFSUM = 0 dB  
GRFSUM = 6 dB  
GRFSUM = 12 dB  
GRFSUM = 18 dB  
II(bias)  
ZI  
input bias current  
input impedance  
note 4  
50  
600  
2003 Jun 03  
31  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
PARAMETER  
DC offset  
compensation  
voltage  
CONDITIONS  
MIN.  
TYP.  
1700  
MAX.  
UNIT  
VRFOFFSS  
GRFSUM = 6 dB  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
mV  
dB  
G
G
G
G
RFSUM = 0 dB  
RFSUM = 6 dB  
RFSUM = 12 dB  
RFSUM = 18 dB  
850  
425  
210  
105  
27  
VRFOFFSS  
DC offset  
compensation  
voltage resolution  
GRFSUM = 6 dB  
GRFSUM = 0 dB  
13.5  
6.7  
G
RFSUM = 6 dB  
RFSUM = 12 dB  
G
3.4  
GRFSUM = 18 dB  
note 3  
1.7  
ARFSUM(min)  
ARFSUM(max)  
TCgain  
minimum gain  
maximum gain  
8  
29  
6  
4  
33  
note 3  
31  
dB  
gain temperature  
coefficient  
0.02  
dB/°C  
GRFSUM  
RFSUM amplifier  
5
6
7.5  
dB  
stage gain step size  
RF data path, filter and output  
Vn(o)(dif)(rms)  
differential  
diode input:  
RF output noise  
voltage (RMS  
value)  
BWRF = 127;  
f = 0 to 500 MHz;  
RFNFEN = 1; note 5  
A = 12 + 24 + 6 dB;  
RFEQEN = 0  
7
6
9
-
mV  
mV  
mV  
A = 12 + 6 + 6 dB;  
RFEQEN = 0  
A = 12 + 6 + 6 dB;  
RFEQEN = 1;  
RFKEQ = 0  
A = 12 + 6 + 6 dB;  
RFEQEN = 1;  
RFKEQ = 1  
11  
mV  
SUM input:  
BWRF = 127;  
f = 0 to 500 MHz;  
RFNFEN = 1; note 5  
A = 12 + 6 + 6 dB;  
RFEQEN = 0  
12  
mV  
VOO(ref)  
DC output offset  
voltage with respect  
to VRFREF  
VI(RF) = 0 V;  
DVDOFFS = 0; note 6  
VRFREF = 1.2 V  
60  
mV  
mV  
VRFREF = 0.8 to 2.1 V  
100  
2003 Jun 03  
32  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Vo(dif)(p-p)  
differential output  
voltage on  
1.4  
V
pins RFP and RFN  
(peak-to-peak  
value)  
VO(RF)(DC)  
DC output voltage  
on pins RFP and  
RFN  
0.35  
0.8  
V
DDA 1.9  
V
V
Vi(RFREF)(CM) input reference  
voltage for common  
mode output on  
1.2  
2.1  
pin RFREF  
Ro  
output impedance  
on pins RFP and  
RFN  
100  
G3  
third RF amplifier  
stage gain step size  
note 7  
0.85  
1.3  
1.5  
1.5  
dB  
||h1| − |he||  
||h1| − |hn||  
BRF(3dB)  
equalizer amplitude flatness between  
error  
dB  
f0 and 100 kHz  
noise filter  
amplitude error  
flatness between  
f0 and 100 kHz  
dB  
3 dB bandwidth of RFEQEN = 0;  
200  
300  
MHz  
RFP and RFN  
signal path  
RFNFEN = 0  
f0(RF)  
f0(RF)  
td(RF)  
noise filter and  
equalizer corner  
frequency  
BWRF = 0  
8
12.0  
145  
14.5  
182  
MHz  
MHz  
BWRF = 127  
100  
noise filter and  
equalizer corner  
frequency step size  
BWRF = 1; note 8  
0.73  
1.06  
1.32  
MHz  
flatness delay in  
RF data path  
equalizer off;  
f = 0 to 150 MHz  
0.1  
0.5  
ns  
ns  
equalizer on;  
f = 0 to 100 MHz;  
BWRF = 127  
equalizer and noise  
filter on;  
f = 0 to 0.7f0(RF)  
BWRF = 0  
BWRF = 127  
note 9  
3.5  
0.6  
0.5  
ns  
ns  
µs  
tst(G3)  
amplifier G3 gain  
change settling time  
α
τ
equalizer parameter see Section 7.5.3  
equalizer parameter see Section 7.5.3  
1.125  
1.18  
1.25  
1.31  
1.375  
1.44  
2003 Jun 03  
33  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
k
equalizer parameter see Section 7.5.3  
RFKEQ = 0  
3.2  
4.8  
4.0  
6.0  
4.8  
7.2  
RFKEQ = 1  
LF servo path  
VI(LF)  
input voltage range path to focus servo  
outputs referred to  
700  
500  
0.2  
mV  
mv  
V
VOPUREF  
path to radial servo  
outputs referred to  
VOPUREF  
VO(LF)  
servo output  
voltage  
V
DD 2.5  
VLFOFFS(CM)  
common mode  
offset  
compensation  
voltage  
SERVOOS = 0  
SERVOOS = 1  
15  
45  
mV  
mV  
VLFOFFS  
DC offset voltage  
resolution  
SERVOOS = 0  
SERVOOS = 1  
SERVOOS = 0  
SERVOOS = 1  
SERVOOS = 0  
SERVOOS = 1  
4.25  
13  
5
5.75  
17  
mV  
mV  
mV  
mV  
mV  
mV  
V
15  
20  
60  
1.3  
4
VROFFS  
,
offset voltage  
compensation  
VCOFFS  
VROFFS  
,
DC offset voltage  
resolution  
1.0  
3.0  
1.25  
1.6  
4.8  
2.75  
VCOFFS  
VI(FTCREF)  
FTC reference input  
reference voltage  
VO(FTC)(p-p)  
FTC output voltage  
(peak-to-peak  
value)  
2.0  
V
IO(LF)  
output current  
focus servo outputs  
radial servo outputs  
0
12  
µA  
µA  
nA  
0
12  
IFOFFS  
focuscompensation from FOFFS DAC  
current  
310  
390  
480  
IFOFFS  
I(FS)(DPD)  
compensation  
current resolution  
12  
nA  
DPD full scale  
current  
f = 3 MHz;  
Vi = 100 mV (p-p)  
DOCEN = 0  
DOCEN = 1  
SUM value  
17  
20  
6.6  
3
23  
8
µA  
µA  
µA  
4.5  
2.5  
Ith(DOC)  
DOCEN threshold  
current  
3.5  
IREFRAD(CM)  
common mode DC DOCEN = 0  
current in DPD  
3.5  
µA  
mode  
2003 Jun 03  
34  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
RLFC  
PARAMETER  
CONDITIONS  
GLFC = 0 dB  
MIN.  
TYP.  
MAX.  
UNIT  
LF path input  
transresistance  
10.5  
11  
14  
15  
16.5  
kΩ  
RLFR  
CD satellite path  
input  
GLFR = 0 dB; α = 1  
18  
kΩ  
transresistance  
RLFPP  
RFTC  
GLFC  
DVD push-pull  
transresistance  
GLFR = 0 dB; α = 1  
23  
30  
650  
36  
kΩ  
kΩ  
dB  
fast track count  
transimpedance  
note 10  
510  
800  
+8.5  
gain range central  
channels  
15.5  
GLFC  
gain resolution  
3
dB  
dB  
GLFR  
gain range radial  
channels  
15.5  
+8.5  
GLFR  
gain resolution  
3
dB  
BLF(3dB)  
3 dB bandwidth of  
60  
75  
100  
kHz  
LF path  
BFTC  
FTC bandwidth  
FTCHBW = 0  
FTCHBW = 1; note 11  
α = 1  
600  
kHz  
kHz  
%
1200  
LRM  
CPM  
dynamic radial left  
right matching  
7  
+7  
channel pair  
matching  
G
LF = 0 dB; note 12  
I(LF) = 96 mV; pairs 2  
OA, OD or OC, OB  
I(LF) = 48 mV; pair  
S1 and S2  
V
+2  
%FS  
%FS  
V
7  
+7  
α
dynamic radial  
offset  
0.6  
1.35  
compensation  
factor  
∆α  
dynamic radial  
offset  
0.05  
compensation  
factor resolution  
ALPC Automatic Laser Power Control  
Vi(mon)  
input voltage from  
laser monitor diode  
P-type monitor diode  
LOW level voltage  
HIGH level voltage  
N-type monitor diode  
LOW level voltage  
HIGH level voltage  
V
DDA4 0.140 VDDA4 0.155 VDDA4 0.170 V  
DDA4 0.215 VDDA4 0.190 VDDA4 0.180 V  
V
0.145  
0.175  
0.155  
0.185  
0.17  
0.2  
V
V
V
V
VO(laser)  
Vprot  
laser output voltage  
VDDL 0.5  
low supply voltage  
protection level  
3.6  
3.8  
4.0  
2003 Jun 03  
35  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
SYMBOL  
Vprot  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
low supply voltage  
protection  
200  
mV  
hysteresis  
II(mon)  
laser monitor diode  
input current  
3
200  
nA  
Io(laser)(max)  
ton(laser)  
maximum current  
output to laser  
120  
mA  
ms  
laser switch on time  
FTC comparator  
VI(CM) common mode  
0
0
2.5  
0.5  
V
V
V
input voltage  
VOL  
LOW-level output  
voltage  
VOH  
HIGH-level output  
voltage  
V
DDD3 0.5  
VDDD3  
VIO  
ILI  
input offset voltage  
10  
mV  
nA  
input leakage  
current  
100  
AV  
voltage gain  
200  
250  
200  
V/mV  
ns  
tr, tf  
tres  
rise and fall time  
response time  
CL = 15 pF  
VI(dif) = 200 mV (p-p)  
ns  
Serial bus interface (see Fig.8)  
VIH  
VIL  
IIH  
HIGH-level input  
voltage  
0.7VDDD3  
V
LOW-level input  
voltage  
0.3VDDD3  
100  
V
HIGH-level input  
current on pin TM,  
input incorporates  
internal pull-down  
resistor  
µA  
II  
input current  
pins SIDA, SICL and  
SILD  
100  
nA  
tsu(strt)  
tsu(D)  
th(D)  
start set-up time  
data set-up time  
data hold time  
clock HIGH time  
clock LOW time  
clock period  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
5
20  
10  
10  
30  
30  
tclk(H)  
tclk(L)  
Tclk  
tsu(load)  
load pulse set-up  
time  
tload(H)  
load pulse HIGH  
time  
10  
ns  
Notes  
1. Level follows the applied supply voltage at pin VDDD3  
.
2003 Jun 03  
36  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
2. This range for the servo path is designed to be larger than for the data path so that the servo path can handle  
out-of-focus situations.  
(G1 + G2 + G3)  
-----------------------------------------  
20  
(Gsum + G3)  
----------------------------------  
20  
3. A = 10  
[dB] or A = 10  
[dB] (see Section 7.5).  
4. Input impedance depends on gain setting. Highest gain has lowest input impedance.  
5. Noise figures depend on gain and filter settings, examples given here.  
V
RFP + V  
6. VOO(ref)  
=
RFN V  
---------------------------------  
RFREF  
2
7. Integral range for G3 from minimum to maximum gain is 13 dB (typical).  
8. At the transition BWRF = 63 to 64 the f may be between 0.2 and +1.7 MHz  
9. Faster for small steps.  
10. Overall gain from input to output is determined by RFTC/RLFR or RFTC/RLFPP, depending on radial tracking mode,  
three-beam push-pull (CD) or DVD push-pull. Gain FTC scales with GFRR. When DPD tracking is selected the FTC  
gain is fixed.  
11. High FTC bandwidth is achieved when IS1 and IS2 > 1.5 µA.  
12. Channel pair matching is defined in % of full scale (FS) output at half of the full scale level.  
SICL  
t
t
clk(L)  
clk(H)  
t
su(strt)  
t
T
clk  
h(D)  
t
su(D)  
SIDA  
SILD  
D0  
A3  
t
su(load)  
MGW495  
Fig.8 Single word transmission.  
2003 Jun 03  
37  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
11 APPLICATION INFORMATION  
11.1 Signal relationships  
11.1.2 SERVO PATH  
The current through output pins OA to OD represents the  
low-pass filtered input voltage of each individual pick-up  
segment. The gain from input to output can be  
programmed to adapt to different disc types or pick-ups  
(offset cancellation is omitted for simplicity):  
Simplified relationships between signals are described in  
this section. In the simplification, all built-in options for  
DVD-ROM are omitted. The variables A1 to A3, ALFC and  
ALFR, are the linear equivalents of bits G1 to G3, GLFC and  
V
Ix × ALFC  
GLFR  
.
IOx  
I S1  
I S2  
=
=
=
--------------------------  
14 kΩ  
11.1.1 DATA PATH  
(VI(A) + VI(B)) × ALFR  
(in DVD push-pull mode)  
(in DVD push-pull mode)  
----------------------------------------------------  
Pins RFP and RFN carry the RF data signals in opposite  
phases with respect to each other. This allows an ADC  
with a balanced or differential input to be used in the  
decoder. Depending on the DC input ranges of the ADC,  
in many cases the connection between TZA1035HL and  
the decoder can be a DC pin to pin connection. The  
common mode DC level of pins RFP and RFN can be  
chosen independently by means of input pin RFREF.  
30 kΩ  
(VI(C) + VI(D)) × ALFR  
-----------------------------------------------------  
30 kΩ  
or:  
I S1  
V
I(E) × ALFR  
=
=
(in CD three-beam push-pull mode)  
(in CD three-beam push-pull mode)  
-----------------------------  
15 kΩ  
If bit RFSUM = 0  
VI(F) × ALFR  
-----------------------------  
15 kΩ  
I S2  
VRFP = VRFREF + 0.5 × A3 × A2 × A1 × (VI VRFOFFS  
VRFN = VRFREF 0.5 × A3 × A2 × A1 × (VI VRFOFFS  
VRFDIF = A3 × A2 × A1 × (VI VRFOFFS).  
)
)
or  
I S1 = IDC + IFS × phase difference (in DPD mode)  
IS2 = IDC IFS × phase difference (in DPD mode)  
If bit RFSUM = 1  
VRFP = VRFREF + 0.5 × ARFSUM × A3 × (VRFSUMP VRFSU  
MN VRFOFFSS  
VRFN = VRFREF 0.5 × ARFSUM × A3 × (VRFSUMP VRFSU  
MN VRFOFFSS  
)
Where:  
ALFC and ALFR are the programmable gains in central  
and radial paths  
)
VRFDIF = ARFSUM × A3 (VRFSUMP VRFSUMN VRFOFFSS).  
Gain should be programmed such that maximum signal  
levels fit into the range of the servo processor ADC  
Where:  
A1, A2, A3 and ARFSUM are programmed gain values  
VI(A); VI(B); VI(C) and VI(D) are defined as input voltages  
at pins A to D with respect to pin OPUREF  
VI = average input voltage at pins A to D, with respect to  
the voltage at pin OPUREF  
IDC is a DC current that keeps IS1 and IS2 unipolar  
IFS is the sensitivity to relative phase difference.  
VRFOFFS is the programmed RFOFFS DAC voltage  
(register 4 and register 5)  
t  
-----  
Tp  
∆φ[degrees]  
---------------------------------  
360  
VRFREF is the input voltage at pin RFREF.  
Phase difference =  
=
;
Correct settings for VRFREF and VRFOFFS are required to  
keep both VRFP and VRFN at the DC voltage levels  
specified for the TZA1035HL and the decoder.  
180° < φ < + 180°.  
2003 Jun 03  
38  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
11.2 Programming examples  
Table 30 Sample of register values and mode settings.  
REGISTER VALUE (HEX)  
REGISTER  
MODE SETTINGS  
DVD; LOW  
GAIN  
DVD; HIGH  
GAIN(1)  
CD; HIGH  
GAIN(1)  
0
1
005  
01D  
045  
01D  
043  
007  
switch on the laser power; Vmon = 150 mV; set GRFSUM  
select diode or SUM inputs and corresponding tracking  
method  
2
3
800  
800  
800  
800  
800  
set K2 mode  
set low RF gain = 18 dB + G3  
set G1 for DPD (G3 = 0 dB in this example)  
approximation for DVDOFFS DAC  
optional second RF offset setting  
800  
410  
000  
778  
4
5
6
820  
000  
338  
410  
000  
778  
GLFC = GLFR = 6 dB (low gain) or +6 dB (high gain);  
α = 1  
7
200  
000  
000  
000  
000  
000  
000  
335  
022  
200  
000  
000  
000  
000  
000  
000  
335  
022  
000  
000  
000  
000  
000  
000  
000  
335  
000  
set bits DPD_stretch to 1.9 ns  
enable inputs A to D for RF  
not used  
8
9
10  
11  
12  
13  
14  
15  
not used  
set for electrical offset compensation from pick-up (see  
Section 11.4)  
set bits BWRF to 80 MHz; RFEQEN = 1; RFNFEN = 1  
set bits DPD_LL to 24 MHz; set bits DPD_LPF  
to 100 MHz  
Note  
1. Use RFSUM input.  
2003 Jun 03  
39  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
11.3 Energy saving  
The test pin OCENTRAL can be useful to follow this  
procedure. This pin can be programmed to output a copy  
of the signal OA to OD (see register 12).  
Bit PWRON can be used to bring the TZA1035HL into  
STANDBY mode reducing the supply current to  
approximately 0.5 mA.  
11.4.2 GAIN SETTING SERVO  
11.4 Initial DC and gain setting strategy  
The servo gain has to be chosen dependant on the  
reflectivity of the disc. So this needs to be done each time  
when a new disc is inserted in the mechanism. A trial and  
error procedure should find the optimal setting. Gain can  
be set in 3 dB steps.  
11.4.1 ELECTRICAL OFFSET FROM PICK-UP  
It is useful to compensate for electrical offset, especially  
with pick-ups that give a low output signal. It is possible to  
compensate for each individual servo channel. Due to  
internal circuitry, the TZA1035HL servo channels can  
handle only signals positive with respect to the reference  
input OPUREF. Therefore the potentially negative offset  
from the pick-up must first be cancelled. The LFOFFS DAC  
can be programmed to do this, and will apply this to all six  
channels at the same time. The LFOFFS DAC can be set  
to 0, 5, 10 or 15 mV.  
11.4.3 DC LEVEL IN RF PATH  
Once the gains in the servo path have been set, the  
average DC level at the inputs can be calculated from the  
value of the servo output signals:  
I
Ox × 14 kΩ  
------------------------------------------------------------------------  
LFC (VLFOFFS + VCOFFSx  
V I =  
A
)
As a second step, the offset between each channel can be  
compensated by connecting the DACs to each individual  
DAC (COFFSA to COFFSD, ROFFSE and ROFFSF). These  
DACs can be programmed between 0 and 20 mV with  
approximately 1.25 mV resolution. Where the LFOFFS DAC  
increases the outputs signal level, the individual DACs  
decrease the output signal. In this way the output signal  
Where IOx is the average value of the output currents at  
pins OA to OD.  
This value is a good estimate to use initially to set the  
RF DC compensation, VRFOFFS. The range and resolution  
of the RFOFFS DACs are scaled with the programmed gain  
of G1.  
can be set very close to zero. The range of DACs, LFOFFS  
COFFS and ROFFS can be tripled with control  
bit SERVOOS.  
,
In cases where a DC coupling between TZA1035HL and  
the decoder is made, a fine tuning of the RF DC  
compensation can be done during play. The zero-crossing  
level of the data-eye pattern can be used to judge the  
correct DC compensation level.  
The output current of servo channel A is calculated by:  
[(VA VOPUREF) + VFLOFFS VCOFFSA] × ALFC  
IOA  
=
-------------------------------------------------------------------------------------------------------------------------  
14 kΩ  
11.4.4 GAIN SETTING RF PATH  
In case the laser is switched off, the term (VA VOPUREF  
represents the electrical offset from the pick-up.  
)
The choice of RF gain is determined by the modulation of  
the disc, therefore the modulation needs to be checked  
each time a new disc is inserted in the mechanism. A trial  
and error procedure should be sufficient to find the  
optimum setting. For optimum use of the dynamic range:  
The procedure to cancel the offset is:  
1. Activate the pick-up and switch off the laser.  
2. Set LFOFFS to its maximum value.  
Use G3 for fine tuning and AGC, so initially this should  
be set in the range 0 to 6 dB to leave an additional gain  
of 6 dB free to use during disc defects  
3. Measure the output currents off all relevant servo  
outputs.  
4. If all outputs represent a signal >5 mV equivalent input  
voltage, decrease VLFOFFS then repeat step 3; if all  
outputs represent a signal <5 mV equivalent input  
voltage, go to step 5.  
Use G1 and G2 to set the gain, increase G1 first,  
when G1 has reached its maximum then G2 should be  
increased  
G2 shows better noise performance in 12 and 24 dB  
5. Measure each output and increase COFFS until the  
output current is close enough to zero.  
settings than in 6 and 18 dB setting  
A similar procedure can be followed for RFSUM.  
This procedure needs only to be done once, or after a  
longer time when temperature may have changed the  
pick-up offset.  
2003 Jun 03  
40  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
12 PACKAGE OUTLINE  
LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm  
SOT313-2  
c
y
X
36  
25  
A
E
37  
24  
Z
E
e
H
E
A
2
A
(A )  
3
A
1
w M  
p
θ
pin 1 index  
b
L
p
L
13  
48  
detail X  
1
12  
Z
v M  
D
A
e
w M  
b
p
D
B
H
v
M
B
D
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
E
θ
1
2
3
p
E
p
D
max.  
7o  
0o  
0.20 1.45  
0.05 1.35  
0.27 0.18 7.1  
0.17 0.12 6.9  
7.1  
6.9  
9.15 9.15  
8.85 8.85  
0.75  
0.45  
0.95 0.95  
0.55 0.55  
1.6  
mm  
0.25  
0.5  
1
0.2 0.12 0.1  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
00-01-19  
03-02-25  
SOT313-2  
136E05  
MS-026  
2003 Jun 03  
41  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
13 SOLDERING  
To overcome these problems the double-wave soldering  
method was specifically developed.  
13.1 Introduction to soldering surface mount  
packages  
If wave soldering is used the following conditions must be  
observed for optimal results:  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “Data Handbook IC26; Integrated Circuit Packages”  
(document order number 9398 652 90011).  
Use a double-wave soldering method comprising a  
turbulent wave with high upward pressure followed by a  
smooth laminar wave.  
For packages with leads on two sides and a pitch (e):  
There is no soldering method that is ideal for all surface  
mount IC packages. Wave soldering can still be used for  
certain surface mount ICs, but it is not suitable for fine pitch  
SMDs. In these situations reflow soldering is  
recommended.  
– larger than or equal to 1.27 mm, the footprint  
longitudinal axis is preferred to be parallel to the  
transport direction of the printed-circuit board;  
– smaller than 1.27 mm, the footprint longitudinal axis  
must be parallel to the transport direction of the  
printed-circuit board.  
13.2 Reflow soldering  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
Driven by legislation and environmental forces the  
The footprint must incorporate solder thieves at the  
downstream end.  
For packages with leads on four sides, the footprint must  
be placed at a 45° angle to the transport direction of the  
printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
worldwide use of lead-free solder pastes is increasing.  
Several methods exist for reflowing; for example,  
convection or convection/infrared heating in a conveyor  
type oven. Throughput times (preheating, soldering and  
cooling) vary between 100 and 200 seconds depending  
on heating method.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
Typical reflow peak temperatures range from  
215 to 270 °C depending on solder paste material. The  
top-surface temperature of the packages should  
preferably be kept:  
Typical dwell time of the leads in the wave ranges from  
3 to 4 seconds at 250 °C or 265 °C, depending on solder  
material applied, SnPb or Pb-free respectively.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
below 220 °C (SnPb process) or below 245 °C (Pb-free  
process)  
– for all BGA and SSOP-T packages  
13.4 Manual soldering  
– for packages with a thickness 2.5 mm  
Fix the component by first soldering two  
diagonally-opposite end leads. Use a low voltage (24 V or  
less) soldering iron applied to the flat part of the lead.  
Contact time must be limited to 10 seconds at up to  
300 °C.  
– for packages with a thickness < 2.5 mm and a  
volume 350 mm3 so called thick/large packages.  
below 235 °C (SnPb process) or below 260 °C (Pb-free  
process) for packages with a thickness < 2.5 mm and a  
volume < 350 mm3 so called small/thin packages.  
When using a dedicated tool, all other leads can be  
soldered in one operation within 2 to 5 seconds between  
270 and 320 °C.  
Moisture sensitivity precautions, as indicated on packing,  
must be respected at all times.  
13.3 Wave soldering  
Conventional single wave soldering is not recommended  
for surface mount devices (SMDs) or printed-circuit boards  
with a high component density, as solder bridging and  
non-wetting can present major problems.  
2003 Jun 03  
42  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
13.5 Suitability of surface mount IC packages for wave and reflow soldering methods  
SOLDERING METHOD  
PACKAGE(1)  
WAVE  
not suitable  
REFLOW(2)  
BGA, LBGA, LFBGA, SQFP, SSOP-T(3), TFBGA, VFBGA  
suitable  
suitable  
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,  
HTSSOP, HVQFN, HVSON, SMS  
not suitable(4)  
PLCC(5), SO, SOJ  
suitable  
suitable  
LQFP, QFP, TQFP  
not recommended(5)(6) suitable  
not recommended(7)  
suitable  
SSOP, TSSOP, VSO, VSSOP  
Notes  
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy  
from your Philips Semiconductors sales office.  
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum  
temperature (with respect to time) and body size of the package, there is a risk that internal or external package  
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the  
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.  
3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account  
be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature  
exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package body peak temperature  
must be kept as low as possible.  
4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder  
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,  
the solder might be deposited on the heatsink surface.  
5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.  
The package footprint must incorporate solder thieves downstream and at the side corners.  
6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not  
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than  
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
2003 Jun 03  
43  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
14 DATA SHEET STATUS  
DATA SHEET  
STATUS(1)  
PRODUCT  
STATUS(2)(3)  
LEVEL  
DEFINITION  
I
Objective data  
Development This data sheet contains data from the objective specification for product  
development. Philips Semiconductors reserves the right to change the  
specification in any manner without notice.  
II  
Preliminary data Qualification  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in order  
to improve the design, manufacturing and supply. Relevant changes will  
be communicated via a Customer Product/Process Change Notification  
(CPCN).  
Notes  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was  
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.  
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
15 DEFINITIONS  
16 DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes in the products -  
including circuits, standard cells, and/or software -  
described or contained herein in order to improve design  
and/or performance. When the product is in full production  
(status ‘Production’), relevant changes will be  
Application information  
Applications that are  
communicated via a Customer Product/Process Change  
Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these  
products, conveys no licence or title under any patent,  
copyright, or mask work right to these products, and  
makes no representations or warranties that these  
products are free from patent, copyright, or mask work  
right infringement, unless otherwise specified.  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2003 Jun 03  
44  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
NOTES  
2003 Jun 03  
45  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
NOTES  
2003 Jun 03  
46  
Philips Semiconductors  
Preliminary specification  
High speed advanced analog DVD signal  
processor and laser supply  
TZA1035HL  
NOTES  
2003 Jun 03  
47  
Philips Semiconductors – a worldwide company  
Contact information  
For additional information please visit http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.  
© Koninklijke Philips Electronics N.V. 2003  
SCA75  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
753503/01/pp48  
Date of release: 2003 Jun 03  
Document order number: 9397 750 10296  

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