UAA3522HL [NXP]

Low power dual-band GSM transceiver with an image rejecting front-end; 用图像拒绝前端低功耗双频GSM收发器


型号：	UAA3522HL
厂家：	NXP
描述：	Low power dual-band GSM transceiver with an image rejecting front-end 用图像拒绝前端低功耗双频GSM收发器电信集成电路蜂窝电话电路电信电路 GSM
文件：	总28页 (文件大小：152K)
中文：	中文翻译
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INTEGRATED CIRCUITS

DATA SHEET

UAA3522HL

Low power dual-band GSM

transceiver with an image rejecting

front-end

Objective speciﬁcation

2000 Feb 18

File under Integrated Circuits, IC17

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

FEATURES

The input Low Noise Amplifier (LNA) can be switched off

via the bus to allow accurate calibration in the offset

cancellation mode.

• Dual-band application for Global System for Mobile

communication (GSM) and Digital Cellular

communication Systems (DCS)

The transmitter comprises a high precision I/Q modulator

and modulation loop architecture. The I/Q modulator

converts the baseband modulation frequency to the

transmit IF. The modulation loop architecture, which

includes an on-chip offset mixer and phase detector,

controls an external transmit RF VCO which converts the

transmit modulated IF signal to RF.

• Low noise and wide dynamic range single Intermediate

Frequency (IF) transceiver

• More than 30 dB on-chip image rejection in the receiver

• More than 60 dB gain control range

• I/Q demodulator with high performance integrated

baseband channel filter

A receive RF VCO provides the Local Oscillator (LO)

signal to the image rejection mixers in the RF receiver. An

IF VCO provides the LO signal to the I/Q demodulator and

I/Q modulator in the receiver and transmitter sections

respectively.

• High precision I/Q modulator

• Transmit modulation loop architecture including offset

mixer and phase detector

• Dual Phase-Locked Loop (PLL) with on-chip IF Voltage

The frequencies of the RF VCO and the IF VCO are set by

internal PLL circuits, which are programmable via the

3-wire serial bus. The RF and IF PLL comparison

frequencies are 200 kHz and 1 MHz respectively, derived

from a 13 MHz reference signal which has to be supplied

externally. The quadrature RF LO signals required by the

image rejection mixers are obtained using on-chip

Resistor Capacitor (RC) networks. The quadrature IF LO

signals required by the I/Q modulator and I/Q demodulator

are obtained by dividing the frequency of the IF VCO

signal.

Controlled Oscillator (VCO)

• Fully differential design minimizing cross-talk and spurii

• 3-wire serial bus interface

• Functional down to 2.7 V and up to 3.3 V

• LQFP48 package.

APPLICATIONS

• GSM 900 MHz hand-held transceiver

• GSM/DCS dual-band solution with the UAA2077CM

The IC can be powered on in either receiver (RX),

transmitter (TX) or synthesizer (SYN) operating mode

depending on the logic level at pins RXON, TXON and

SYNON, respectively. Alternatively, an operating mode

can be selected by software using the 3-wire serial

programming bus. In RX or TX mode, only those sections

of the IC which are required are switched on.

(down to 3.2 V) or UAA2077TS/D (down to 2.7 V).

GENERAL DESCRIPTION

The UAA3522HL integrates the receiver and most of the

transmitter section of a GSM hand-held transceiver. It also

integrates the receiver IF and the transmitter section of a

DCS transceiver.

The GSM or DCS band is selected by the 3-wire serial

programming bus. When activating RX mode for DCS

applications, the receiver RF section can be disabled by

software so that only the receiver IF section is

powered-on.

The receiver comprises an RF and an IF section. The RF

(GSM) front-end amplifies the aerial signal, converts the

chosen channel frequency to an IF of 200 MHz, and also

provides more than 30 dB of image suppression. Some

selectivity is provided at this stage by an off-chip bandpass

pre-filter. The IF section further amplifies the chosen

channel, maintains the gain at the required level,

demodulates the signal into I and Q components, and

provides channel selectivity at a baseband stage using a

high performance integrated low-pass filter. The IF gain

can be varied over a range of more than 60 dB. The offset

at the I and Q outputs can be cancelled out by software

using the 3-wire serial programming bus.

The SYN mode is used to power-on the synthesizer prior

to activating the RX or TX mode. In SYN mode, some

internal LO buffers are also powered-on to minimize the

‘pulling’ effect of the VCO when either the receiver or the

transmitter are switched on.

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

QUICK REFERENCE DATA

SYMBOL

PARAMETER

GSM band RF input frequency in RX mode

GSM band RF output frequency in TX mode

DCS band RF output frequency in TX mode

IF frequency in all modes

MIN.

TYP.

MAX.

960

UNIT

MHz

f_i(RF)(RX)

925

−

f_{o(RF)(TX)(GSM)}

f_{o(RF)(TX)(DCS)}

f_IF

880

1710

−

915

1785 MHz

200

−

MHz

ORDERING INFORMATION

TYPE

PACKAGE

NUMBER

NAME

DESCRIPTION

VERSION

UAA3522HL

LQFP48

plastic low proﬁle quad ﬂat package; 48 leads; body

SOT313-2

7 × 7 × 1.4 mm

2000 Feb 18

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90°

PHASE

SHIFTER

1805 to1880 MHz

90°

PHASE

SHIFTER

BALUN

ADDER

0°

SAW

UAA2077XM

46, 47

8, 9

90°

PHASE

SHIFTER

4, 5

2, 3

925 to 960 MHz

90°

41,

0°

IF VCO

400 MHz

PHASE

SHIFTER

BALUN

ADDER

0°

90°

13,

DIVIDER &

PHASE

SHIFTER

÷2

IF VCO

XTAL

UAA3522HL

PROGRAMMABLE

DIVIDER

30, 31

DCS RF

RX VCO

1510 to 1680

MHz

GSM RF

RX VCO

1080 to 1160

MHz

IF PHASE/

FREQUENCY

DETECTOR

CHARGE

PUMP

PROGRAMMABLE

DIVIDER

RF PHASE/

FREQUENCY

DETECTOR

CHARGE

PUMP

DIVIDER

÷5

DIVIDER

÷13

REF OSC.

13 MHz

RX/TX

SWITCH

880 to 915 MHz

GSM BAND

38, 39

0°

ADDER

4, 5

2, 3

GSM TX RF VCO

880 to 915 MHz

90°

PHASE

DETECTOR

CHARGE

PUMP

44, 45

1710 to 1785 MHz

DCS BAND

POWER

AMPLIFIER

DCS TX RF VCO

1710 to 1785 MHz

FCA004

Fig.1 Block diagram.

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

PINNING

SYMBOL

DESCRIPTION

SYMBOL

DESCRIPTION

V_CCCPRF

RF charge pump and phase

detector supply voltage

RF charge pump output

RF charge pump ground

SYN mode control pin

V_CCIF1

IF section of RF receiver supply

voltage 1

CPORF

GNDCP

SYNON

V_CCRFLO

RFLOC

RFLOE

Q path A baseband input/output

Q path B baseband input/output

I path A baseband input/output

I path B baseband input/output

AGC reference resistor

RF LO section supply voltage

LO signal input from RF VCO

RF LO section ground

REFAGC

GNDIF2

I/Q modulator and I/Q demodulator

ground 2

GNDRFLO

RXON

RX mode control pin

RXIIFA

RXIIFB

V_CCIF2

RX IF input A to AGC ampliﬁer

RX IF input B to AGC ampliﬁer

GNDPHD

transmit modulation loop charge

pump ground

I/Q modulator and I/Q demodulator

supply voltage 2

PHDOUT

V_CCPHD

charge pump output

transmit modulation loop charge

pump supply voltage

TXON

V_CCIFLO

IFLOC

TX mode control pin

IF LO supply voltage

RESEXT

reference resistor for transmit

modulation loop

IF LO signal input from

IF VCO resonator

TXIRFA

TXIRFB

V_CCRF

TX RF VCO signal input

IFLOE

IF LO signal input from

IF VCO resonator

RF receiver and transmit

GNDIFLO

CPOIF

IF LO ground

modulation loop supply voltage

IF charge pump output

RXIRFA

RXIRFB

GNDRF

RF receiver input A

RF receiver input B

GNDCPIF

IF charge pump and phase

detector ground

RF receiver and transmit

modulation loop ground

V_CCCPIF

IF charge pump and phase

detector supply voltage

TXIFA

transmit IF external ﬁlter A

transmit IF external ﬁlter B

receiver IF output A

serial programming bus enable

control pin

TXIFB

RXOIFA

RXOIFB

GNDIF1

DATA

serial programming bus data input

serial programming bus clock input

synthesizer ground

receiver IF output B

CLK

IF section of RF receiver ground 1

GNDSYN

REFIN

V_CCSYN

13 MHz reference input

synthesizer supply voltage

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

handbook, full pagewidth

CCIF1

CCPHD

35 PHDOUT

34 GNDPHD

33 RXON

32 GNDRFLO

31 RFLOE

30 RFLOC

REFAGC

GNDIF2

RXIIFA

RXIIFB

UAA3522HL

CCRFLO

28 SYNON

27 GNDCP

26 CPORF

CCIF2

TXON 11

CCPRF

CCIFLO

FCA043

Fig.2 Pin configuration.

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

FUNCTIONAL DESCRIPTION

RF receiver

The phase detector output transfers the modulation of the

I/Q IF signal to the off-chip transmit RF VCO making the

analog PLL act as a tracking filter. A PLL of at least

third-order is needed to meet noise requirements at

20 MHz offset from the carrier.

The receiver front-end converts the aerial RF signal, in the

GSM band (925 to 960 MHz), to an IF signal of

approximately 200 MHz. The first stage of the receiver is a

symmetrical LNA that is matched to 50 Ω by an external

balun. The LNA is followed by an image rejection mixer

which suppresses the image by more than 30 dB.

It comprises two mixers in parallel driven by 0° and 90°

quadrature LO signals respectively. The IF signal from

one mixer is shifted by 90° with respect to the IF signal

from the other mixer, then both signals are added together

to cancel out the image signal. The resultant IF signal is

fed to the output via a high output impedance

RF and IF LO sections

The active components required for the design of a low

noise IF VCO are provided on-chip. Pins IFLOC and

IFLOE connect the on-chip IF VCO components to an

external resonator and feedback circuit.

A divider and phase shifter divides the frequency of the

IF VCO signal by 2 and splits it into two signals having

phases of respectively 0° and 90° which are both fed to the

I/Q modulator and to the I/Q demodulator. The IF VCO

frequency is twice the IF to suppress the effects of

self-mixing and parasitic VCO modulation.

open-collector stage which drives an external Surface

Acoustical Wave (SAW) filter which selects the required

channel.

I/Q demodulator

Pins TXIRFA and TXIRFAB connect an external receive

RF VCO module to the on-chip RF LO section. This

section includes a RC phase shifter which splits the

RF VCO signal into two signals having phases of

respectively 0° and 90° which are both fed to the RX

image rejection mixer.

The signal from the SAW filter enters the I/Q demodulator

section. In addition to I/Q demodulation, this section

performs Automatic Gain Control (AGC) over a range of

60 dB to maintain a constant output level irrespective of

the antenna input level, and also applies additional

channel selectivity at the baseband stage using an

integrated high-order low-pass filter.

Dual PLL

An on-chip high performance dual PLL synthesizes the

frequencies of the receive RF VCO and IF VCO signals.

Very low close-in phase noise is achieved which provides

a wide PLL bandwidth with a short settling time.

The AGC amplifier output can be adjusted for a static

offset of less than 50 mV. Its design prevents the offset

from varying by more than ±5 mV. To allow a more

accurate offset calibration, the RF LNA can be switched off

to ensure that no IF signal is present at the AGC amplifier

input during the offset measurement.

A dual programmable divider chain reduces the frequency

of the receive RF and IF LO signals to 200 kHz and 1 MHz

respectively. A digital phase/frequency detector compares

their phases to a reference signal derived from an external

13 MHz clock signal. Phase error information is fed back

to both VCOs via the dual charge pump circuit which

adjusts the phase of each VCO signal by either ‘sinking’

current into, or ‘sourcing’ current from, its loop filter

capacitor, phase locking both RF and IF loops. The very

low leakage current of the dual charge pump circuit

ensures that any spurii are negligible.

I/Q modulator

Baseband I and Q signals are applied to the I/Q modulator

which shifts the modulation spectrum up to the transmit IF.

The I/Q modulator is designed for low harmonic distortion,

low carrier leakage and high image rejection to keep the

phase error as small as possible. Its IF output is loaded by

an integrated low-pass filter and by an external

LC tuned-circuit to prevent unwanted spurii from entering

the phase detector in the transmit modulation loop.

Operating modes

BASIC OPERATING MODES

Transmit modulation loop

The circuit can be powered on in one of four operating

modes in which different parts of the device are enabled or

disabled. The four operating modes are called Idle, RX,

TX and SYN, and are selected by the hardware control

voltage level applied to pins RXON, TXON and SYNON.

The analog transmit modulation loop comprises an on-chip

offset mixer and simple phase detector in switching mode

(triangular transfer function) forming an analog PLL with

an off-chip loop filter and transmit RF VCO.

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

The synthesizer, receiver and transmitter cannot all be on

at the same time. Table 1 shows which parts of the device

are enabled (on) or disabled (off) in each mode.

Table 2 Bit LNA status

POWER STATUS OF BIT

LNA

BIT LNA STATUS

off

Table 1 Operating modes

POWER STATUS

MODE

SYNTHESIZER RECEIVER TRANSMITTER

Table 3 Bit RF status

Idle

SYN

off

POWER STATUS OF

RECEIVER RF SECTION

IN RX MODE

BIT RF STATUS

on (GSM)

off (DCS)

The synthesizer includes the oscillators and LO buffers

common to the receive and transmit sections. The receiver

includes the RF section and the I/Q demodulator. When

the receiver is on, the LNA can be switched off to allow

DC offset compensation to be performed. The RF section

can also be switched off for DCS applications. See Section

“Receiver power status control”.

Programming

SERIAL PROGRAMMING BUS

A simple 3-wire unidirectional serial bus is used for

programming the IC. The lines are called DATA, CLK

and EN (enable). Programming data is sent to the IC in

bursts which are separated from each other by EN.

Programming clock edges are ignored until EN goes

active LOW. The data is loaded into the addressed register

when EN returns inactive HIGH, and when the CLK is in

either state, without affecting the data in the register.

The register only holds the last 18 bits that are serially

clocked into the IC.

RECEIVER POWER STATUS CONTROL

• DC offset compensation: This feature allows the DC

offset of the receiver output to be set accurately. When

the receiver is on, the LNA can be switched off to isolate

the antenna input from the I/Q demodulator input.

The offset at the I and Q outputs can be independently

reduced to less than 50 mV by adequately programming

two 5-bit data registers, see Table 4 “Register bit

allocation”. The LNA is switched on or off by the status

of bit LNA (see Table 2).

Additional leading bits are ignored, and no check is made

on the number of clock pulses received. The fully static

CMOS design uses virtually no current when the bus is

inactive. It can always accept new programming data even

when both synthesizers are powered-off.

• Disabling RF section: For DCS applications, the RF

section can be disabled in RX mode. The same

IF circuits are used for both GSM and DCS applications

to avoid duplication. For DCS applications using the

UAA2077XM, for example, the RF section of the

UAA3522HL does not have to be powered on.

DATA FORMAT

Data is loaded into the register with the most significant bit

(MSB) first. The first 14 bits are data, while the last 4 bits

are the register address. The address bits are decoded on

the rising edge of EN. This internally generates a load

pulse to store the data in the addressed register.

To ensure that data loads correctly after the device has

powered-up, EN should be held LOW and only taken HIGH

after the appropriate register has been loaded.

The RF section is enabled or disabled by the status of

bit RF when the RX mode is activated (see Table 3).

The EN pulse is inhibited during the period when data is

read by the frequency dividers to prevent divider ratio data

from being read incorrectly. This state is guaranteed by

always allowing for a minimum EN pulse width after data

transfer.

2000 Feb 18

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Table 4 Register bit allocation

X = don’t care; MSB = Most Signiﬁcant Bit; LSB = Least Signiﬁcant Bit.

DATA BITS

ADDRESS BITS

LAST

FIRST

BIT

MSB

IF LO frequency divider ratio

LSB

RF LO frequency divider ratio

LNA⁽¹⁾

MSB

AGC ampliﬁer gain (RX mode)

see Table 5

MSB Q output offset adjust

LSB

Q sign MSB

I output offset adjust

LSB

I sign⁽²⁾

(2)

IF RD IF VCO

(3)

RF⁽⁵⁾

SYN ON RX ON TX ON

(4)

For test purposes only⁽⁶⁾

Notes

1. Bit LNA: 1 = LNA ON in RX mode; 0 = LNA OFF in RX mode.

2. Bits Q sign and I sign = polarity of offset at Q/I channel outputs: 0 = negative offset step (output A with respect to output B); 1 = positive offset step

(output A with respect to output B).

3. Bit IF RD: 0 = frequency dividers programmed for GSM applications; 1 = frequency dividers programmed for DCS applications.

4. Bit IF VCO: 0 = IF LO buffer ON (external IF LO source connected); 1 = IF VCO ON (external IF LO source not connected).

5. Bit RF: 1 = RF section ON when RX mode is activated; 0 = RF section OFF when RX mode is activated.

6. This address must not be used. Data bits to be defined.

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

Table 5 AGC ampliﬁer gain register look-up table

All codes not included in the table are forbidden.

AGC AMPLIFIER

GAIN (dB)⁽¹⁾

BIT 5 (MSB)

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0 (LSB)

−1

+11

+13

+15

+17

+19

+21

+23

+25

+27

+29

+31

+33

+35

+37

+39

+41

+43

+45

+47

+49

+51

+53

+55

+57

+59

+61

Note

1. Voltage gain is defined as the differential baseband output voltage (either at pins IA/IB or pins QA/QB) divided by the

differential input voltage at pins RXIIFA and RXIIFB.

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL

V_CCn

PARAMETER

MIN.

TYP. MAX. UNIT

supply voltage

−0.3

−

P_tot

total power dissipation

storage temperature

ambient temperature

T_stg

T_amb

−40

−30

+150 °C

+70 °C

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take

normal precautions appropriate to handling MOS devices (see “Handling MOS devices”).

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

in free air

VALUE

UNIT

R_th(j-a)

thermal resistance from junction to ambient

K/W

DC CHARACTERISTICS

All parameters are guaranteed at V_CC= 2.8 V; T_amb= 25 °C.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP. MAX. UNIT

Supply pins V_CCIF1, V_CCIF2, V_CCIFLO, V_CCRFLO, V_CCSYN, and V_CCRF

V_CC

Supply pins V_CCCPIFand V_CCCPRF

V_CCCPIFsupply voltage

V_CCCPRF

Supply pin V_CCPHD

V_CCPHDsupply voltage for charge pump of

supply voltage

note 1

2.7

−

3.3

;

2.7

note 1

−

5.5

phase detector in transmit

modulation loop

Supply pins V_CCIF1, V_CCIF2, V_CCIFLO, V_CCRFLO, V_CCSYN, V_CCCPIF, V_CCCPRF, V_CCPHDand V_CCRF

I_CC(pd)(tot)

total power-down supply current

pins TXON,

−

100

µA

RXON, SYNON = LOW-level;

pins EN, DATA, CLK = HIGH-l

evel; note 2

RF receiver IF section (pins V_CCIF1, RXOIFA and RXOIFB)

I_CC(RFIF)(RX)RF receiver and IF section total

supply current

RX mode active

−

16.9

21.9

IF section supply (pin V_CCIF2

)

I_CCIF(RX)

I_CCIF(TX)

I/Q demodulator supply current

I/Q modulator supply current

RX mode active

TX mode active

−

10.1

7.4

14.1

9.6

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

SYMBOL

IF LO section supply (pin V_CCIFLO

I_CCIFLO(SYN)IF LO section supply current

IF charge pump supply (pin V_CCCPIF

I_CCCPIF(SYN)IF LO charge pump supply current

PARAMETER

CONDITIONS

MIN.

TYP. MAX. UNIT

)

SYN mode active

−

5.5

1.2

6.6

1.5

)

SYN mode active; phase

locked

−

Synthesizer supply (pin V_CCSYN

)

I_CCSYN(SYN)synthesizer supply current

SYN mode active

−

6.7

1.7

RF LO charge pump and phase detector supply (pin V_CCCPRF

)

I_CCCPRF(SYN)RF LO charge pump supply current SYN mode active; phase

locked

1.4

RF LO supply (pin V_CCRFLO

I_CCRFLO(RX)RF LO buffer receive section supply SYN mode active; RX mode

current active

)

−

8.6

9.8

10.9

12.6

I_CCRFLO(TX)RF LO buffer transmit section supply TX mode active

current

Closed-loop charge pump supply (pin V_CCPHD

)

I_CCPHD(TX)

closed-loop charge pump supply

current

TX mode active; phase locked

−

5.6

7.5

RF receiver and transmit modulation loop supply (pin V_CCRF

)

I_CCRF(RX)on

I_CCRF(RX)off

I_CCRF(TX)

supply current of RF receiver

(receive IF section disconnected)

with RX image rejection mixer and

LNA ON

RX mode active; LNA ON

RX mode active; LNA OFF

TX mode active

17.9

23.6

supply current of RF receiver

(receive IF section disconnected)

with RX image rejection mixer and

LNA OFF

−

11.2

6.1

14.6

7.6

supply current of transmit

modulation loop (charge pump

disconnected)

Pins V_CCIF1, V_CCIF2, V_CCIFLO, V_CCCPIF, V_CCSYN, V_CCCPRF, V_CCPHD, V_CCRFand RXOIFA, RXOIFB

I_CC(RX)

I_CC(TX)

I_CC(SYN)

supply current in RX mode

supply current in TX mode

supply current in SYN mode

RX mode active; note 3

TX mode active; note 3

SYN mode active; note 3

−

44.9

20.3

21.7

59.6

26.4

27.4

Pins IA IB, QA and QB

V_O(IQ)

V_I(IQ)

DC voltage at I/Q baseband outputs TX mode active

1.125 1.25

1.175 1.25

1.325

1.35

DC voltage at I/Q baseband inputs

RX mode active

Logic levels (pins EN, DATA, CLK, TXON, RXON and SYNON)

V_IH

V_IL

HIGH-level input voltage

LOW-level input voltage

1.9

−

0.7

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

Notes:

1. V_CCCPRF, V_CCCPIFand V_CCPHDmust be equal to, or greater than, the other supply voltages. The other supply

voltages must be equal.

2. ‘HIGH-level’ means the control pin voltage must be equal to the supply voltage V_CC. ‘LOW-level’ means the control

pin voltage must be equal to the supply ground.

3. I_CC(RX)= I_CC(RFIF)(RX)+ I_CCIF(RX)+ I_{CCRF(RX); CC(TX)}= I_CCIF(TX)+ [I_CCRFLO(TX)− I_CCRFLO(RX)] + I_CCPHD(TX)+ I_CCRF(TX);

I_CC(SYN)= I_CCIFLO(SYN)+ I_CCCPIF(SYN)+ I_CCPLL(SYN)+ I_CCCPRF(SYN)+ I_CCRFLO(SYN)

AC CHARACTERISTICS

All parameters are guaranteed at V_CC= 2.8 V; T_amb= 25 °C; unless speciﬁed otherwise.

SYMBOL PARAMETER CONDITIONS MIN. TYP.

MAX.

UNIT

RF receiver section; measured in a 50 Ω impedance system, including external input/output baluns and

matching networks to 50 Ω (see Fig.3)

RF RECEIVER INPUTS (PINS RXIRFA AND RXIRFB)

f_i(RF)(GSM)

GSM band RF input

frequency

925

−

960

−

MHz

R_i(dif)

differential input

resistance

146

0.85

Ω

C_i(dif)

differential input

capacitance

−

S₁₁

input power matching

note 1

−

−15 −10

−50 −40

P_i(spur)

level of spurious input

power due to

dBm

LO leakage

RECEIVER IF OUTPUT (PINS RXOIFA AND RXOIFB)

f_o(IF)

IF output frequency

LO > RF

−

200

−

MHz

R_L(m)

matched load

resistance

differential; note 2

kΩ

G_conv(p)

G_ripple

power conversion gain into speciﬁed matched load

resistance; note 1

24.5 27

gain ripple

over speciﬁed frequency range;

note 3

−0.5

−

+0.5

∆G/∆T

gain variation

with temperature

noise ﬁgure

note 6

−60

−30

−

dBm/K

for R_i(dif); notes 1, 3 and 4

note 1

−

3.45 3.85

CP1

−1 dB input

compression point

referenced to input

at T_amb= 25 °C

over temperature range

note 1

−23.5

−24.2

−18

−

dBm

IP₃

third-order intercept

point referenced to

input

DES_3dB

3 dB desensitization

point referenced to

input

∆f_i(RF)= 3 MHz RF input power =

−101 dBm; note 1

−25

−

dBm

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

SYMBOL

PARAMETER

image rejection

CONDITIONS

f_o(IF)= 200 MHz; note 1

bit LNA = 0; notes 1 and 5

MIN. TYP.

MAX.

UNIT

G_off

−

output isolation in

off-state

Receiver IF section (AGC and baseband ﬁlter); the impedance of the source, input balun, matching network

and speciﬁed input is 50 Ω

IF INPUT TO AGC AMPLIFIER (PINS RXIIFA AND RXIIFB)

f_i(IF)

IF input frequency

−

200

−

MHz

R_i(dif)

differential input

resistance

kΩ

P_i(m)

input power matching

note 1

−

−15 −10

BASEBAND INPUT/OUTPUT; RX MODE (PINS IA, IB, QA AND QB)

G_{conv(dif)(min)}

differential voltage

conversion gain per

channel; gain set to

minimum

notes 1 and 7

−2.5 −0.5 +1.5

G_{conv(dif)(max)}

differential voltage

conversion gain per

channel; gain set to

maximum

59.5 61.5 63.5

G_conv(step)

∆G_I-Q

∆ϕ

voltage conversion step note 1

gain

−

gain difference

note 1

−

0.8

between I and Q paths

quadrature-phase error

between I and Q paths

−5

deg

G_L

gain control linearity

noise ﬁgure

note 1

−2

−3

−1

−

notes 1 and 11

within any 20 dB gain range

−

_{conv(dif)(max)}; notes 1 and 9

_{conv(dif)(min)}; notes 1 and 9

−

IP₃

third-order intercept

point referenced to

input

G_{conv(dif)(max)}= 61 dB; note 8

−42

−38

dBm

CP1

−1 dB compression

point referenced to

input

_{conv(dif)(min)}; note 8

−4

−

dBm

CP1_adjacent

−1 dB compression

point for adjacent

channels referenced to

input

G_conv= 49 dB; notes 7 and 6

∆f_mod= n × 200 kHz; n = 1, 2, 3

−45

−40

B_bf(-1dB)

−1 dB baseband ﬁlter

bandwidth

note 10

67.7

−

kHz

∆t_d(g)

group delay variation

DC < ∆f_mod< 67.7 kHz

−

1.5

µS

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

SYMBOL

α_bf5

PARAMETER

baseband ﬁlter

attenuation

(ﬁfth-order Butterworth)

CONDITIONS

MIN. TYP.

MAX.

UNIT

note 10;

∆f_mod= 140 kHz

−

∆f_mod= 200 kHz

∆f_mod= 400 kHz

∆f_mod= 600 kHz

V_{o(pin)(peak)(max)}maximum peak output differential resistance between

0.75

−

voltage per pin giving a QA/QB or IA/IB > = 180 kΩ; note 1

total harmonic

distortion of less

than 3% at G_conv>7

V_OO

output offset voltage

adjustment

G_conv= 31 dB

−60

−

+60

LSB_offset

LSB offset adjustment

offset variation

−

100

+10

∆V_offset

gain from G_{conv(dif)(min)}

to G_{conv(dif)(max)}

−10

−

Transmit IF section; general conditions: V_mod(peak)= 0.25 V; V_I(IQ)= V_O(IQ)= 1.25 V; f_mod= 67.7 kHz

BASEBAND INPUT/OUT; TX MODE (PINS IA, IB, QA AND QB)

∆f_mod

modulation frequency

gain = −3 dB gain

−

MHz

V_mod(peak)

modulation level (peak single-ended

value)

0.225 0.25 0.275

DR_i

dynamic input

resistance

single-ended per pin

−

12.5

−

kΩ

TRANSMITTER IF LC TUNED CIRCUIT (PINS TXIFA AND TXIFB)

f_o(IF)

IF output frequency

−

200

MHz

dBc

LO_out

local oscillator

f_o(IF)= 200 MHz

−40 −30

feedthrough level

P_o

transmit power without f_o(IF)= 200 MHz

−

−16

−

dBm

LC tuned circuit

± 67.7 kHz; measured through a

balun; note 12

IM2_o

IM3_o

IM_o

level of second-order

image products

f_o(IF)= 200 MHz

± 2 × 67.7 kHz; note 12

−

−48 −45

−55 −50

dBc

level of third-order

image products

f_o(IF)= 200 MHz

± 3 × 67.7 kHz; note 12

image level

f_o(IF)= 200 MHz

−34

−

− 67.7 kHz; note 12

ϕ_N

phase noise output

power density

f_offset= 400 kHz

−

−125

dBc/Hz

f_offset= 10 MHz

−140 −133

Transmit modulation loop section; General conditions: V_mod(peak)= 0.25 V; V_I(IQ)= V_O(IQ)= 1.25 V;

f_mod= 67.7 kHz

OFFSET MIXER; GSM BAND (PINS TXIRFA AND TXIRFB)

f_i(RF)(TX)

TX RF VCO input

frequency

880

−

915

MHz

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

SYMBOL

R_i(pin)

C_i(pin)

PARAMETER

CONDITIONS

MIN. TYP.

MAX.

UNIT

input resistance per pin note 13

−

100

−

Ω

input capacitance per

−

P_i

input power

symmetrical

single-ended

note 1

−14.5 −10 −5.5

−11.5 −7 −2.5

−15 −10

dBm

S₁₁

input power matching

−

LO_L

reverse isolation local

oscillator leakage

−

−40

dBm

OFFSET MIXER; DCS BAND (PINS TXIRFA AND TXIRFB)

f_i(RF)(TX)

TX RF VCO input

frequency

1710

−

1785

MHz

R_i(pin)

C_i(pin)

input resistance per pin note 13

−

100

−

Ω

input capacitance per

P_i

input power

symmetrical

−14.5 −10 −5.5

−11.5 −7 −2.5

−15 −10

dBm

single-ended

note 1

S₁₁

input power matching

−

LO_L

reverse isolation local

oscillator leakage

−

−40

dBm

PHASE DETECTOR; DCS AND GSM BAND (PIN PHDOUT)

I_cp(max)

charge pump maximum R = 270 Ω, 1%; V_O= ¹⁄₂V_CCPHD

2.2

2.4

2.6

sink or source current

G_PHD

phase detector gain

−

mA/rad

∆G_PHD

phase detector gain

variation

V_O= ¹⁄₂V_CCPHD; note 11

−20

−

+20

V_O

R_o

N_o

output voltage

0.5

−

_CCPHD− 0.5 V

output resistance

V_O= ¹⁄₂V_CCPHD

−

kΩ

output noise current

density

20 kHz < f_offset< 20 MHz in lock;

note 1

−

200

pA/√Hz

I_sweep

R_o(off)

VCO sweeping source V_O= ¹⁄₂V_CCPHD

current

0.4

0.55 0.7

output resistance to

ground when powered

down

TX mode disabled

−

kΩ

SPUR_4fm

SPUR_8fm

level of spurious signal f_mod= 67.7 kHz;

−

−48

−55

dBc

at four times the

f_o(RF)(GSM)= 880 MHz

wanted f_modsignal

to 915 MHz; f_o(RF)(DCS)= 1710 MHz

to 1785 MHz

level of spurious signal

at eight times the

wanted f_modsignal

LO_out

IM_o

local oscillator

feedthrough level

at f_RF

−

−40 −32

−38 −35

dBc

image level

at f_RF; note 1

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

SYMBOL

PARAMETER

CONDITIONS

MIN. TYP.

MAX.

UNIT

RF LO buffer; measured and guaranteed on evaluation board

RF LO SOURCE CONNECTED TO PIN RFLOE (see Fig.7)

R_i

input resistance

−

Ω

C_i

input capacitance

input power matching

−

S₁₁

P_i(LO)

−

−15 −10

input power acceptable

from the RF LO source

−7

−3

dBm

IF LO; measured and guaranteed on evaluation board

EXTERNAL RESONATOR CIRCUIT CONNECTED TO PINS IFLOC AND IFLOE

f_osc

oscillation frequency

note 1

−

400

−

MHz

V_osc(peak)

peak voltage excursion V_CCIFLO= 2.8 V; see Fig.5

−

1.5

limit at IFLOC

(collector)

ϕ_N

phase noise

f_offset= 400 kHz; f_LO(IF)= 400 MHz

−

−125

dBc/Hz

MHz/V

∆f_TROFF

frequency variation with note 14

supply voltage

(pushing)

∆f_TRON

frequency variation

between RX on and

RX off (pulling)

−

kHz

IF LO buffer; measured and guaranteed on evaluation board

IF SOURCE CONNECTED TO PIN IFLOE

R_i

input resistance

−

Ω

C_i

input capacitance

input power matching

−

P_i(m)

P_IF

−

−15 −10

dBm

power available from

the IF source

see Fig.5

−8

−5

−2

RF and IF synthesizer VCOs

REFERENCE FREQUENCY INPUT (PIN REFIN)

f_ref

reference frequency

−

MHz

V_i(fref)(rms)

input voltage level

(RMS value)

−

250

R_i

C_i

input resistance

f_ref= 13 MHz

−

kΩ

input capacitance

RF SYNTHESIZER; GSM AND DCS MODES (PINS RXIRFA, RXIRFB AND CPORF)

f_LO(RF)

RF LO frequency

1040

−

1720

MHz

kHz

f_ph(comp)

phase comparator

frequency

−

200

−

ϕ_N(GSM)

GSM close-in phase

noise

within the closed-loop bandwidth

P_xtal= 0 dBm; f_LO(RF)= 1.1 GHz

−

−82 −75

dBc/Hz

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

SYMBOL

ϕ_N(DCS)

PARAMETER

CONDITIONS

MIN. TYP.

MAX.

UNIT

DCS close-in phase

noise

within the closed-loop bandwidth

P_xtal= 0 dBm; f_LO(RF)= 1.6 GHz

−

−79 −74

dBc/Hz

V_{fph(comp)(spur)}phase comparator

frequency spurii

f_offset= 200 kHz; second-order loop

ﬁlter closed-loop

−

−75 −60

dBc

breakthrough level

bandwidth = 11 kHz

I_o(cp)

charge pump output

current

sink or source current; at V_o(cp)

1.8

−5

2.2

−

2.6

I_L(cp)(off)

V_o(cp)

charge pump leakage

current in off-state

charge pump output

voltage

I_o(cp)within speciﬁed values

0.4

−

V_CC− 0.4

IF SYNTHESIZER (PINS IFLOC, IFLOE AND CPOIF)

f_LO(IF)

IF LO frequency

380

400 440

MHz

f_ph(comp)

phase comparator

frequency

−

ϕ_N

close-in phase noise

within the closed-loop bandwidth

P_xtal= 0 dBm; f_LO(IF)= 400 MHz

−

−95 −85

−75 −60

dBc/Hz

dBc

V_{fph(comp)(spur)}phase comparator

frequency spurii

f_offset= 1 MHz; second order loop

ﬁlter closed-loop

breakthrough level

bandwidth = 25 kHz

I_o(cp)

charge pump output

current

sink or source current; at V_o(cp)

0.75 1.1

1.35

I_L(cp)(off)

V_o(cp)

charge pump leakage

current in off-state

−5

−

charge pump output

voltage

0.4

V_CC− 0.4

Frequency dividers

D/D_fLO(RF)RF frequency

5200

−

8600

programmable divider

ratio

D/D_fLO(IF)

IF frequency

programmable divider

ratio

−

200

−

D/D_fref(RF)

D/D_fref(IF)

RF reference frequency ﬁxed ratio

divider ratio

−

IF reference frequency

divider ratio

General IC speciﬁcation

t_ON

switch-on time

90% of the ﬁnal current

−

µs

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

Notes

1. Measured and guaranteed only on UAA3522 evaluation board.

2. The IF output has open collectors which are supplied via external inductors. External resistors are also needed to

set the output impedance and to match the IF output to the specified load resistance R_L(see Fig.3).

3. Value includes losses due to the printed circuit board and balun.

4. Value is guaranteed only for the P_i(LO)typ.

5. For a given RF input power, the value is the difference in the power measured at the IF output when the LNA is

switched on and when it is switched off.

6. This value is guaranteed within the temperature range −10 to +70 °C.

7. Voltage gain is defined as the differential baseband output voltage (either at pins IA/IB or pins QA/QB) divided by the

differential input voltage at pins RXIIFA and RXIIFB.

8. Value refers to differential voltage at pins RXIIFA and RXIIFB (1 kΩ input impedance).

9. Value includes printed circuit board and balun losses.

10. R_REFAGC= 18 kΩ, 1%.

11. Guaranteed at T_amb= −30 to +70 °C.

12. With specified LC tuned circuit (33 nH, 15 pF) connected as shown in Fig.4.

13. Defined for the typical input power.

14. Oscillator configured as shown in the evaluation board diagram Fig.7.

handbook, full pagewidth

50 Ω

RXIRFA

RXIRFB

LOW

LOSS

BALUN

RXOIFA

BALUN

1 kΩ/50 Ω

RECEIVER

Z = 1 kΩ

50 Ω

RXOIFB

input port

output port

FCA047

Fig.3 RF receiver test principle.

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

handbook, full pagewidth

EXTERNAL

IF FILTER

15 pF

33 nH

330 Ω

TXIFA

TXIFB

2 kΩ

FCA045

Fig.4 I/Q modulator output.

handbook, full pagewidth

CCIFLO

1 kΩ

UAA3522HL

IFLOC

IFLOE

IF VCO

XTAL

IF SOURCE

GNDIFLO

FCA048

Fig.5 Evaluating IF LO buffer.

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

SERIAL TIMING CHARACTERISTICS

General conditions: V_CC= 2.8 V; T_amb= 25 °C; see Fig.6; unless otherwise speciﬁed.

SYMBOL

PARAMETER

MIN.

TYP. MAX. UNIT

Serial programming clock (pin CLK)

t_r

rise time

−

t_f

fall time

−

T_cy(clk)

clock cycle time

100

Enable programming (pin EN)

t_d(ENL-CLKH)

t_d(CLKL-ENH)

t_W(reg)(min)

delay from enable active to rising clock edge

−

delay from enable inactive to last falling clock edge

minimum inactive pulse width when consecutively programming

two different registers

150

t_W(IFLO)(min)

t_W(RFLO)(min)

t_su(ENH-CLKH)

minimum inactive pulse width when consecutively programming

two IF divider ratios

150

500

−

minimum inactive pulse width when consecutively programming

two RF divider ratios

enable set-up time to next rising clock edge

t_su(DATA-CLK)

t_h(DATA-CLK)

set-up time DATA to CLK

hold time DATA to CLK

−

handbook, full pagewidth

d(CLKL-ENH)

su(DATA-CLK)

h(DATA-CLK)

su(ENH-CLKH

)

cy(CLK)

CLK

DATA

MSB

LSB

ADDRESS

INACTIVE

ACTIVE

FCA042

d(ENL-CLKH)

Fig.6 Serial bus timing diagram.

2000 Feb 18

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RX RF

100

2.2 pF

12 nH

RX IF

27 pF

18 pF

27 pF

22 nH

27 pF

150 nH

3.9 pF

ATTENUATOR

150 nH

10 pF

18 pF

10 pF

47 nH

100 nH

12 nH

1.5 kΩ

270 Ω

TX RF

VCO

12 pF

46 45 44 43 42 41 40

39 38 37

48 47

220 Ω

1.8 nF

100 pF

18 Ω

RXON

27 nF

22 pF

18 kΩ

UAA3522HL

3.9 pF

120 pF

470 nH

22 pF

RXIIFA

RXIIFB

150 nH

3.9 pF

RX RF

VCO

RX IF

SYNON

120 pF

150 nH

TXON

1 nF

3.3

kΩ

15 16 17 18 19 20 21

22 23 24

13 14

12 nF

(chip)

(board)

13 MHz

SERIAL

8.2 pF

BB149

100

1 nF

200 mV

33 pF

22 nH

330 Ω

10 kΩ

39 pF

3.3

kΩ

SERIAL

PROGRAMMING

BUS LINES

(chip)

PROGRAMMING

BUS LINES

(board)

470

SERIAL

PROGRAMMING

BUS LINES

6.8

100 pF

FCA044

This schematic represents the UAA3522HL characterisation board for GSM application and does not guarantee full specification for any particular application.

Fig.7 Evaluation board.

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ahdnbok,uflapegwidt

90°

PHASE

SHIFTER

1805 to1880 MHz

90°

PHASE

SHIFTER

BALUN

ADDER

0°

SAW

UAA2077XM

46, 47

8, 9

90°

PHASE

SHIFTER

4, 5

2, 3

925 to 960 MHz

90°

41,

0°

IF VCO

400 MHz

PHASE

SHIFTER

BALUN

ADDER

0°

90°

13,

DIVIDER &

PHASE

SHIFTER

IF VCO

XTAL

UAA3522HL

PROGRAMMABLE

DIVIDER

30, 31

DCS RF

RX VCO

1510 to 1680

MHz

GSM RF

RX VCO

1080 to 1160

MHz

IF PHASE/

FREQUENCY

DETECTOR

CHARGE

PUMP

PROGRAMMABLE

DIVIDER

RF PHASE/

FREQUENCY

DETECTOR

CHARGE

PUMP

DIVIDER

÷13

REF OSC.

13 MHz

RX/TX

SWITCH

880 to 915 MHz

GSM BAND

38, 39

0°

ADDER

4, 5

2, 3

GSM TX RF VCO

880 to 915 MHz

90°

PHASE

DETECTOR

CHARGE

PUMP

44, 45

1710 to 1785 MHz

DCS BAND

POWER

AMPLIFIER

DCS TX RF VCO

1710 to 1785 MHz

FCA004

Fig.8 Typical application block diagram of a GSM dual-band solution using the UAA2077XM DCS front-end and the UAA3522HL transceiver.

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

PACKAGE OUTLINE

LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm

SOT313-2

(A )

w M

pin 1 index

detail X

v M

w M

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

UNIT

max.

7^o

0^o

0.20 1.45

0.05 1.35

0.27 0.18 7.1

0.17 0.12 6.9

7.1

6.9

9.15 9.15

8.85 8.85

0.75

0.45

0.95 0.95

0.55 0.55

1.60

0.25

0.5

1.0

0.2 0.12 0.1

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

EIAJ

99-12-27

00-01-19

SOT313-2

136E05

MS-026

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

SOLDERING

The footprint must incorporate solder thieves at the

downstream end.

Introduction to soldering surface mount packages

• For packages with leads on four sides, the footprint must

be placed at a 45° angle to the transport direction of the

printed-circuit board. The footprint must incorporate

solder thieves downstream and at the side corners.

This text gives a very brief insight to a complex technology.

A more in-depth account of soldering ICs can be found in

our “Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).

During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be

applied by screen printing, pin transfer or syringe

dispensing. The package can be soldered after the

adhesive is cured.

There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable

for surface mount ICs, or for printed-circuit boards with

high population densities. In these situations reflow

soldering is often used.

Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.

Reﬂow soldering

Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied

to the printed-circuit board by screen printing, stencilling or

pressure-syringe dispensing before package placement.

Manual soldering

Fix the component by first soldering two

diagonally-opposite end leads. Use a low voltage (24 V or

less) soldering iron applied to the flat part of the lead.

Contact time must be limited to 10 seconds at up to

300 °C.

Several methods exist for reflowing; for example,

infrared/convection heating in a conveyor type oven.

Throughput times (preheating, soldering and cooling) vary

between 100 and 200 seconds depending on heating

method.

When using a dedicated tool, all other leads can be

soldered in one operation within 2 to 5 seconds between

270 and 320 °C.

Typical reflow peak temperatures range from

215 to 250 °C. The top-surface temperature of the

packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended

for surface mount devices (SMDs) or printed-circuit boards

with a high component density, as solder bridging and

non-wetting can present major problems.

To overcome these problems the double-wave soldering

method was specifically developed.

If wave soldering is used the following conditions must be

observed for optimal results:

• Use a double-wave soldering method comprising a

turbulent wave with high upward pressure followed by a

smooth laminar wave.

• For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the

transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the

printed-circuit board.

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

Suitability of surface mount IC packages for wave and reﬂow soldering methods

SOLDERING METHOD

PACKAGE

BGA, LFBGA, SQFP, TFBGA

WAVE

not suitable

REFLOW⁽¹⁾

suitable

HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS

PLCC⁽³⁾, SO, SOJ

not suitable⁽²⁾

suitable

LQFP, QFP, TQFP

not recommended⁽³⁾⁽⁴⁾suitable

not recommended⁽⁵⁾

suitable

SSOP, TSSOP, VSO

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package

cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the

Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DEFINITIONS

Data sheet status

Objective speciﬁcation

Preliminary speciﬁcation

Product speciﬁcation

This data sheet contains target or goal speciﬁcations for product development.

This data sheet contains preliminary data; supplementary data may be published later.

This data sheet contains ﬁnal product speciﬁcations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation

of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation

is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these

products can reasonably be expected to result in personal injury. Philips customers using or selling these products for

use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such

improper use or sale.

2000 Feb 18

Philips Semiconductors

Objective speciﬁcation

Low power dual-band GSM transceiver

with an image rejecting front-end

UAA3522HL

NOTES

2000 Feb 18

Philips Semiconductors – a worldwide company

Argentina: see South America

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. +31 40 27 82785, Fax. +31 40 27 88399

Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,

Tel. +61 2 9704 8141, Fax. +61 2 9704 8139

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. +64 9 849 4160, Fax. +64 9 849 7811

Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210

Norway: Box 1, Manglerud 0612, OSLO,

Tel. +47 22 74 8000, Fax. +47 22 74 8341

Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773

Pakistan: see Singapore

Belgium: see The Netherlands

Brazil: see South America

Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,

Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474

Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,

Tel. +359 2 68 9211, Fax. +359 2 68 9102

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,

Tel. +48 22 5710 000, Fax. +48 22 5710 001

Portugal: see Spain

Romania: see Italy

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,

Tel. +1 800 234 7381, Fax. +1 800 943 0087

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,

72 Tat Chee Avenue, Kowloon Tong, HONG KONG,

Tel. +852 2319 7888, Fax. +852 2319 7700

Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. +7 095 755 6918, Fax. +7 095 755 6919

Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Colombia: see South America

Czech Republic: see Austria

Tel. +65 350 2538, Fax. +65 251 6500

Slovakia: see Austria

Slovenia: see Italy

Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,

Tel. +45 33 29 3333, Fax. +45 33 29 3905

South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,

Tel. +27 11 471 5401, Fax. +27 11 471 5398

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. +358 9 615 800, Fax. +358 9 6158 0920

France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. +33 1 4099 6161, Fax. +33 1 4099 6427

South America: Al. Vicente Pinzon, 173, 6th floor,

04547-130 SÃO PAULO, SP, Brazil,

Tel. +55 11 821 2333, Fax. +55 11 821 2382

Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. +49 40 2353 60, Fax. +49 40 2353 6300

Spain: Balmes 22, 08007 BARCELONA,

Tel. +34 93 301 6312, Fax. +34 93 301 4107

Hungary: see Austria

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,

Tel. +46 8 5985 2000, Fax. +46 8 5985 2745

India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,

Tel. +91 22 493 8541, Fax. +91 22 493 0966

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. +41 1 488 2741 Fax. +41 1 488 3263

Indonesia: PT Philips Development Corporation, Semiconductors Division,

Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,

Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,

TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. +353 1 7640 000, Fax. +353 1 7640 200

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,

Tel. +66 2 745 4090, Fax. +66 2 398 0793

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,

TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,

ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813

Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),

Tel. +39 039 203 6838, Fax +39 039 203 6800

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,

252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,

TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,

MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. +82 2 709 1412, Fax. +82 2 709 1415

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,

Tel. +1 800 234 7381, Fax. +1 800 943 0087

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. +60 3 750 5214, Fax. +60 3 757 4880

Uruguay: see South America

Vietnam: see Singapore

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Middle East: see Italy

Tel. +381 11 3341 299, Fax.+381 11 3342 553

For all other countries apply to: Philips Semiconductors,

Internet: http://www.semiconductors.philips.com

International Marketing & Sales Communications, Building BE-p, P.O. Box 218,

5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

SCA

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

403506/01/pp28

Date of release: 2000 Feb 18

Document order number: 9397 750 06451

UAA3522HL [NXP]

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