74VHC74MTCX [ONSEMI]
双 D 型触发器,带预置和清除;型号: | 74VHC74MTCX |
厂家: | ONSEMI |
描述: | 双 D 型触发器,带预置和清除 PC 光电二极管 逻辑集成电路 触发器 |
文件: | 总7页 (文件大小:477K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
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subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
74VHC74
Dual D-Type Flip-Flop with Preset and Clear
Features
General Description
■ High Speed: f
= 170MHz (typ.) at T = 25°C
The VHC74 is an advanced high speed CMOS Dual
D-Type Flip-Flop fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar
to equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. The signal level applied to
the D input is transferred to the Q output during the posi-
tive going transition of the CK pulse. CLR and PR are
independent of the CK and are accomplished by setting
the appropriate input LOW.
MAX
A
■ High noise immunity: V
= V
= 28% V (min.)
NIH
NIL CC
■ Power down protection is provided on all inputs
■ Low power dissipation: I = 2µA (max.) at T = 25°C
CC
A
■ Pin and function compatible with 74HC74
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Package
Order Number
Number
Package Description
74VHC74M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
74VHC74SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC74MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
74VHC74N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1992 Semiconductor Components Industries, LLC.
August-2017, Rev. 2
Publication Order Number:
74VHC74/D
Connection Diagram
Logic Symbol
IEEE/IEC
Truth Table
Pin Description
Inputs
Outputs
Pin Names
Description
CLR PR
D
X
X
X
L
CK
X
Q
L
Q
H
L
Function
Clear
D , D
Data Inputs
1
2
L
H
L
H
L
CK , CK
Clock Pulse Inputs
Direct Clear Inputs
Direct Preset Inputs
Output
1
2
X
H
Preset
CLR , CLR
1
2
(1)
(1)
L
X
H
H
PR , PR
1
2
H
H
H
H
H
H
L
H
L
Q , Q , Q , Q
2
1
1
2
H
X
H
Q
Q
No Change
n
n
Note:
1. This configuration is nonstable; that is, it will not persist
when preset and clear inputs return to their inactive
(HIGH) state.
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2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
V
Supply Voltage
–0.5V to +7.0V
–0.5V to +7.0V
CC
V
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
IN
V
–0.5V to V + 0.5V
OUT
CC
I
–20mA
20mA
IK
I
OK
I
25mA
OUT
I
DC V /GND Current
50mA
CC
CC
T
Storage Temperature
–65°C to +150°C
260°C
STG
T
Lead Temperature (Soldering, 10 seconds)
L
(2)
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. ON
Semiconductor does not recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Rating
V
Supply Voltage
2.0V to +5.5V
0V to +5.5V
0V to V
CC
V
Input Voltage
IN
V
Output Voltage
OUT
CC
T
Operating Temperature
Input Rise and Fall Time,
–40°C to +85°C
OPR
t , t
r
f
V
V
= 3.3V 0.3V
= 5.0V 0.5V
0ns/V 100ns/V
0ns/V 20ns/V
CC
CC
Note:
2. Unused inputs must be held HIGH or LOW. They may not float.
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3
DC Electrical Characteristics
T = –40°C to
A
T = 25°C
+85°C
A
Symbol
Parameter
V
(V)
Conditions
Min.
Typ.
Max.
Min.
Max.
Units
CC
2.0
V
HIGH Level Input
Voltage
1.50
1.50
V
IH
3.0–5.5
2.0
0.7 x V
0.7 x V
CC
CC
V
LOW Level Input
Voltage
0.50
0.50
V
V
IL
3.0–5.5
2.0
0.3 x V
0.3 x V
CC
CC
V
HIGH Level
Output Voltage
V
or V
= V
I
= –50µA
1.9
2.9
2.0
3.0
4.5
1.9
2.9
OH
IN
IH
OH
IL
3.0
4.5
4.4
4.4
3.0
I
I
I
= –4mA
= –8mA
= 50µA
2.58
3.94
2.48
3.80
OH
OH
OL
4.5
V
LOW Level
Output Voltage
2.0
V
or V
= V
IH
0.0
0.0
0.0
0.1
0.1
0.1
0.1
V
OL
IN
IL
3.0
4.5
0.1
0.1
3.0
I
I
= 4mA
= 8mA
0.36
0.36
0.1
0.44
0.44
1.0
OL
OL
4.5
I
Input Leakage
Current
0–5.5
V
V
= 5.5V or GND
µA
µA
IN
IN
IN
I
Quiescent
5.5
= V or GND
2.0
20.0
CC
CC
Supply Current
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4
AC Electrical Characteristics
T = –40°C
A
T = 25°C
to +85°C
A
Symbol
Parameter
V
(V)
Conditions Min. Typ. Max. Min. Max. Units
CC
f
Maximum Clock
Frequency
3.3 0.3 C = 15pF
80
50
125
75
70
45
MHz
MAX
L
C = 50pF
L
5.0 0.5 C = 15pF
130
90
170
115
6.7
9.2
4.6
6.1
7.6
10.1
4.8
6.3
4
110
75
L
C = 50pF
L
t
t
, t
Propagation Delay
Time (CK-Q, Q)
3.3 0.3 C = 15pF
11.9
15.4
7.3
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
14.0
17.5
8.5
ns
PLH PHL
L
C = 50pF
L
5.0 0.5 C = 15pF
L
C = 50pF
9.3
10.5
14.5
18.0
9.0
L
, t
Propagation Delay
Time (CLR, PR -Q, Q)
3.3 0.3 C = 15pF
12.3
15.8
7.7
ns
PLH PHL
L
C = 50pF
L
5.0 0.5 C = 15pF
L
C = 50pF
9.7
11.0
10
L
C
Input Capacitance
V
= Open
10
pF
pF
IN
CC
(3)
C
Power Dissipation
Capacitance
25
PD
Note:
3. C is defined as the value of the internal equivalent capacitance which is calculated from the operating
PD
current consumption without load. Average operating current can be obtained from the equation:
I
(opr.) = C • V • f + I / 2 (per F/F).
CC
PD CC IN CC
AC Operating Requirements
T = –40°C
A
T = 25°C
to +85°C
A
Guaranteed
Minimum
(4)
Symbol
Parameter
V
(V)
Typ.
Units
CC
t (L), t (H) Minimum Pulse Width (CK)
3.3
6.0
7.0
ns
W
W
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
5.0
6.0
5.0
6.0
5.0
0.5
0.5
5.0
3.0
5.0
7.0
5.0
7.0
5.0
0.5
0.5
5.0
3.0
t (L)
Minimum Pulse Width (CLR, PR)
Minimum Setup Time
ns
ns
ns
ns
W
t
S
H
t
Minimum Hold Time
t
Minimum Recovery Time (CLR, PR)
REC
Note:
4. V is 3.3 0.3V or 5.0 0.5V
CC
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5
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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❖
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