BU406TU [ONSEMI]
NPN 双极功率晶体管;
| 型号： | BU406TU |
| 厂家： | 
ONSEMI |
| 描述： | NPN 双极功率晶体管 局域网 开关 晶体管 功率双极晶体管 |
| 文件： | 总3页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BU406, BU407
NPN Power Transistors
These devices are high voltage, high speed transistors for horizontal
deflection output stages of TV’s and CRT’s.
Features
• High Voltage: V
= 330 or 400 V
CEV
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• Fast Switching Speed: t = 750 ns (max)
f
• Low Saturation Voltage: V
• Pb−Free Packages are Available*
= 1 V (max) @ 5 A
CE(sat)
NPN SILICON
POWER TRANSISTORS
7 AMPERES − 60 WATTS
150 AND 200 VOLTS
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Collector−Emitter Voltage
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
BU406
V
200
150
Vdc
CEO
BU407
BU406
BU407
V
400
330
Vdc
Vdc
CEV
CBO
EBO
TO−220AB
CASE 221A−09
STYLE 1
BU406
BU407
V
V
400
330
6
Vdc
Adc
Collector Current − Continuous
− Peak Repetitive
I
C
7
10
15
1
2
3
− Peak (10 ms)
Base Current
I
4
Adc
B
MARKING DIAGRAM
Total Device Dissipation @ T = 25_C
P
60
0.48
W
W/_C
C
D
Derate above 25°C
Operating and Storage Junction
Temperature Storage
T , T
−65 to 150
_C
J
stg
BU40xG
AY WW
THERMAL CHARACTERISTICS
Characteristics
Symbol
Max
2.08
70
Unit
_C/W
_C/W
_C
Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Ambient
R
q
JC
R
q
JA
Maximum Lead Temperature for Soldering
Purposes1/8″ from Case for 5 Seconds
T
L
260
BU40x = Specific Device Code
x = 6 or 7
A
Y
WW
G
= Assembly Location
= Year
= Work Week
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
= Pb−Free Package
ORDERING INFORMATION
Device
BU406
Package
Shipping
TO−220AB
50 Units / Rail
50 Units / Rail
BU406G
TO−220AB
(Pb−Free)
BU407
TO−220AB
50 Units / Rail
50 Units / Rail
BU407G
TO−220AB
(Pb−Free)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
May, 2009 − Rev. 8
BU406/D
BU406, BU407
ELECTRICAL CHARACTERISTICS (T = 25_C unless otherwise noted)
C
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 1)
BU406
BU407
V
200
150
−
−
−
−
Vdc
CEO(sus)
(I = 100 mAdc, I = 0)
C
B
Collector Cutoff Current
I
mAdc
CES
(V = Rated V
, V = 0)
CE
CE
CEV BE
CEO
CEO
−
−
−
−
−
−
5
0.1
1
(V = Rated V
+ 50 Vdc, V = 0)
BE
(V = Rated V
+ 50 Vdc, V = 0, T = 150_C)
CE
BE
C
Emitter Cutoff Current
(V = 6 Vdc, I = 0)
BU406, BU407
I
−
−
1
mAdc
EBO
EB
C
ON CHARACTERISTICS (Note 1)
Collector−Emitter Saturation Voltage
V
−
−
−
−
−
−
1
1.2
2
Vdc
Vdc
CE(sat)
(I = 5 Adc, I = 0.5 Adc)
C
B
Base−Emitter Saturation Voltage
(I = 5 Adc, I = 0.5 Adc)
V
BE(sat)
C
B
Forward Diode Voltage
V
C
Volts
EC
(I = 5 Adc) “D” only
EC
DYNAMIC CHARACTERISTICS
Current−Gain − Bandwidth Product
f
T
10
−
−
−
MHz
pF
(I = 0.5 Adc, V = 10 Vdc, f
= 20 MHz)
C
CE
test
Output Capacitance
−
80
ob
(V = 10 Vdc, I = 0, f = 1 MHz)
CB
E
SWITCHING CHARACTERISTICS
Inductive Load Crossover Time
t
c
−
−
0.75
ms
(V = 40 Vdc, I = 5 Adc, I = I = 0.5 Adc, L = 150 mH)
CC
C
B1
B2
1. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 1%.
100
10
T = 100°C
J
70
dc
25°C
50
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
1
V
CE
= 5 V
30
20
0.1
BU407
BU406
T
= 25°C
C
10
0.1
0.2 0.3 0.5
0.7
1
2
3
5
7
10
2
3
5
7
10
V , COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
20 30
50 70 100
200
I , COLLECTOR CURRENT (AMPS)
C
Figure 1. DC Current Gain
Figure 2. Maximum Rated Forward
Bias Safe Operating Area
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2
BU406, BU407
PACKAGE DIMENSIONS
TO−220AB
CASE 221A−09
ISSUE AF
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
SEATING
PLANE
−T−
C
S
B
F
T
INCHES
DIM MIN MAX
MILLIMETERS
4
MIN
14.48
9.66
4.07
0.64
3.61
2.42
2.80
0.36
12.70
1.15
4.83
2.54
2.04
1.15
5.97
0.00
1.15
---
MAX
15.75
10.28
4.82
0.88
4.09
2.66
3.93
0.64
14.27
1.52
5.33
3.04
2.79
1.39
6.47
1.27
---
A
B
C
D
F
0.570
0.380
0.160
0.025
0.142
0.095
0.110
0.014
0.500
0.045
0.190
0.100
0.080
0.045
0.235
0.000
0.045
---
0.620
0.405
0.190
0.035
0.161
0.105
0.155
0.025
0.562
0.060
0.210
0.120
0.110
0.055
0.255
0.050
---
A
K
Q
Z
1
2
3
U
H
G
H
J
K
L
N
Q
R
S
T
L
R
J
V
G
U
V
Z
D
0.080
2.04
N
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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For additional information, please contact your local
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BU406/D
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