ESDR0502N [ONSEMI]
Ultra Low Capacitance ESD Protection Array for High Speed Data Line Protection; 超低电容ESD保护阵列高速数据线路保护
| 型号： | ESDR0502N |
| 厂家： | 
ONSEMI |
| 描述： | Ultra Low Capacitance ESD Protection Array for High Speed Data Line Protection |
| 文件： | 总5页 (文件大小：150K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ESDR0502N
Ultra Low Capacitance ESD
Protection Array for High
Speed Data Line Protection
The ESDR0502N ultra low capacitance TVS array is designed to
protect high speed data lines from ESD. Ultra−low capacitance and
high level of ESD protection makes this device well suited for use in
USB 2.0 applications.
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6
Features
• Low Capacitance (0.3 pF Typical Between I/O Lines and Ground)
• IEC 61000−4−2 Level 4
1
4
5
• UL Flammability Rating of 94 V−0
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• High Speed Communication Line Protection
• USB 2.0 High Speed Data Line and Power Line Protection
• Monitors and Flat Panel Displays
• MP3
UDFN6
MU SUFFIX
CASE 517AA
• Gigabit Ethernet
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
MARKING DIAGRAM
Rating
Symbol
Value
−40 to +125
100
Unit
°C
D M
G
Operating Junction Temperature Range
Peak Power Dissipation
8x20 ms @ T = 25°C (Note 1)
T
J
P
pk
W
D
= Specific Device Code*
(Rotated 90° clockwise)
= Date Code & Assembly Location
= Pb−Free Device
A
Peak Power Current
8x20 ms @ T = 25°C (Note 1)
I
pp
3.0
A
M
G
A
Storage Temperature Range
T
stg
−55 to +150
°C
°C
PINOUT
Lead Solder Temperature −
Maximum (10 Seconds)
T
L
260
1
2
3
6
5
4
IEC 61000−4−2 Contact (ESD)
ESD
8.0
kV
GND
NC
VBUS
D+
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Nonrepetitive current pulse (pin 6 to pin 1).
NC
D−
(Top View)
ORDERING INFORMATION
†
Device
Package
Shipping
ESDR0502NMUTBG UDFN6
3000 /
(Pb−Free)
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2009
1
Publication Order Number:
November, 2009 − Rev. 0
ESDR0502N/D
ESDR0502N
ELECTRICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
A
I
Symbol
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
I
F
I
PP
V
C
PP
V
RWM
Working Peak Reverse Voltage
V
C
V
V
BR RWM
I
Maximum Reverse Leakage Current @ V
V
R
RWM
I
V
F
R
T
I
V
BR
Breakdown Voltage @ I
Test Current
T
I
T
I
F
Forward Current
I
PP
V
F
Forward Voltage @ I
F
P
Peak Power Dissipation
Capacitance @ V = 0 and f = 1.0 MHz
pk
Uni−Directional TVS
C
R
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (T =25°C unless otherwise specified)
J
Parameter
Reverse Working Voltage
Breakdown Voltage
Symbol
Conditions
Min
Typ
Max
Unit
V
V
RWM
(Note 2)
= 1 mA, (Note 3)
5.5
V
BR
I
T
6.0
V
Reverse Leakage Current
ESD Clamping Voltage
Junction Capacitance
Junction Capacitance
I
V
= 5.5 V
1.0
mA
R
RWM
V
Per IEC61000−4−2 (Note 4)
See Figures 1 & 2
C
C
C
V
R
V
R
= 0 V, f = 1 MHz between I/O Pins and GND
= 0 V, f = 1 MHz between I/O Pins
0.3
0.3
0.6
0.6
pF
pF
J
J
2. TVS devices are normally selected according to the working peak reverse voltage (V
or continuous peak operating voltage level.
), which should be equal or greater than the DC
RWM
3. V is measured at pulse test current I .
BR
T
4. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot
Figure 2. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Negative 8 kV Contact per IEC61000−4−2
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2
ESDR0502N
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
I
peak
Test
Voltage
(kV)
First Peak
Current
(A)
100%
90%
Current at
30 ns (A)
Current at
60 ns (A)
Level
1
2
3
4
2
4
6
8
7.5
15
4
8
2
4
6
8
I @ 30 ns
22.5
30
12
16
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
Oscilloscope
ESD Gun
TVS
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
100
t
r
PEAK VALUE I
@ 8 ms
RSM
90
80
70
60
50
40
30
20
PULSE WIDTH (t ) IS DEFINED
P
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE I /2 @ 20 ms
RSM
t
P
10
0
0
20
40
t, TIME (ms)
60
80
Figure 5. 8 X 20 ms Pulse Waveform
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3
ESDR0502N
APPLICATION INFORMATION
Protecting USB 2.0 Interfaces
voltage (plus one diode drop), the internal rectifiers are
forward biased conducting the transient current away from
the protected controller chip. The TVS diode suppresses
ESD strikes directly on the voltage bus and directs the surge
to ground, protecting both the power and data pins.
The USB interface consists of Data (D− and D+) lines and
a 5.5 V bus, which are all vulnerable to ESD and cable
discharge events. Each ESDR0502N device will protect the
four USB connections (V , D+, D−, and GND) of one USB
CC
port. When the voltage on the data lines exceed the bus
USB Controller
USB Connector
VBUS
1
6
5
4
D+
2
3
D+
D−
D−
ESDR0502N
GND
Figure 6.
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4
ESDR0502N
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA−01
ISSUE C
EDGE OF PACKAGE
NOTES:
A
B
D
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
L1
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
PIN ONE
E
DETAIL A
REFERENCE
Bottom View
MILLIMETERS
2X
DIM MIN
0.45
A1 0.00
MAX
0.55
0.05
(Optional)
A
0.10
C
MOLD CMPD
EXPOSED Cu
TOP VIEW
A3
b
D
E
0.127 REF
2X
0.15
0.25
0.10
C
C
1.20 BSC
1.00 BSC
0.40 BSC
A3
e
L
0.30
0.40
0.15
0.50
(A3)
L1 0.00
L2 0.40
0.10
0.08
A1
DETAIL B
Side View
(Optional)
A
SEATING
PLANE
10X
MOUNTING FOOTPRINT*
C
SIDE VIEW
6X
0.42
C
6X
0.22
A1
5X L
3
1
L2
6X b
6
4
0.40
PITCH
0.10
0.05
C
A B
1.07
e
C
NOTE 3
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
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PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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USA/Canada
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Phone: 421 33 790 2910
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Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
ESDR0502N/D
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