FAN25800AUCF27X [ONSEMI]
Low-Noise, LDO Regulator;
| 型号： | FAN25800AUCF27X |
| 厂家： | 
ONSEMI |
| 描述： | Low-Noise, LDO Regulator |
| 文件： | 总11页 (文件大小：1145K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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April 2015
FAN25800
500 mA, Low-IQ, Low-Noise, LDO Regulator
Features
Description
.
.
.
.
VIN: 2.3 V to 5.5 V
The FAN25800 is a linear low-dropout regulator with a
high PSRR (85 dB at 100 Hz) and low output noise
(typically 8 µVRMS over a 10 Hz to 100 kHz bandwidth).
The LDO can provide up to 500 mA of output current.
VOUT = 2.7 V, 3.3 V (IOUT Max. = 500 mA)
VOUT = 2.8 V (IOUT Max. = 250 mA)
Output Noise Density at 250 mA and
10 kHz = 19 nV/√Hz (Integrated 8 µVrms)
The enable control pin can be used to shut down the
device and disconnect the output load from the input.
During shutdown, the supply current drops below 1 µA.
.
Low IQ of 17 µA in Regulation and Low-IQ Dropout
Mode with Optimized Dropout Transitions
The FAN25800 is designed to be stable with space-
saving ceramic capacitors as small as 0201 case size.
The FAN25800 is available in a 4-bump, 0.35 mm pitch,
WLCSP package.
.
.
.
.
.
.
<70 mV Dropout Voltage at 250 mA Load
Controlled Soft-Start to Reduce Inrush Current
Thermal Shutdown Protection (TSD)
Input Under-Voltage Lockout (UVLO)
Short-Circuit Protection (SCP)
VIN
1.5µF
FAN25800
VOUT
Stable with Two 1.5 µF, 0201 Ceramic Capacitors
at VOUT
1.5µF 1.5µF
.
4-Ball WLCSP, 0.65 mm x 0.65 mm, 0.35 mm
Pitch, Plated Solder, 330 µm Maximum Thickness
EN
Applications
Figure 1. Typical Application
.
.
.
WiFi Modules
PDA Handsets
Smart Phones, Tablets, Portable Devices
Ordering Information
Operating
Temperature
Packing
Method
Part Number(1)
VOUT
IOUT_MAX
Package
FAN25800AUC33X
FAN25800AUC28X
FAN25800AUCF27X
Note:
3.3 V
2.8 V
2.7 V
500 mA
250 mA
500 mA
4-Bump, WLCSP, 0.65 x
0.65 mm, 0.35 mm Pitch
-40°C to 85°C
Tape & Reel
1. For other trim options, please contact a Fairchild representative.
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN25800 • Rev. 1.5
Block Diagram
VIN
VOUT
CIN
COUT
FILTER
VREF
EN
GND
Figure 2. IC and System Block Diagram
Table 1. Recommended External Components
Component
Description
Vendor
Parameter Typ. Unit
CIN
1.5 µF, 6.3 V, X5R, 0201
2x1.5 µF, 6.3 V, X5R, 0201
1.0 µF, 6.3 V, X5R, 0201
Murata GRM033R60J155M
Murata GRM033R60J155M
Murata GRM033R60J105M
1.5(2) µF
1.5(2) µF
1.0(2) µF
COUT
C
(3)
CAlternative
Notes:
2. Capacitance value does not reflect effects of bias, tolerance, and temperature. See Recommended Operating
Conditions and Operation Description sections for more information.
3. CAlternative can be used for both CIN and COUT. FAN25800 is stable with one 1 µF at CIN and one 1 µF at COUT
.
Pin Configuration
A1 A2 VOUT
VOUT A2 A1
VIN
EN
VIN
EN
B1
B1 B2
B2
GND
GND
Figure 3. Top-Through View
Figure 4. Bottom View
Pin Definitions
Pin #
Name
Description
Input Voltage. Connect to input power source and CIN.
Output Voltage. Connect to COUT and load.
A1
A2
VIN
VOUT
Enable. The device is in Shutdown Mode when this pin is LOW. No internal pull-down.
B1
B2
EN
Do not leave this pin floating. Recommended to not tie EN pin directly to VIN.(4)
Ground. Power and IC ground. All signals are referenced to this pin.
GND
Note:
4. Recommended to use logic voltage of 1.8 V to drive the EN pin.
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN25800 • Rev. 1.5
2
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Input Voltage with Respect to GND
Min.
Max.
Unit
VIN
VCC
TJ
-0.3
-0.3
-40
-65
6.0
VIN+0.3(5)
+150
V
Voltage on Any Other Pin (with Respect to GND)
Junction Temperature
V
°C
°C
°C
TSTG
TL
Storage Temperature
+150
Lead Soldering Temperature, 10 Seconds
+260
Human Body Model,
ANSI/ESDA/JEDEC JS-001-2012
4000
1500
Electrostatic Discharge
Protection Level
ESD
V
Charged Device Model per JESD22-C101
LU
Latch Up
JESD 78D
Note:
5. Lesser of 6.0 V or VIN + 0.3 V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
Min. Typ. Max. Unit
VIN
Supply Voltage
Output Current (VOUT = 2.7 V, 3.3 V)
2.3
5.5(6)
500
500
250
V
(7)
IOUT_MAX
mA
mA
mA
µF
µF
°C
IOUT_Recommend Output Current (VOUT = 3.3 V)
Output Current (VOUT = 2.7 V, 2.8 V)
CIN
COUT
TA
Input Capacitor (Effective Capacitance)(8)
Output Capacitor (Effective Capacitance)(8)
Ambient Temperature
0.4
0.4
0.8
0.8
15.0
+85
–40
–40
TJ
Junction Temperature
+125
°C
Note:
6. For VIN ≥ 3.4 V, thermal properties of the device must be taken into account at maximum load of 500 mA; refer to
JA thermal properties.
7. IOUT_MAX is for VIN = VOUT + 0.3 V.
8. Effective capacitance, including the effects of bias, tolerance, and temperature. See the Operation Description
section for more information.
Thermal Properties
Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with
four-layer 2s2p boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed
junction temperature, TJ(max), at a given ambient temperature, TA.
Symbol
Parameter
Junction-to-Ambient Thermal Resistance
Typ.
Unit
180
°C/W
JA
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN25800 • Rev. 1.5
3
Electrical Specifications
Minimum and maximum values are at VIN = VOUT + 0.3 V; TA = -40°C to +85°C; and test circuit shown in Figure 1.
Typical values are at VIN = VOUT + 0.3 V, TA = 25°C, ILOAD = 10 mA, and VEN = 1.8 V, unless otherwise noted.
Symbol
LDO
Parameter
Conditions
Min. Typ. Max. Unit
VIN = VOUT + 0.3 V to 4.2 V, ILOAD = 0 mA
Dropout(10), ILOAD = 0 mA
f = 50 Hz
17.0 25.0
µA
IIN
PSRR
en
VIN Supply Current
18.5 30.0
84
85
84
f = 100 Hz
f = 1 kHz
IOUT = 10 mA, VIN = 3.6 V,
VOUT = 3.3 V
f = 10 kHz
f = 50 Hz
79
dB
68
Power Supply Rejection
Ratio(9)
f = 100 Hz
f = 1 kHz
73
75
76
IOUT = 250 mA, VIN = 3.6 V,
VOUT = 3.3 V
f = 10 kHz
IOUT = 10 mA
IOUT = 250 mA
IOUT = 10 mA
IOUT = 250 mA
20
19
8
40
39
Output Noise Voltage
Density(9)
f = 10 kHz, VOUT = 3.3 V
nV/√Hz
25
Output Noise Voltage
(Integrated)(9)
f = 10 Hz – 100 kHz,
VOUT = 3.3 V
en_bw
VDO
µVRMS
mV
8
25
VOUT Dropout Voltage(10) VOUT = VOUT_TARGET – 100 mV, IOUT = 250 mA
70
130
5 mA ≤ IOUT ≤ IOUT_Recommend
VIN = VOUT + 0.3 V to 4.2 V
,
ΔVOUT
VOUT Voltage Accuracy
-1.9
+1.9
%
ΔVOUT_LOAD Load Regulation
IOUT = 5 mA to IOUT_MAX
12
35 µV/mA
IOUT = 0 mA → Current Limit, VOUT = 3.3 V,
2.7V, VOUT Drops by 2%
550
275
650
800
mA
400
ILIM
VOUT Current Limit
IOUT = 0 mA → Current Limit, VOUT = 2.8 V,
VOUT Drops by 2%
323
Shutdown Supply
Current
ISD
VEN = 0 V, VIN = VOUT + 0.3 V to 4.2 V
Rising VIN
0.125 1.000
µA
V
Under-Voltage Lockout
Threshold
VUVLO
2.1
2.3
Under-Voltage Lockout
Hysteresis
VUVHYS
tSTART
150
mV
µs
Startup Time
Rising EN to 95% VOUT, IOUT = 10 mA
Rising Temperature
250
150
20
500
TSD
Thermal Shutdown
°C
Hysteresis
Logic Levels: EN
Enable High-Level Input
Voltage
VIH
VIL
1.05
V
Enable Low-Level Input
Voltage
0.4
V
IEN
Input Bias Current
VEN = 1.8 V
0.04 1.00
µA
Notes:
9. Guaranteed by design; not tested in production.
10. Dropout voltage = VIN - VOUTx when VOUT drops more than 100 mV below the nominal regulated VOUT level.
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN25800 • Rev. 1.5
4
Typical Characteristics
Unless otherwise specified; VIN = 3.6 V, VOUT = 3.3 V, TA = +25°C, and test circuit per Figure 1.
Figure 5. Output Regulation vs. Load Current and
Input Voltage
Figure 6 Output Regulation vs. Load Current
and Temperature
Figure 7. Quiescent Current vs. Input Voltage
and Temperature
Figure 8. Shutdown Current vs. Input Voltage
and Temperature
Figure 9. PSRR vs. Frequency, 10 mA Load
Figure 10. Output Noise Voltage vs. Frequency,
10 mA Load
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN25800 • Rev. 1.5
5
Typical Characteristics
Unless otherwise specified; VIN = 3.6 V, VOUT = 3.3 V, TA = +25°C, and test circuit per Figure 1.
Figure 11. Load Transient, IOUT = 10 → 250 → 10 mA,
Figure 12. Line Transient, VIN = 4.0 → 3.6 → 4.0 V,
10 µs Transitions, 10 mA Load
VIN=3.6 V, 400 ns Edge
Figure 13. Line Transient, VIN = 4.0 → 3.6 → 4.0 V,
Figure 14. Startup, 10 mA Load
10 µs Transitions, 250 mA Load
Figure 15. Startup, 250 mA Load
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN25800 • Rev. 1.5
6
Circuit Description
The FAN25800 is a linear low-dropout (LDO) regulator
that has high PSRR and low output noise. The enable
control pin can be used to shut down the device and
disconnect the output load from the input. During
shutdown, the supply current drops below 1 µA. The
LDO is designed to be stable with space-saving ceramic
capacitors as small as 0201 case size.
characteristics of the capacitors must be considered
when selecting the voltage rating and the case size of
the capacitor. Figure 16 is a typical derating curve for a
0201 case size, 1.5 µF, 6.3 V, X5R capacitor.
Enable and Soft-Start
When EN is LOW, all circuits are off and the IC draws
<550 nA of current. The EN pin does not have an
internal pull-down resistor and must not be left floating.
When EN is HIGH and VIN is above the UVLO
threshold, the regulator begins a soft-start cycle for the
output. The soft-start cycle controls inrush current,
limiting it to the ILIM peak current limit.
Short-Circuit and Thermal Protection
The output current is short-circuit protected. When an
output fault occurs, the output current is automatically
limited to ILIM and VOUT drops. The resultant VOUT is
equal to ILIM multiplied by the fault impedance.
Figure 16. Capacitor DC Bias Characteristics
Typical Application for Post Regulation
Due to its high PSRR and low output noise, the
FAN25800 can be used as a post-DC-DC regulator to
reduce output ripple and output noise at high efficiency
for noise-sensitive applications. Figure 17 shows a post-
DC-DC regulation of the LDO with a buck converter.
The capacitor on the output of the buck converter can
be shared by the LDO as its input capacitor.
Short-circuit fault or output overload may cause the die
temperature to increase and exceed the maximum
rating due to power dissipation. In such cases
(depending upon the ambient temperature; the VIN, load
current, and thermal resistance (θJB) of the mounted
die), the device may enter thermal shutdown.
If the die temperature exceeds the thermal shutdown
temperature threshold, the onboard thermal protection
disables the output until the temperature drops below its
hysteresis value. At that point, the output is re-enabled
and a new soft-start sequence occurs.
L
VIN
EN
SW
VIN
EN
VOUT
3.3 V
5.0 V
3.6 V
DC-DC
Converter
FAN25800
C1
C2
C3
GND
GND
Thermal Considerations
Figure 17. LDO as Post DC-DC Regulator
For best performance, the die temperature and the
power dissipated should be kept at moderate values.
The maximum power dissipated can be evaluated
based on the following relationship:
PCB Layout Recommendations
Capacitors should be placed as close to the IC as
possible. All power and ground pins should be routed to
their capacitors using top copper. The copper area
connecting to the IC should be maximized to improve
thermal performance.
T
J(max) T
A
PD(max)
(1)
JA
where TJ(max) is the maximum allowable junction
temperature of the die; TA is the ambient operating
temperature; and θJA is dependent on the
surrounding PCB layout and can be improved by
providing a heat sink of surrounding copper ground.
The addition of backside copper with through-holes,
stiffeners, and other enhancements can help reduce θJA.
The heat contributed by the dissipation of devices
nearby must be included in design considerations.
Capacitor Selection
An output capacitor with an effective capacitance
between 400 nF and 15 µF is required for loop stability.
The ESR value should be within 3 to 100 m. DC bias
Figure 18. Recommended Layout
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN25800 • Rev. 1.5
7
Product-Specific Dimensions
D
E
X
Y
0.65 ±0.025 mm
0.65 ±0.025 mm
0.15 mm
0.15 mm
© 2014 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN25800 • Rev. 1.5
8
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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