FAN7554 [ONSEMI]

多功能 PWM 控制器;
FAN7554
型号: FAN7554
厂家: ONSEMI    ONSEMI
描述:

多功能 PWM 控制器

PC 控制器 开关 光电二极管
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April 2016  
FAN7554  
Versatile PWM Controller  
Description  
Features  
The FAN7554 is a fixed frequency current mode PWM  
controller. It is specially designed for off-line and DC to  
DC converter applications with minimal external  
.
.
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.
.
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.
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.
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.
.
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Current mode control  
Pulse-by-Pulse Current Limiting  
Low External Components  
components. These integrated circuits feature  
a
trimmed oscillator for precise duty cycle control, a  
temperature compensated reference, an ON/OFF  
control, a high gain error amplifier, a current sensing  
comparator, and a high current totem-pole output. The  
FAN7554 has various protection functions such as an  
overload protection, an over-current protection, and the  
over-voltage protection, which include built-in auto  
restart circuit. The FAN7554 is available in the 8-DIP  
package.  
Under-Voltage Lockout(UVLO): 9 V/15 V  
Stand-by Current: Typical: 100 µA  
Power Saving Mode Current: Typical: 200 µA  
Operating Current: Typical. 7 mA  
Soft-Start  
On/Off Control  
Overload Protection (OLP)  
Over-Voltage Protection (OVP)  
Over-Current Protection (OCP)  
Over-Current Limit (OCL)  
Operating Frequency up to 500 kHz  
1 A Totem-Pole Output Current  
Figure 1.  
8-Dip Package  
Applications  
.
Off-Line & DC-DC Converter  
Ordering Information  
Operating  
Temperature Range  
Part Number  
Package  
8-Lead Dual Inline Package (DIP)  
Packing Method  
FAN7554  
-25 to 85°C  
Rail  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 • Rev. 4.1  
Block Diagram  
Figure 2.  
Block Diagram  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
2
Pin Configuration / Marking Information  
Figure 3.  
Pin Assignment (Top Through View)  
Pin Descriptions  
Pin #  
Pin Name  
Description  
1
2
3
4
5
6
7
8
FB  
S/S  
Inverting(-) Input of pwm Comparator, On/Off Control & OLP Sensing Terminal  
Soft-Start  
IS  
Non-inverting(+) Input of PWM Comparator, OCL Sensing Terminal  
Rt/Ct  
GND  
OUT  
VCC  
Oscillator Time Constant (Rt/Ct)  
Ground  
Output of Gate Driver  
Power Supply  
VREF  
Output of 5 V Reference  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
3
Absolute Maximum Ratings  
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be  
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.  
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.  
The absolute maximum ratings are stress ratings only.  
Symbol  
Parameter  
Min.  
Max.  
Unit  
VCC  
IO  
Supply Voltage  
30  
±1  
V
A
Output Current  
VFB  
VIS  
Input Voltage to FB Pin  
Input Voltage to IS Pin  
-0.3 to VSD  
-0.3 to VOC  
0.85  
V
V
PD  
W
Power Dissipation at TA 25°C  
Operating Temperature  
TOPR  
TSTG  
-25  
-55  
85  
°C  
°C  
°C/W  
Storage Temperature  
Thermal Resistance, Junction-to-Air(1)  
150  
147.8  
R  
JA  
Note:  
1. Junction -to -air thermal resistance test environments:  
- JESD51-2: Integrated circuits thermal test method environmental conditions-natural convection (still air).  
- JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages.  
Temperature Characteristics  
Symbol  
Parameter  
Min.  
Max.  
±0.5  
±5  
Unit  
%
VREF Temperature Stability  
fOSC Temperature Stability  
VREF  
fOSC  
3
%
2
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
4
 
Electrical Characteristics  
Unless otherwise specified, TA = 25C, VCC=16 V, Rt=10 k, Ct=3.3 nF.  
Symbol  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
Unit  
Reference Section  
VREF  
VREF  
VREF  
ISC  
Reference Output Voltage  
Line Regulation  
TJ =25°C, IREF = 1 mA  
VCC = 12 V ~ 25 V  
4.90  
5.00  
6
5.10  
20  
V
mV  
mV  
A
1
2
Load Regulation  
IREF = 1 mA ~ 20 mA  
6
25  
Short-Circuit Output Current TJ = 25°C  
0.10  
0.18  
Oscillator Section  
fOSC  
fOSC1  
VRH  
Oscillation Frequency  
TJ = 25°C  
Frequency Change with VCC VCC = 12 V ~ 25 V  
Ramp High Voltage  
45  
50  
0.05  
2.8  
55  
kHz  
%
1.00  
V
VRL  
Ramp Low Voltage  
1.2  
V
Idisch  
Discharge Current  
VRT/CT = 3.3 V  
VFB = 5 V  
6.1  
9.4  
mA  
PWM Section  
VTH(IS)  
VTH(FB)  
IFB  
Sense Threshold Voltage  
0.8  
0.2  
1.0  
0.3  
1.0  
95  
1.2  
0.4  
V
V
Feedback Threshold Voltage VIS = 0 V  
Feedback Source Current  
Max. Duty Cycle  
VFB = 0 V, VS/S = 5 V  
mA  
%
D(MAX)  
D(MIN)  
92  
98  
0
Min. Duty Cycle  
%
Protection Section  
ISD  
VSD  
VOC  
VOVP  
Shutdown Delay Current  
Shutdown Feedback Voltage VFB > 5 V  
3.5  
5.4  
1.6  
30  
5.0  
6.0  
2.0  
34  
6.5  
6.6  
2.4  
38  
µA  
V
4 V ≤VFB VSD  
Over-Current Protection  
Over-Voltage Protection  
VIS > 1.5 V, tON > 500 nS  
V
V
ON/OFF Control Section  
ISINK Off Mode Sink Current  
VOFF Off Threshold Voltage  
Soft-Start Section  
VFB < VTH(FB), VS/S = 5 V  
VFB < VTH(FB)  
4
mA  
V
1.2  
1.5  
1.8  
IS/S  
Soft-Start Current  
Soft-Start Limit Voltage  
VFB = 5 V, VS/S = 0 V  
VCC = 16 V  
1.1  
5.2  
mA  
V
VLIM(S/S)  
Continued on the following page…  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
5
Electrical Characteristics (Continued)  
Unless otherwise specified, TA = 25C, VCC=16 V, Rt = 10 k, Ct = 3.3 nF.  
Symbol  
Parameter  
Conditions  
Min.  
Typ.  
Max.  
Unit  
Output Section  
VOL1  
VOH1  
VOL2  
VOH2  
tR  
Low Output Voltage1  
High Output Voltage1  
Low Output Voltage2  
High Output Voltage2  
Rise Time(2)  
VCC = 18 V, IO = 50 mA  
VCC = 18 V, IO = -50 mA  
VCC = 18 V, IO = 200 mA  
VCC = 18 V, IO = -200 mA  
TJ = 25°C, CL = 1 nF  
0.15  
15  
0.40  
17  
V
V
13  
12  
1.5  
14  
2.5  
16  
V
V
80  
ns  
ns  
tF  
Fall Time (2)  
TJ = 25°C, CL = 1 nF  
40  
UVLO Section  
VTH(ST) Start Threshold Voltage  
VOPR(M) Min. Operating Voltage  
Total Standby Current Section  
13.2  
8.2  
15.0  
9.0  
16.2  
10.2  
V
V
IST  
IOP  
Startup Current  
0.1  
7
0.2  
10  
mA  
mA  
mA  
Operating Supply Current  
Off-State Current  
IOFF  
VFB<VTH(FB),VS/S<VOFF  
0.2  
0.4  
Note:  
2. These parameters, although guaranteed, are not 100% tested in production.  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
6
 
Typical Performance Characteristics  
Figure 4.  
Rt vs. Frequency  
Figure 5.  
Ct vs. Dead Time  
Figure 6.  
Ct vs. Duty  
Figure 7.  
Cload vs. tR & tF  
Figure 8.  
Temperature vs. Startup Current  
Figure 9.  
Temperature vs. Operating Supply  
Current  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
7
Typical Performance Characteristics  
Figure 10. Temperature vs. Reference Voltage  
Figure 11. Temperature vs. Oscillation Frequency  
Figure 12. Temperature vs. Start Threshold Voltage Figure 13. Temperature vs. Min. Operating Voltage  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
8
Operation Description  
The FAN7554 has all the basic features of the current  
mode SMPS control IC. Its basic configuration includes  
the UVLO with 6 V hysteresis, a band gap reference,  
the oscillator that can oscillate up to 500 kHz according  
to Rt/Ct (connected externally), a PWM logic circuit, a  
gate driver, and the feedback circuit that has the current  
source and soft start function. The FAN7554 has  
various functions such as an overload protection, an  
over current protection, and an over-voltage protection.  
The overload protection forces the FAN7554 to stop its  
operation if the load current is higher than the preset  
value. The protection circuit can also be prevented from  
operating during transient states by ensuring that a  
certain amount of the time passes before the protection  
circuit operates. The shutdown circuit is configured for  
an auto-restart, so the FAN7554 automatically restarts  
when VCC drops to 9 V (stop voltage).  
Figure 15. Startup & Circuit Characteristics  
Soft Start  
The SMPS output load usually contains a capacitive  
load component. During initial startup, the output  
voltage increases at a fixed time constant because of  
this component. If the feedback loop, which controls the  
output voltage, was to start without the soft-start circuit,  
the feedback loop would appear to be open during initial  
startup, so, at startup, the feedback voltage applied to  
the PWM comparator’s inverting input (-) reaches its  
maximum value (1 V).  
Startup  
The startup circuit is made up of an Under-Voltage  
Lockout (UVLO), the protection for low voltage  
conditions, and the 5 V reference (VREF), which supplies  
bias voltage to the control circuit after startup. The start  
voltage of the UVLO is 15 V, and the stop voltage after  
turn on is 9 V. It has a 6 V hysteresis. The minimum  
operating current for startup threshold is typically  
100 µA, and this can reduce the power dissipation on  
the startup resistor. The VREF is composed of the band  
gap reference circuit with its superior temperature  
characteristics and supplies power to all the FAN7554  
circuits and Rt/Ct, with the exceptions of the ULVO  
circuit and ON/OFF control circuit.  
During this time, the peak value of the drain current  
would stay at the maximum value, and the maximum  
power would be delivered to the secondary load side  
from the start. When the maximum power is delivered to  
the secondary side for this initial fixed time, the entire  
circuit is seriously stressed. The use of a soft-start can  
avoid such stresses. At startup, the soft-start capacitor  
CS is charged by 1 mA and 100 µA current sources.  
The voltage of the inverting terminal of the PWM  
comparator increases to 1/3 of the CS voltage at a fixed  
time constant. Subsequently, the drain peak current is  
limited by the gradual increase in the CS voltage and  
this causes the output voltage to increase smoothly.  
When the CS voltage becomes greater than 3 V, the  
diode DS turns off consequently, the feedback capacitor  
CFB is charged by 1 mA and 5 µA current sources. This  
charge voltage determines the comparator’s inverting  
voltage. Then, CS voltage charges to 5 V by 100 µA  
current source. The soft start capacitor CS is discharged  
when the UVLO good logic starts, so the soft start is  
repeated at re-start.  
Figure 14. Low Current Startup & Bandgap  
Reference Circuit  
Figure 16. Soft Start Circuit & Circuit Flow  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
9
 
Oscillator  
As shown in Figure 17, the oscillator frequency is  
programmed by values selected for timing components  
Rt and Ct. Capacitor Ct is charged to almost 2.8 V  
through resistor Rt from the 5 V reference and  
discharged to 1.2 V by an internal current source. The  
oscillator generates the clock signal while the timing  
capacitor Ct is discharged. The gate drive output  
becomes low during the clock time. Rt and Ct selection  
determine the oscillator frequency and maximum duty  
cycle. Charge and discharge times can be calculated  
through the equations below.  
Charging Time: tc = 0.55 x Rt x Ct  
Figure 18. Sawtooth & Clock Waveform  
Discharging Time: td = Rt x Ct x ln[(0.0063 x Rt - 2.8) /  
(0.0063 x Rt - 3.8)]  
Where the oscillator frequency: fOSC = (tc + td)-1 (±10%).  
Feedback  
As shown in Figure 16, the internal oscillator clock turns  
on the MOSFET. The feedback comparator operates to  
turn it off again, when the MOSFET current reaches a  
set value proportional to VFB. The feedback capacitor  
CFB is charged by the internal current sources, 1 mA  
and 5 µA, and is discharged by the secondary side  
photo-coupler to control the output voltage.  
When Rt > 5 kΩ, fosc = 1 / (0.55 x Rt x Ct) = 1.8 / (Rt x Ct).  
Figure 17. Oscillator Circuit  
Figure 19. Feedback & PWM Circuit  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
10  
 
charged by the 5 µA current source because diode D1  
turns off. When the feedback voltage is less than 3 V,  
the charge slope becomes an exponential function and,  
when it is greater than 3 V, the charge slope becomes  
linear. When the feedback voltage reaches almost 6 V,  
the FAN7554 shuts down. The shut down circuit is  
configured for auto-restart, so it automatically restarts  
when VCC reaches the under voltage 9 V.  
Delayed Shutdown  
During the normal operation, the feedback voltage is  
between 0~3 V. If the output terminal overloads or an  
error happens to the feedback loop, the delayed  
shutdown circuit operates. When the feedback voltage  
is less than 3 V, the feedback capacitor is charged by  
current sources, 1 mA and 5 µA; when the feedback  
voltage becomes greater than 3 V, the capacitor is  
Figure 20. Delayed Shutdown & Feedback Circuit  
Figure 21. Delayed Shutdown & Feedback Waveform  
Gate Driver  
The gate drive circuit has the totem-pole output configuration. The output has 1 A peak current and 200 mA average  
current drive ability.  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
11  
ON/OFF Control  
The FAN7554 is able to use the feedback pin for  
ON/OFF control by placing NPN transistor between the  
cathode of the KA431 and ground as shown in Figure  
23. When the transistor turns on, the current flows  
through the photo diode and saturates the photo  
transistor. As a result, the feedback voltage is dropped  
to zero. When the feedback voltage is below 0.3 V, the  
soft start voltage starts to discharge by connecting the  
internal resistor 1 kΩin parallel with the external  
capacitor Cs. When the soft-start voltage becomes less  
than 1.5 V, all the blocks in the FAN7554 are turned off,  
with the exceptions of the UVLO block and ON/OFF  
control block. The operation current is about 200 µA. So  
the stand-by power is reduced and SMPS efficiency is  
improved. When the feedback voltage exceeds 0.3 V,  
the FAN7554 normally operates by turning on VREF  
block.  
Figure 22. Gate Drive Circuit  
Figure 23. ON/OFF Control Circuit  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
12  
 
Figure 24. ON-OFF Control Circuit Waveform  
Protection Circuits  
Overload Protection  
The FAN7554 has many built-in protection circuits that  
do not need additional components, providing reliability  
without cost increase. These protection circuits have the  
auto-restart configuration. In this configuration, the  
protection circuits reset when VCC is below UVLO stop  
threshold (9 V) and restarts when VCC is above UVLO  
start threshold voltage (15 V)  
An overload is the state in which the load is operating  
normally but in excess of the preset load. The overload  
protection circuit can force the FAN7554 to stop its  
operation. The protection can also operate in transient  
states such as initial SMPS operation. Because the  
transient state returns to the normal state after a fixed  
time, the protection circuit need not to operate during  
this time. That is, the FAN7554 needs the time to detect  
and decide whether it is an overload condition or not.  
The protection circuit can be prevented from operating  
during transient states by ensuring that a certain amount  
of time passes before the protection circuit operates.  
The above operations are executed as follows: Since  
the FAN7554 adopts a current mode, it is impossible for  
current to flow above a maximum level. For a fixed input  
voltage, this limits power. Therefore, if the power at the  
output exceeds this maximum, VO, shown in Figure 25,  
becomes less than the set voltage, and the KA431pulls  
in only the given minimum current. As a result, the  
photo-coupler’s secondary side current becomes zero.  
The same goes for the photo-coupler’s primary side  
current. Consequently, when the full current 1 mA flows  
through the internal resistor (2R + R = 3R), VFB  
becomes approximately 3 V and from that time, the 5 µA  
current source begins to charge CFB the photo-coupler’s  
secondary current is almost zero. The FAN7554 shuts  
down when VFB reaches 6 V.  
Over Voltage Protection  
Abnormalities may occur in the SMPS secondary side  
feedback circuit. First, when the feedback pin is short to  
the ground, the feedback voltage is zero and the  
FAN7554 is unable to start switching. Second, when the  
feedback circuit is open, the secondary voltage  
generally becomes much greater than the rated voltage  
as the primary side continues to switch at the maximum  
current level. This may cause the blowing off the fuse  
or, in serious cases, fires. It is possible that the devices  
directly connected to the secondary output without a  
regulator could be destroyed. Even in these cases, the  
over voltage protection circuit operates. Since VCC is  
proportional to the output, in an over voltage situation, it  
also will increase. In the FAN7554, the protection circuit  
operates when VCC exceeds 34 V. Therefore, in normal  
operation, VCC must be set below 34 V.  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
13  
Figure 25. Delayed Shutdown  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
14  
FAN7554 Flyback Converter Demo Circuit (fSW: 100 kHz)  
Table 1. Part List For FAN7554 Flyback Converter Demo Board  
Part  
FUSE  
NTC  
Value  
Fuse  
Note  
Part  
Value  
Note  
Capacitor  
100 nF/275 V  
100 nF/275 V  
470 nF/400 WV  
103/1 kV  
C101  
C102  
C103  
C104  
Box Capacitor  
Box Capacitor  
250 2 A  
NTC  
Electrolytic  
5D-11  
Film Capacitor  
Resistor  
330 k  
R101  
R102  
1 W  
C105  
C106  
C107  
C108  
C109  
C201  
C202  
C203  
C301  
C302  
104  
1 µF  
Ceramic  
Electrolytic  
Ceramic  
R103, R104  
R105  
101  
100 k  
22 k  
4.7 k  
12 k  
10 k  
1 k  
122  
Ceramic  
R106  
22 µF/50V  
330 µF  
330 µF  
104  
Electrolytic  
Electrolytic  
Electrolytic  
Ceramic  
R107  
R108  
R109  
R110  
2 W  
0.5 k  
1 k  
R201  
R202  
1 k  
R203  
4.7 k  
Inductor  
30 mH  
R204  
R205  
LF101  
L201  
1.2 k  
6.4 µH  
MOSFET  
Diode  
Q101  
Fairchild  
D201  
MBRF10100CT  
UF4007  
Fairchild  
Fairchild  
IC  
IC101  
IC201  
IC301  
Fairchild  
Fairchild  
Fairchild  
D101  
D103  
BD  
1N4148  
FQP6N70  
FAN7554  
Opto-coupler  
UF4004  
G3SBA60  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
15  
Transformer Specification  
Figure 26. Transformer Specification  
Table 2. Winding Specification  
No.  
NP  
Pin (SF)  
Wire  
Turns  
44  
Winding Method  
0.35φ x 1  
0.35φ x 4  
0.35φ x 1  
0.35φ x 1  
1 3  
7 11  
1 3  
5 4  
N12V  
VP  
12  
44  
NB  
14  
Table 3. Electrical Characteristics  
Closure  
Pin  
Specification  
Remarks  
Inductance  
Leakage  
1-3  
1-3  
400 µH ±10%  
100 µH Max.  
100 kHz, 1 V  
2nd All Short  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
16  
FAN7554 Forward Converter Demo Circuit (fSW: 100 kHz)  
Table 4. Part List For FAN7554 Forward Converter Demo Board  
Part  
FUSE  
RT101  
Value  
Fuse  
Note  
Part  
Value  
Note  
Capacitor  
470 nF/275 V  
470 nF/400 WV  
223/630 V  
33 µF/35 V  
104  
C101  
C102, C103  
C104  
Box Capacitor  
Electrolytic  
Film  
250 2 A  
NTC  
DSC 10D-11  
Resistor  
330 k  
C105  
Film Capacitor  
Ceramic  
Electrolytic  
Ceramic  
Ceramic  
Film  
R101  
R102  
1 W  
C106  
C107  
1 µF/35 V  
101  
R103, R104  
R105, R106  
R107  
1 W  
1 W  
C108  
56 k  
220 k  
C109  
122  
C110  
272  
10 k  
R108  
C111  
333  
Film  
20 k  
R109  
C201,C202  
C203  
1000 µF/35 V  
330 µF/16 V  
2200 µF/16 V  
104  
Electrolytic  
Electrolytic  
Electrolytic  
Ceramic  
Ceramic  
4.7 k  
R110  
1.2 k  
R111  
2 W  
C204  
0.5 0.5 0.5   
1 k  
R112  
C205  
R113  
C301, C302  
332/1 kV  
12 k  
R201, R202  
R203  
10 k  
Inductor  
30 mH  
LF101  
L201  
1 k  
R204  
330   
MOSFET  
SSH8N80  
IC  
Diode  
IN4004  
Q101  
Fairchild  
D101  
D102  
D103  
D201  
D202  
BD  
FR157  
IC101  
IC201  
IC301  
Fairchild  
Fairchild  
Fairchild  
UF4007  
FAN7554  
KA431  
MBRF10100CT  
MBR3045PT  
PBS406GU  
Opto-coupler  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
17  
Transformer Specification  
Figure 27. Transformer Specification  
Table 5. Winding Specification  
No.  
NP  
Pin (SF)  
1 3  
Wire  
Turns  
32  
4
0.65φ x 1  
0.65φ x 4  
0.65φ x 4  
0.65φ x 1  
0.65φ x 1  
NS, 5  
NS, 12  
NP  
8 11  
4 9  
5
32  
5
1 3  
NVCC  
7 6  
© 2003 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN7554 Rev. 4.1  
18  
9.83  
9.00  
8
5
6.670  
6.096  
1
4
8.255  
7.610  
TOP VIEW  
1.65  
1.27  
(0.56)  
7.62  
3.683  
3.200  
5.08 MAX  
3.60  
3.00  
0.33 MIN  
0.356  
0.200  
15°  
0°  
0.560  
0.355  
2.54  
9.957  
7.870  
7.62  
FRONT VIEW  
SIDE VIEW  
NOTES:  
A. CONFORMS TO JEDEC MS-001, VARIATION BA  
B. ALL DIMENSIONS ARE IN MILLIMETERS  
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,  
MOLD FLASH, AND TIE BAR EXTRUSIONS  
D. DIMENSIONS AND TOLERANCES PER ASME  
Y14.5M-2009  
E. DRAWING FILENAME: MKT-N08Frev3  
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