FCH060N80-F155 [ONSEMI]
功率 MOSFET，N 沟道，SUPERFET® II，800 V，58 A，60 mΩ，TO-247;
| 型号： | FCH060N80-F155 |
| 厂家： | 
ONSEMI |
| 描述： | 功率 MOSFET，N 沟道，SUPERFET® II，800 V，58 A，60 mΩ，TO-247 |
| 文件： | 总10页 (文件大小：492K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET – N-Channel,
SUPERFET) II
800 V, 58 A, 60 mW
FCH060N80
Description
www.onsemi.com
SUPERFET II MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on−resistance and lower gate
charge performance. This technology is tailored to minimize
conduction loss, provide superior switching performance, dv/dt rate
and higher avalanche energy. Consequently, SUPERFET II MOSFET
is very suitable for the switching power applications such as PFC,
server/telecom power, FPD TV power, ATX power and industrial
power applications.
V
R
MAX
I MAX
D
DSS
DS(ON)
800 V
60 mW @ 10 V
58 A
D
Features
• Typ. R
G
= 54 mW
DS(on)
• 850 V @ T = 150°C
J
S
• Ultra Low Gate Charge (Typ. Q = 270 nC)
g
• Low E
(Typ. 23 mJ @ 400 V)
OSS
POWER MOSFET
• Low Effective Output Capacitance (Typ. C
• 100% Avalanche Tested
= 981 pF)
oss(eff.)
• This Device is RoHS Compliant
Applications
G
• AC−DC Power Supply
• LED Lighting
D
S
TO−247−3LD
CASE 340CH
MARKING DIAGRAM
$Y&Z&3&K
FCH060N80
$Y
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
&Z
&3
&K
FCH060N80
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
November, 2020 − Rev. 4
FCH060N80/D
FCH060N80
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
C
Symbol
Parameter
Value
800
Unit
V
V
DSS
V
GSS
Drain to Source Voltage
Gate to Source Voltage
DC
20
V
AC (f > 1 Hz)
30
I
D
Drain Current
Continuous (T = 25°C)
58
A
C
Continuous (T = 100°C)
36.8
174
C
I
Drain Current
Pulsed (Note 1)
A
mJ
A
DM
E
Single Pulsed Avalanche Energy (Note 2)
Avalanche Current (Note 1)
Repetitive Avalanche Energy (Note 1)
MOSFET dv/dt
2317
11.6
50
AS
AS
I
E
mJ
V/ns
AR
dv/dt
100
Peak Diode Recovery dv/dt (Note 3)
Power Dissipation
20
P
(T = 25°C)
500
W
W/°C
°C
D
C
Derate Above 25°C
4
T , T
Operating and Storage Temperature Range
−55 to +150
300
J
STG
T
Maximum Lead Temperature for Soldering Purpose
1/8″ from Case for 5 seconds
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse width limited by maximum junction temperature.
2. I = 11.6 A, V = 50 V, R = 25 W, starting T = 25°C.
AS
DD
G
J
3. I ≤ 58 A, di/dt ≤ 200 A/ms, V ≤ BV
, starting T = 25°C.
SD
DD
DSS
J
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
0.25
40
Unit
R
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
_C/W
q
JC
JA
R
q
PACKAGE MARKING AND ORDERING INFORMATION
Packing
Method
Part Number
Top Mark
Package
Reel Size
Tape Width
Quantity
FCH060N80−F155
FCH060N80
TO−247−3LD
Tube
N/A
N/A
30 Units
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2
FCH060N80
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
V
I
= 0 V, I = 1 mA, T = 25_C
800
V
DSS
GS
D
J
DBV
/ DT
Breakdown Voltage Temperature
Coefficient
= 1 mA, Referenced to 25_C
0.8
V/_C
DSS
J
D
I
Zero Gate Voltage Drain Current
V
DS
V
DS
V
GS
= 800 V, V = 0 V
25
mA
DSS
GS
= 640 V, T = 125_C
250
100
C
I
Gate to Body Leakage Current
=
20 V, V = 0 V
nA
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
GS
V
GS
V
DS
= V , I = 5.8 mA
2.5
4.5
60
V
mW
S
GS(th)
DS(on)
DS
D
R
Static Drain to Source On Resistance
Forward Transconductance
= 10 V, I = 29 A
54
68
D
g
FS
= 20 V, I = 29 A
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 100 V, V = 0 V, f = 1 MHz
11040
298
10
14685
395
pF
pF
pF
pF
pF
nC
nC
nC
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Output Capacitance
rss
C
V
DS
V
DS
V
DS
= 480 V, V = 0 V, f = 1MHz
147
981
270
54
oss
GS
C
Effective Output Capacitance
Total Gate Charge at 10 V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Equivalent Series Resistance
= 0 V to 480 V, V = 0 V
GS
oss(eff.)
Q
= 640 V, I = 58 A, V = 10 V
350
g(tot)
D
GS
(Note 4)
Q
gs
Q
100
0.78
gd
ESR
f = 1 MHz
SWITCHING CHARACTERISTICS
t
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
V
= 400 V, I = 58 A, V = 10 V
55
73
120
156
436
154
ns
ns
ns
ns
d(on)
DD
g
D
GS
R = 4.7 W
t
r
(Note 4)
t
213
72
d(off)
t
f
SOURCE-DRAIN DIODE CHARACTERISTICS
I
Maximum Continuous Drain to Source Diode Forward Current
Maximum Pulsed Drain to Source Diode Forward Current
58
174
1.2
A
A
S
I
SM
V
SD
Drain to Source Diode Forward Voltage
Reverse Recovery Time
V
V
= 0 V, I = 58A
V
GS
SD
t
rr
= 0 V, I = 58 A,
850
35
ns
mC
GS
SD
dI /dt = 100 A/ms
F
Q
Reverse Recovery Charge
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
www.onsemi.com
3
FCH060N80
TYPICAL PERFORMANCE CHARACTERISTICS
200
100
200
V
= 20 V
V
GS
=10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
DS
250 ms Pulse Test
100
10
1
150°C
10
25°C
−55°C
250 ms Pulse Test
= 25°C
T
C
1
0.1
1
10 20
2
3
4
5
6
7
V
DS
, Drain−Source Voltage (V)
V
GS
, Gate−Source Voltage (V)
Figure 1. On−Region
Figure 2. Transfer
Characteristics
Characteristics
0.10
0.08
0.06
0.04
200
100
T
C
= 25°C
V
= 0 V
GS
250 ms Pulse Test
10
1
150°C
V
= 10 V
GS
25°C
V
GS
= 20 V
0.1
0.01
0.001
0
40
80
120
160
200
0.0
0.3
0.6
0.9
1.2
1.5
I , Drain Current (A)
D
V
SD
, Body Diode Forward Voltage (V)
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
Figure 3. On−Resistance Variation
vs. Drain Current and Gate Voltage
100000
10000
1000
100
10
8
I
D
= 58 A
V
= 160 V
= 400 V
= 640 V
C
DS
iss
V
DS
V
DS
6
C
oss
4
V
= 0 V
GS
C
rss
f = 1 MHz
2
10
C
C
C
= C + C (C = shorted)
iss
gs
gd
ds
= C + C
oss
rss
ds
gd
= C
gd
0
1
0.1
1
10
100
800
0
60
120
180
240
300
V
DS
, Drain−Source Voltage (V)
Qg, Total Gate Charge (nC)
Figure 5. Capacitance
Characteristics
Figure 6. Gate Charge
Characteristics
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4
FCH060N80
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
1.2
1.1
1.0
0.9
0.8
3.0
V
= 10 V
= 29 mA
GS
V
= 0 V
= 1mA
GS
I
D
I
D
2.4
1.8
1.2
0.6
0.0
−100
−50
0
50
100
150
200
−100
−50
0
50
100
150
200
T , Junction Temperature (5C)
J
T , Junction Temperature (5C)
J
Figure 7. Breakdown Voltage
Variation vs. Temperature
Figure 8. On−Resistance
Variation vs. Temperature
300
100
60
50
40
30
20
10
0
10 ms
100 ms
1 ms
DC
10
1
Operation in This Area
is Limited by R
DS(on)
T
C
= 25 °C
0.1
T = 150 °C
J
Single Pulse
0.01
25
50
75
100
125
150
0.1
1
10
100
1000
T , Case Temperature (5C)
C
V
DS
, Drain−Source Voltage (V)
Figure 9. Maximum Safe
Operating Area
Figure 10. Maximum Drain
Current vs. Case Temperature
60
48
36
24
12
0
0
160
320
480
640
800
V
DS
, Drain to Source Voltage (V)
Figure 11. EOSS vs. Drain to
Source Voltage
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5
FCH060N80
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
0.3
0.5
0.1
0.2
0.1
PDM
0.05
t1
0.01
0.02
0.01
t2
Single Pulse
Z
(t) = 0.25 °C/W Max.
q
JC
Duty Factor, D = t /t
1
2
T
− T = P
* Z (t)
q
DM JC
JM
C
1E−3
10−5
10−4
10−3
10−2
10−1
100
t1, Rectangular Pulse Duration (sec)
Figure 12. Transient Thermal Response Curve
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6
FCH060N80
V
GS
R
Q
g
L
10 V
V
DS
Q
Q
gs
gd
V
GS
DUT
1mA
Charge
Figure 13. Gate Charge Test Circuit & Waveform
R
L
V
DS
GS
90%
90%
10%
90%
V
DS
V
DD
V
GS
R
G
10%
V
DUT
10 V
t
t
d(off)
t
r
t
f
d(on)
t
on
t
off
Figure 14. Resistive Switching Test Circuit & Waveforms
L
1
2
EAS
+
@ LIAS
V
DS
2
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
10 V
V
DS
(t)
t
p
Time
t
p
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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7
FCH060N80
+
DUT
V
DS
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
− dv/dt controlled by R
G
− I controlled by pulse period
SD
Gate Pulse Width
D +
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD
CASE 340CH
ISSUE A
DATE 09 OCT 2019
GENERIC
MARKING DIAGRAM*
XXXXXXXXX
AYWWG
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
WW = Work Week
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13853G
TO−247−3LD
PAGE 1 OF 1
ON Semiconductor and
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