FDB86569-F085 [ONSEMI]
N 沟道，PowerTrench® MOSFET，60V，80 A，5.6 mΩ;
| 型号： | FDB86569-F085 |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，PowerTrench® MOSFET，60V，80 A，5.6 mΩ |
| 文件： | 总8页 (文件大小：4065K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MOSFET – N-Channel,
POWERTRENCH)
60 V, 80 A, 5.6 mW
FDB86569-F085
Features
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• Typical R
• Typical Q
• UIS Capability
• These Device is Pb−Free and is RoHS Compliant
• Qualified to AEC−Q101
= 4.4 mW at V = 10 V, I = 80 A
GS D
DS(on)
= 35 nC at V = 10 V, I = 80 A
g(tot)
GS
D
D
G
Applications
• Automotive Engine Control
• PowerTrain Management
• Solenoid and Motor Drivers
• Integrated Starter/Alternator
• Primary Switch for 12 V Systems
S
D2PAK−3
CASE 418AJ
FDB SERIES
DRAIN
GATE
SOURCE
MARKING DIAGRAM
$Y&Z&3&K
FDB
86569
$Y
= ON Semiconductor Logo
&Z
&3
&K
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
FDB86569
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
May, 2020 − Rev. 3
FDB86569−F085/D
FDB86569−F085
MOSFET MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
C
Symbol
Parameter
Value
Unit
V
V
DSS
Drain to Source Voltage
Gate to Source Voltage
60
V
GS
20
V
I
D
Drain Current − Continuous (V = 10 V) (Note 1) T = 25°C
80
A
GS
C
Pulsed Drain Current T = 25°C
See Figure 4
A
C
E
Single Pulse Avalanche Energy (Note 2)
41
94
mJ
W
AS
P
Power Dissipation
(T = 25°C)
C
D
− Derate Above 25°C
0.63
W/°C
°C
T , T
Operating and Storage Temperature
Thermal Resistance Junction to Case
−55 to +175
1.6
J
STG
R
°C/W
°C/W
q
JC
JA
R
Maximum Thermal Resistance, Junction to Ambient (Note 3)
43
q
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Current is limited by bondwire configuration.
2. Starting T = 25°C, L = 15 mH, I = 74 A, V = 60 V during inductor charging and V = 0 V during time in avalanche.
J
AS
DD
DD
3. R
is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins. R
presented here is based on mounting on a 1 in pad of 2oz copper.
is guaranteed by design, while R
is determined by the board design. The maximum rating
q
q
JC
JA
2
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
2
FDB86569
FDB86569−F085
D −PAK (TO−263)
330 mm
24 mm
800 Units
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2
FDB86569−F085
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
B
Drain to Source Breakdown Voltage
Drain to Source Leakage Current
I
= 250 mA, V = 0 V
60
V
VDSS
D
GS
I
1
1
V
= 60 V, V = 0 V, T = 25_C
mA
mA
DSS
DS
GS
J
V
= 60 V, V = 0 V, T = 175_C
DS
GS
C
(Note 1)
I
Gate to Source Leakage Current
V
GS
=
20 V
100
nA
GSS
ON CHARACTERISTICS
V
GS(TH)
R
DS(ON)
Gate to Source Threshold Voltage
Drain to Source On Resistance
V
I
= V , I = 250 mA
2.0
2.8
4.4
8.5
4.0
5.6
V
GS
DS
D
= 80 A, V = 10 V, T = 25_C
mW
mW
D
GS
J
I
D
= 80 A, V = 10 V, T = 175_C
10.8
GS
C
(Note 1)
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 30 V, V = 0 V, f = 1 MHz
2520
690
47
pF
pF
pF
W
iss
DS
GS
C
Output Capacitance
oss
C
Reverse Transfer Capacitance
Gate Resistance
rss
R
f = 1 MHz
2.0
35
g
Q
Total Gate Charge at 10 V
V
GS
V
DD
= 0 V to 10 V,
52
nC
g(tot)
= 30 V, I = 80 A
D
Q
Threshold Gate Charge
V
GS
V
DD
= 0 V to 2 V,
4.8
nC
g(th)
= 30 V, I = 80 A
D
Q
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
DD
= 30 V, I = 80 A
14
nC
nC
gs
D
Q
7.4
gd
RESISTIVE SWITCHING CHARACTERISTICS
t
Turn-On Time
Turn-On Delay
Rise Time
V
DD
V
GS
= 30 V, I = 80 A,
53
45
ns
ns
ns
ns
ns
ns
ON
D
= 10 V, R
= 6 W
GEN
t
15
20
22
8
d(ON)
t
r
t
Turn-Off Delay
Fall Time
d(OFF)
t
f
t
Turn-Off Time
OFF
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Voltage
I
I
= 80 A, V = 0 V
1.25
1.2
68
V
V
SD
SD
GS
= 40 A, V = 0 V
SD
GS
t
Reverse Recovery Time
I = 80 A, dl /dt = 100 A/ms,
52
43
ns
nC
rr
F
SD
= 48 V
V
DD
Q
Reverse Recovery Charge
65
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
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3
FDB86569−F085
TYPICAL CHARACTERISTICS
Figure 1. Normalized Power
Dissipation vs. Case Temperature
Figure 2. Maximum Continuous
Drain Current vs Case Temperature
Figure 3. Normalized Maximum Transient Thermal Impedance
Figure 4. Peak Current Capability
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4
FDB86569−F085
TYPICAL CHARACTERISTICS (Continued)
NOTE: Refer to ON Semiconductor Application Notes
AN−7514 and AN−7515
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching
Capability
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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5
FDB86569−F085
TYPICAL CHARACTERISTICS (Continued)
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs Junction
Temperature
Figure 13. Normalized Gate Threshold
Voltage vs. Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
D2PAK−3 (TO−263, 3−LEAD)
CASE 418AJ
ISSUE F
DATE 11 MAR 2021
SCALE 1:1
XXXXXX = Specific Device Code
A
= Assembly Location
WL
Y
= Wafer Lot
= Year
GENERIC MARKING DIAGRAMS*
WW
W
M
G
AKA
= Work Week
= Week Code (SSG)
= Month Code (SSG)
= Pb−Free Package
= Polarity Indicator
XX
AYWW
XXXXXXXXG
AKA
XXXXXXXXG
AYWW
XXXXXX
XXYMW
XXXXXXXXX
AWLYWWG
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
IC
Standard
Rectifier
SSG
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
98AON56370E
D2PAK−3 (TO−263, 3−LEAD)
PAGE 1 OF 1
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