FDMA86108LZ [ONSEMI]
N 沟道，PowerTrench® MOSFET，100V，2.2A，243mΩ;
| 型号： | FDMA86108LZ |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，PowerTrench® MOSFET，100V，2.2A，243mΩ |
| 文件： | 总8页 (文件大小：270K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET – Single N-Channel,
POWERTRENCH)
Pin 1
Drain
G
D
D
D
Source
100 V, 2.2 A, 243 mW
FDMA86108LZ
D
S
WDFN6 (MicroFETt 2 x 2)
General Description
This device has been designed to provide maximum efficiency and
thermal performance for synchronous buck converters. The low
CASE 511CZ
r
and gate charge provide excellent switching performance.
DS(on)
MARKING DIAGRAM
Features
&Z&2&K
108
• Max r
= 243 mW at V = 10 V, I = 2.2 A
GS D
DS(on)
• Max r
= 366 mW at V = 4.5 V, I = 1.8 A
GS D
DS(on)
• Low Profile − 0.8 mm Maximum in the New Package MicroFETt
2 x 2 mm
• Free from Halogenated Compounds and Antimony Oxides
• This Device is Pb−Free and is RoHS Compliant
&Z
&2
&K
108
= Assembly Plant Code
= Numeric Date Code
= Lot Code
= Specific Device Code
Application
• DC−DC Buck Converters
PIN ASSIGNMENT
MOSFET MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
Symbol
Parameter
Drain to Source Voltage
Gate to Source Voltage
Ratings Unit
V
DS
V
GS
100
20
V
V
A
I
D
Drain Current − Continuous T = 25°C
2.2
A
(Note 1a)
− Pulsed (Note 3)
6
P
D
Power dissipation T = 25°C (Note 1a)
2.4
0.9
W
A
Power dissipation T = 25°C (Note 1b)
A
T
STG
Operating and Storage Junction Temperature
Range
−55 to
+150
°C
J,
T
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
See detailed ordering and shipping information on page 2
of this data sheet.
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings Unit
R
Thermal Resistance, Junction−to−Ambient
(Note 1a)
52
°C/W
q
JA
R
Thermal Resistance, Junction−to−Ambient
(Note 1b)
145
q
JA
© Semiconductor Components Industries, LLC, 2015
1
Publication Order Number:
April, 2023 − Rev. 2
FDMA86108LZ/D
FDMA86108LZ
PACKAGE MARKING AND ORDERING INFORMATION
†
Device Marking
Device
Package
Shipping
108
FDMA86108LZ
WDFN6 (MicroFET 2x2)
3000 Units / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
100
V
DSS
D
GS
Breakdown Voltage Temperature
Coefficient
= 250 mA, referenced to 25°C
74
DBVDSS
DTJ
D
mV/°C
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 80 V, V = 0 V
1
mA
mA
DSS
DS
GS
I
=
20 V, V = 0 V
10
GSS
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 250 mA
1.0
2.2
3.0
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage
Temperature Coefficient
= 250 mA, referenced to 25°C
−5
DVGS(th)
DTJ
D
mV/°C
mW
r
Static Drain to Source On Resistance
Forward Transconductance
V
GS
V
GS
V
GS
V
DD
= 10 V, I = 2.2 A
188
275
345
3.7
243
366
446
DS(on)
D
= 4.5 V, I = 1.8 A
D
= 10 V, I = 2.2 A, T = 125°C
D
J
g
FS
= 5 V, I = 2.2 A
S
D
DYNAMIC CHARACTERISTICS
C
C
Input Capacitance
V
DS
= 50 V, V = 0 V, f = 1 MHz
116
23
1
163
35
5
iss
GS
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
pF
W
oss
C
rss
R
0.1
1.0
3.0
g
SWITCHING CHARACTERISTICS
td
Turn*On Delay Time
Rise Time
V
V
= 50 V, I = 2.2 A,
4.2
1.7
7.6
1.7
2.1
10
10
ns
(on)
DD
GS
D
= 10 V, R
= 6 W
GEN
t
r
t
Turn*Off Delay Time
Fall Time
15
D(off)
t
f
10
Q
Total Gate Charge
V
= 0V to 10 V, V = 50 V,
3.0
nC
g(TOT)
GS
GS
DD
DD
i
D
= 2.2 A
V
= 0V to 4.5 V, V = 50 V,
1.1
1.6
DD
i
D
= 2.2 A
Q
Q
Gate to Source Charge
V
= 50 V, i = 2.2 A
0.5
0.5
gs
D
Gate to Drain “Miller” Charge
gd
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
Reverse Recovery Time
V
= 0 V, I = 2.2 A (Note 2)
0.9
32
20
1.2
51
32
V
SD
GS
S
t
I = 2.2 A, di/dt = 100 A/ms
F
ns
nC
rr
Q
Reverse Recovery Charge
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
FDMA86108LZ
NOTES:
1. R
2
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. R
is guaranteed
q
q
JC
JA
by design while R
is determined by the user’s board design.
q
JA
a) 52°C/W when mounted on
b) 145°C/W when mounted on
a minimum pad of 2 oz copper.
2
a 1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. Pulsed I measured at 250 mS, refer to Figure 11 SOA graph for more details.
D
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3
FDMA86108LZ
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
J
6
5
4
3
2
1
0
5
V
GS = 6 V
V
GS = 3.5 V
VGS = 10 V
VGS = 4 V
4
3
2
VGS = 4.5 V
VGS = 4.5 V
VGS = 4 V
VGS = 6 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
1
0
V
GS = 3.5 V
VGS = 10 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
0
1
2
3
4
5
0
1
2
3
4
5
6
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
Figure 1. On−Region Characteristics
Figure 2. Normalized On−Resistance
vs Drain Current and Gate Voltage
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
800
600
400
200
0
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
ID = 2.2 A
VGS = 10 V
ID = 2.2 A
TJ = 125 o
C
TJ = 25 o
C
−75 −50 −25
0
25 50 75 100 125 150
3
4
5
6
7
8
9
10
T , JUNCTION TEMPERATURE (°C)
J
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On−Resistance
Figure 4. On−Resistance vs Gate to
vs Junction Temperature
Source Voltage
6
6
5
4
3
2
1
0
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VGS = 0 V
VDS = 5 V
1
TJ = 150 o
C
0.1
TJ = 150 o
C
TJ = 25 oC
T
J = 25 o
C
0.01
TJ = −55oC
TJ = −55oC
0.001
1
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
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4
FDMA86108LZ
TYPICAL CHARACTERISTICS (continued)
(T = 25°C unless otherwise noted)
J
10
8
200
100
ID = 2.2 A
Ciss
VDD = 25 V
VDD = 50 V
Coss
10
6
VDD = 75 V
4
1
Crss
2
f = 1 MHz
VGS = 0 V
0.1
0
0.1
1
10
, DRAIN TO SOURCE VOLTAGE (V)
DS
100
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
Q , GATE CHARGE (nC)
g
V
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
10−1
10−2
10−3
10−4
10−5
10−6
10−7
10−8
10−9
20
10
VGS = 0 V
10 ms
1
0.1
100 ms
1 ms
10 ms
100 ms
1 s
10 s
DC
THIS AREA IS
LIMITED BY r DS(on)
TJ = 125 o
C
SINGLE PULSE
= MAX RATED
TJ
0.01
0.001
TJ = 25 o
C
qJA = 145 o
R
C/W
CURVE BENT TO
MEASURED DATA
= 25 o
TA
C
0.1
1
10
100
400
0
5
10
15
20
25
30
35
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
DS
, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Gate Leakage Current vs.
Gate to Source Voltage
Figure 10. Forward Bias Safe
Operating Area
2000
1000
SINGLE PULSE
qJA = 145 o
R
C/W
= 25 o
TA
C
100
10
1
0.1
10−5
10−4
10−3
10−2
t, PULSE WIDTH (s)
10−1
1
10
100
1000
Figure 11. Single Pulse Maximum Power Dissipation
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5
FDMA86108LZ
TYPICAL CHARACTERISTICS (continued)
(T = 25°C unless otherwise noted)
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
0.01
P
DM
t
1
t
2
NOTES:
SINGLE PULSE
Z
(t) = r(t) x R
o
0.001
0.0001
qJA
qJA
R
= 145 C/W
qJA
Peak T = P
Duty Cycle, D = t / t
x Z (t) + T
J
DM
qJA A
1
2
10−5
10−4
10−3
10−2
t, RECTANGULAR PULSE DURATION (s)
10−1
1
10
100
1000
Figure 12. Junction to Ambient Transient Thermal Response Curve
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
MicroFET is trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other
countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN6 2x2, 0.65P
CASE 511CZ
ISSUE O
DATE 31 JUL 2016
1.70
1.00
0.05
C
2.0
A
(0.20)
No Traces
2X
B
allowed in
this Area
4
6
2.0
1.05
2.30
0.47(6X)
0.05
C
PIN#1 IDENT
TOP VIEW
2X
1
3
0.40(6X)
0.65
0.75 0.05
RECOMMENDED
LAND PATTERN OPT 1
0.10
C
0.20 0.05
1.70
0.45
(0.20)
1.00
0.08
C
SIDE VIEW
C
0.025 0.025
4
6
SEATING
PLANE
2.00 0.05
(0.15)
0.90 0.05
PIN #1 IDENT
1.05
0.66
(0.50)
0.30 0.05
2.30
(0.20)4X
0.47(6X)
1
3
0.28 0.05
(6X)
1
3
0.56 0.05
1.00 0.05
0.40(7X)
0.65
RECOMMENDED
LAND PATTERN OPT 2
2.00 0.05
(6X)
(0.50)
NOTES:
6
4
A. PACKAGE DOES NOT FULLY CONFORM
0.30 0.05
0.10
TO JEDEC MO−229 REGISTRATION
0.65
C
C
A
B
B. DIMENSIONS ARE IN MILLIMETERS.
1.30
0.05
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
BOTTOM VIEW
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13614G
WDFN6 2X2, 0.65P
PAGE 1 OF 1
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© Semiconductor Components Industries, LLC, 2019
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