FDMA8878-F130 [ONSEMI]
单 N 沟道，Power Trench® MOSFET，30V，9.0A，16mΩ;
| 型号： | FDMA8878-F130 |
| 厂家： | 
ONSEMI |
| 描述： | 单 N 沟道，Power Trench® MOSFET，30V，9.0A，16mΩ |
| 文件： | 总7页 (文件大小：245K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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+
MOSFET – N-Channel,
POWERTRENCH)
30 V, 9.0 A, 16 mW
WDFN6
CASE 511CZ
FDMA8878,
FDMA8878-F130
Bottom Drain Contact
D
D
G
1
2
3
D
D
S
6
5
4
General Description
This N−Channel MOSFET is produced using onsemi’s advanced
POWERTRENCH process that has been optimized for R
,
DS(on)
switching performance.
Features
MARKING DIAGRAM
• Max R
• Max R
= 16 mW @ V = 10 V, I = 9.0 A
GS D
DS(on)
= 19 mW @ V = 4.5 V, I = 8.5 A
DS(on)
GS
D
• High Performance Trench Technology for Extremely Low R
• Fast Switching Speed
DS(on)
ZXYKK
878
• Pb−Free, Halide Free and RoHS Compliant
Applications
• DC−DC Buck Converters
• Load Switch in NB
• Notebook Battery Power Management
Z
= Assembly Plant Code
= 2−Digit Date Code
= Lot Run Code
XY
KK
878
= Specific Device Code
ABSOLUTE MAXIMUM RATINGS
A
PIN ASSIGNMENT
T = 25°C unless otherwise noted.
1
D
D
G
S
S
Symbol
Parameter
Ratings
30
Unit
V
V
DS
V
GS
Drain to Source Voltage
Gate to Source Voltage (Note 3)
20
V
I
D
Drain Current
A
D
Continuous (Package Limited),
10
T
C
= 25°C
Continuous, T = 25°C (Note 1a)
9.0
40
A
Pulsed
6
D
D
P
D
Power Dissipation, T = 25°C
W
A
(Note 1a)
(Note 1b)
2.4
0.9
ORDERING INFORMATION
See detailed ordering and shipping information on page 5
of this data sheet.
T , T
Operating and Storage Junction
Temperature Range
−55 to +150
°C
J
STG
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings
Unit
R
Thermal Resistance,
°C/W
q
JA
Junction to Ambient
(Note 1a)
52
145
(Note 1b)
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
February, 2022 − Rev. 4
FDMA8878/D
FDMA8878, FDMA8878−F130
ELECTRICAL CHARACTERISTICS T = 25°C unless otherwise noted.
A
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
30
−
−
−
V
DSS
D
GS
Breakdown Voltage Temperature
Coefficient
= 250 mA,
Referenced to 25°C
−
26
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate–Body Leakage
V
V
= 24 V, V = 0 V
−
−
−
−
1
mA
DSS
GSS
DS
GS
I
=
20 V, V = 0 V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 250 mA
1.2
1.8
3.0
V
GS(th)
DS
GS D
Gate to Source Threshold Voltage
Temperature Coefficient
= 250 mA, Referenced to 25°C
−
−5
−
mV/°C
DVGS(th)
DTJ
D
I
I
I
= 9.0 A, V = 10 V,
−
−
−
13
16
17
16
19
21
R
Static Drain to Source On–Resistance
mW
D
D
D
GS
DS(on)
= 8.5 A, V = 4.5 V
GS
= 9.0 A, V = 10 V,
GS
T = 125°C
J
g
FS
Forward Transconductance
V
DD
= 5 V, I = 9.0 A
−
41
−
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
−
−
−
−
539
172
24
720
230
35
V
= −15 V, V = 0 V,
pF
iss
DS
GS
f = 1.0 MHz
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
rss
R
1.3
−
W
G
SWITCHING CHARACTERISTICS
t
Turn–On Delay Time
Rise Time
−
−
−
−
−
6
2
12
10
25
10
12
V
V
= 15 V, I = 9.0 A,
ns
d(on)
DD
GS
D
= 10 V, R
= 6 W
GEN
t
r
t
Turn–Off Delay Time
Fall Time
14
2
d(off)
t
f
V
= 0 V to 10 V, V = 15 V,
8.5
nC
nC
Q
Total Gate Charge
GS
GS
DD
DD
g(TOT)
I
D
= 9.0 A
V
= 0 V to 4.5 V, V = 15 V,
−
4.1
5.8
DD
I
D
= 9.0 A
Q
Gate to Source Charge
−
−
1.6
1.2
−
−
V
= 15 V, I = 9.0 A
D
gs
Q
Gate to Drain “Miller” Charge
gd
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
V
V
= 0 V, I = 2.0 A (Note 2)
−
−
−
−
0.75
0.86
16
1.2
1.2
28
V
Source to Drain Diode Forward Voltage
V
GS
S
SD
= 0 V, I = 9.0 A (Note 2)
GS
S
t
Reverse Recovery Time
ns
I = 9.0 A, di/dt = 100 A/ms
F
rr
Q
Reverse Recovery Charge
4
10
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
1. R
is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
q
JA
mounting surface of the drain pins. R
is guaranteed by design while R
is determined by the user’s board design.
q
q
CA
JC
a) 52°C/W when mounted
b) 145°C/W when
mounted on a minimum
pad of 2 oz copper.
2
on a 1 in pad of 2 oz. copper.
2. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0%
3. As an N−ch device, the negative V rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
gs
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2
FDMA8878, FDMA8878−F130
TYPICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
J
6
40
32
V
GS
= 3 V
V
= 10 V
GS
5
4
V
GS
= 3.5 V
V
= 4.5 V
GS
V
GS
= 4 V
V
GS
= 3.5 V
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
24
16
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
3
2
1
0
V
GS
= 4 V
V
GS
= 3 V
8
0
V
= 10 V
GS
V
GS
= 4.5 V
24
4
0
1
2
3
0
8
16
32
40
I , Drain Current (A)
D
V
DS
, Drain to Source Voltage (V)
Figure 1. On−Region Characteristics
Figure 2. Normalized On−Resistance vs.
Drain Current and Gate Voltage
1.5
1.4
1.3
60
50
I
= 9 A
= 10 V
D
I = 9 A
D
V
GS
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
1.2
1.1
40
30
1.0
0.9
0.8
0.7
T = 125°C
J
20
10
T = 25°C
J
−75 −50 −25
0
25
50
75 100 125 150
2
4
6
8
10
T , Junction Temperature (5C)
J
V
GS
, Gate to Source Voltage (V)
Figure 3. Normalized On−Resistance vs. Junction
Figure 4. On−Resistance vs. Gate−to−Source
Temperature
Voltage
100
10
40
30
20
10
0
V = 0 V
GS
V
= 5 V
DD
Pulse Duration = 80 ms
Duty Cycle = 0.5% Max
T = 125°C
J
1
T = 125°C
J
T = 25°C
J
T = 25°C
J
0.1
T = −55°C
J
0.01
0.001
T = −55°C
J
1.5
2.0
2.5
3.0
3.5
4.0
0.2
0.4
0.6
0.8
1.0
1.2
V
SD
, Body Diode Forward Voltage (V)
V
GS
, Gate to Source Voltage (V)
Figure 5. Transfer Characteristics
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature
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3
FDMA8878, FDMA8878−F130
TYPICAL CHARACTERISTICS (continued)
(T = 25°C unless otherwise noted)
J
10
1000
V
DD
= 10 V
I
D
= 9 A
C
iss
8
6
4
2
V
DD
= 15 V
C
oss
V
DD
= 20 V
100
C
rss
f = 1 MHz
= 0 V
V
GS
0
10
0.1
0
2
4
6
8
10
1
10
30
Q , Gate Charge (nC)
g
V
DS
, Drain to Source Voltage (V)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance Characteristics
100
50
10
Single Pulse
R
= 145°C/W
q
JA
T = 25°C
A
10
This area
is limited by
1
0.1
1 ms
R
DS(on)
10 ms
100 ms
1 s
10 s
DC
Single Pulse
T = Max Rated
J
R
= 145°C/W
1
q
JA
T = 25°C
A
0.01
0.5
0.1
1
10
80
0.001
0.01
0.1
1
10
100
1000
V
DS
, Drain to Source Voltage (V)
t, Pulse Width (s)
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum Power Dissipation
2
Duty Cycle−Descending Order
1
D = 0.5
0.2
0.1
P
DM
0.1
t
1
t
2
0.05
0.02
NOTES:
Duty Factor D = t / t
0.01
Single Pulse
1
2
0.01
R
= 145°C/W
PEAK T = P
× Z
× R
+ T
JA A
q
JA
q
q
J
DM
JA
0.005
0.001
0.01
0.1
1
10
100
1000
t, Rectangular Pulse Duration (sec)
Figure 11. Transient Thermal Response Curve
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
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4
FDMA8878, FDMA8878−F130
ORDERING INFORMATION
Device Order Number
FDMA8878
†
Package Type
Pin 1 Orientation in Tape Cavity
Shipping
WDFN6
(Pb−Free/Halide Free)
Top Left
3000 / Tape & Reel
3000 / Tape & Reel
FDMA8878−F130
WDFN6
(Pb−Free/Halide Free)
Top Right
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN6 2x2, 0.65P
CASE 511CZ
ISSUE O
DATE 31 JUL 2016
1.70
1.00
0.05
C
2.0
A
(0.20)
No Traces
2X
B
allowed in
this Area
4
6
2.0
1.05
2.30
0.47(6X)
0.05
C
PIN#1 IDENT
TOP VIEW
2X
1
3
0.40(6X)
0.65
0.75 0.05
RECOMMENDED
LAND PATTERN OPT 1
0.10
C
0.20 0.05
1.70
0.45
(0.20)
1.00
0.08
C
SIDE VIEW
C
0.025 0.025
4
6
SEATING
PLANE
2.00 0.05
(0.15)
0.90 0.05
PIN #1 IDENT
1.05
0.66
(0.50)
0.30 0.05
2.30
(0.20)4X
0.47(6X)
1
3
0.28 0.05
(6X)
1
3
0.56 0.05
1.00 0.05
0.40(7X)
0.65
RECOMMENDED
LAND PATTERN OPT 2
2.00 0.05
(6X)
(0.50)
NOTES:
6
4
A. PACKAGE DOES NOT FULLY CONFORM
0.30 0.05
0.10
TO JEDEC MO−229 REGISTRATION
0.65
C
C
A
B
B. DIMENSIONS ARE IN MILLIMETERS.
1.30
0.05
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
BOTTOM VIEW
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13614G
WDFN6 2X2, 0.65P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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© Semiconductor Components Industries, LLC, 2019
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onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
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