FDMC86160 [ONSEMI]
N 沟道，PowerTrench® MOSFET，100V，43A，14mΩ;
| 型号： | FDMC86160 |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，PowerTrench® MOSFET，100V，43A，14mΩ 开关 脉冲 光电二极管 晶体管 |
| 文件： | 总7页 (文件大小：614K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET – N-Channel,
Shielded Gate,
POWERTRENCH)
V
r
MAX
I MAX
D
DS
DS(on)
100 V
14 mW @ 10 V
23 mW @ 6 V
43 A
100 V, 43 A, 14 mW
Pin 1
Pin 1
S
S
S
G
FDMC86160
D
D
D
D
General Description
This N−Channel MOSFET is produced using onsemi’s advanced
PowerTrench process that incorporates Shielded Gate technology. This
process has been optimized for the on−state resistance. This device is
Top
Bottom
WDFN8 3.3X3.3, 0.65P
CASE 483AW
well suited for applications where ulta low R
is required in small
DS(on)
spaces such as High performance VRM, POL and orring functions.
MARKING DIAGRAM
Applications
• Bridge Topologies
• Synchronous Rectifier
XXXX
AYWW
Features
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
• Shielded Gate MOSFET Technology
• Max r
• Max r
= 14 mW at V = 10 V, I = 9 A
GS D
DS(on)
WW = Work Week
= 23 mW at V = 6 V, I = 7 A
DS(on)
GS
D
• High Performance Technology for Extremely Low r
• This Device is Lead−Free and RoHS Compliant
DS(on)
PIN ASSIGNMENT
ABSOLUTE MAXIMUM RATINGS T = 25°C unless otherwise noted
A
S
8
D
1
2
Symbol
Parameter
Drain−Source Voltage
Value
100
20
Unit
V
S
S
7
6
5
D
D
D
V
DSS
GSS
Gate−Source Voltage
V
V
3
4
Drain Current
− Continuous
− Continuous
− Pulsed
I
D
(T = 25°C)
A
43
9
50
A
C
G
(T = 25°C) (Note 1a)
(Note 4)
Single Pulse Avalanche Energy
Power Dissipation
(Note 3)
181
mJ
W
E
AS
P
D
ORDERING INFORMATION
(T = 25°C)
54
2.3
C
(T = 25°C) (Note 1a)
A
†
Device
Package
Shipping
Operating and Storage Junction
STG
_C
−55 to +150
T , T
J
Temperature Range
FDMC86160
WDFN8
3000 /
3.3X3.3, 0.65P
CASE 483AW
(Pb−Free)
Tape & Reel
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifica-
tions Brochure, BRD8011/D.
THERMAL CHARACTERISTICS T = 25°C unless otherwise noted
A
Symbol
Parameter
Value
Unit
Thermal Resistance, Junction−to−Ambient
°C/W
2.3
R
θ
JC
(Note 1)
Thermal Resistance, Junction−to−Case
°C/W
53
R
θ
JA
(Note 1a)
© Semiconductor Components Industries, LLC, 2023
1
Publication Order Number:
January, 2023 − Rev. 3
FDMC86160/D
FDMC86160
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
I
I
= 250 mA, V = 0 V
100
−
−
−
V
DSS
D
GS
Breakdown Voltage Temperature
Coefficient
= 250 mA, referenced to 25°C
−
73
mV/°C
DBVDSS
DTJ
D
I
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
V
V
= 80 V, V = 0 V
−
−
−
−
1
mA
DSS
GSS
DS
GS
I
=
20 V, V = 0 V
100
nA
GS
DS
ON CHARACTERISTICS
V
Gate to Source Threshold Voltage
V
I
= V , I = 250 mA
2
2.9
4
V
GS(th)
GS
DS
D
Gate to Source Threshold Voltage Temperature
Coefficient
= 250 mA, referenced to 25°C
−
−9
−
mV/°C
DVGS(th)
DTJ
D
r
Static Drain to Source On Resistance
V
GS
V
GS
V
GS
V
DS
= 10 V, I = 9 A
−
−
−
−
11.2
16
14
23
26
−
mW
DS(on)
D
= 6 V, I = 7 A
D
= 10 V, I = 9 A, T = 125°C
21
D
J
g
FS
Forward Transconductance
= 10 V, I = 9 A
43
S
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 50 V, V = 0 V,
−
−
968
241
11
1290
320
20
pF
pF
pF
W
iss
DS
GS
f = 1 MHz
C
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
oss
C
−
rss
R
0.1
0.6
2.5
g
SWITCHING CHARACTERISTICS
t
Turn−On Delay Time
Rise Time
V
V
= 50 V, I = 9 A,
−
−
−
−
−
−
−
−
9.7
3.6
16
19
10
30
10
22
15
−
ns
ns
d(on)
DD
GS
D
= 10 V, R
= 6 W
GEN
t
r
t
Turn−Off Delay Time
Fall Time
ns
d(off)
t
f
3.4
15
ns
Q
Q
Total Gate Charge
Total Gate Charge
Total Gate Charge
Gate to Drain “Miller” Charge
V
V
= 0 V to 10 V
= 0 V to 6 V
V
DD
= 50 V,
= 9 A
nC
nC
nC
nC
g(TOT)
g(TOT)
GS
I
D
9.8
4.4
3.5
GS
Q
Q
gs
−
gd
DRAIN−SOURCE DIODE CHARACTERISTICS
V
Source to Drain Diode Forward Voltage
V
V
= 0 V, I = 9 A
(Note 2)
(Note 2)
−
−
−
−
0.79
0.72
47
1.3
1.2
75
V
SD
GS
S
= 0 V, I = 1.9 A
GS
S
t
Reverse Recovery Time
I = 9 A, di/dt = 100 A/ms
F
ns
rr
Q
Reverse Recovery Charge
45
73
nC
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR−4 material. R
is guaranteed
JC
q
q
JA
by design while R
is determined bythe user’s board design.
q
CA
a. 53°C/W when mounted on
b. 125°C/W when mounted on
a minimum pad of 2 oz copper
2
a 1 in pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. E of 181 mJ is based on starting T = 25 °C, L = 3 mH, I = 11 A, V = 100 V, V = 10 V. 100% test at L = 0.1 mH, I = 35 A.
AS
J
AS
DD
GS
AS
4. Pulse Id refers to Figure.11 Forward Bias Safe Operation Area.
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2
FDMC86160
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
50
40
30
20
10
0
5
V = 4.5 V
GS
V
= 10 V
GS
V
GS
= 7 V
= 6 V
4
3
2
V
GS
= 5 V
V
GS
= 5.5 V
V
GS
V
= 5.5 V
GS
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
= 6 V
= 7 V
GS
V
V
= 5 V
GS
GS
1
V
GS
= 10 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
V
= 4.5 V
GS
0
0
1
2
3
4
5
0
10
20
30
40
50
V
DS
, DRAIN−SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
D
4.0
Figure 2. Normalized On−Resistance vs Drain
Figure 1. On−Region Characteristics
Current and Gate Voltage
2.2
2.0
1.8
60
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
I
V
= 9 A
D
I
D
= 9 A
= 10 V
GS
50
40
1.6
1.4
1.2
1.0
0.8
0.6
0.4
30
20
T = 125°C
J
T = 25°C
J
10
0
4
5
6
7
8
9
10
−75 −50 −25
0
25
50
75 100 125 150
V
GS
, GATE TO SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE (°C)
J
Figure 3. Normalized On−Resistance vs
Figure 4. On−Resistance vs Gate to Source
Junction Temperature
Voltage
50
40
30
20
10
0
100
10
V
GS
= 0 V
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
T = 150°C
J
V
DS
= 5 V
T = 150°C
J
1
T = 25°C
J
T = 25°C
J
0.1
T = −55°C
J
T = 25°C
J
0.01
0.001
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
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3
FDMC86160
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
10000
10
8
I
D
= 9 A
V
= 25 V
DD
C
C
iss
1000
100
10
V
= 50 V
DD
6
4
2
0
C
oss
V
DD
= 75 V
rss
F = 1 Mhz
= 0 V
V
GS
1
16
0.1
1
10
, DRAIN TO SOURCE VOLTAGE (V)
DS
100
0
4
8
12
Q , GATE CHARGE (nC)
g
V
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain to
Source Voltage
100
50
T = 25°C
J
40
30
20
10
0
V
GS
= 10 V
T = 100°C
J
10
1
V
= 6 V
GS
T = 125°C
J
R
= 2.3°C/W
q
JC
0.001
0.01
0.1
1
100
10
25
50
75
100
125 150
t , TIME IN AVALANCHE (ms)
AV
T , CASE TEMPERATURE (°C)
C
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
10000
1000
300
100
10 ms
10
1
THIS AREA IS
LIMITED BY r
100 ms
DS(on)
100
10
SINGLE PULSE
SINGLE PULSE
T = MAX RATED
1 ms
J
R
T
= 2.3°C/W
= 25°C
R
T
= 2.3°C/W
= 25°C
q
q
JC
JC
10 ms
DC
C
C
0.1
−5
−4
−3
−2
−1
1
500
0.1
1
10
100
10
10
10
10
10
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
t, PULSE WIDTH (s)
Figure 11. Forward Bias Safe
Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
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4
FDMC86160
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted) (continued)
J
2
1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
PDM
0.1
0.1
0.05
t1
0.02
t2
NOTES:
(t) = r(t) x R
0.01
0.01
Z
q
q
JC
JC
R
= 2.3°C/W
SINGLE PULSE
q
JC
Peak T = P
x Z (t) + T
q
J
DM
JC
C
Duty Cycle: D = t / t
1
2
0.001
10−5
10−4
10−3
10−2
10−1
1
t, RECTANGULAR PULSE DURATION (s)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is registered trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN8 3.3X3.3, 0.65P
CASE 483AW
ISSUE A
DATE 10 SEP 2019
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
XXXX = Specific Device Code
A
Y
= Assembly Location
= Year
XXXX
AYWW
WW = Work Week
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13672G
WDFN8 3.3X3.3, 0.65P
PAGE 1 OF 1
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
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© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
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