FDMS86252L [ONSEMI]
N 沟道，屏蔽门极，PowerTrench® MOSFET，150V，12A，56mΩ;
| 型号： | FDMS86252L |
| 厂家： | 
ONSEMI |
| 描述： | N 沟道，屏蔽门极，PowerTrench® MOSFET，150V，12A，56mΩ |
| 文件： | 总8页 (文件大小：401K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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October 2014
FDMS86252L
N-Channel Shielded Gate PowerTrench® MOSFET
150 V, 12 A, 56 mΩ
Features
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s
Shielded Gate MOSFET Technology
advanced PowerTrench® process that
Max rDS(on) = 56 mΩ at VGS = 10 V, ID = 4.4 A
Max rDS(on) = 71 mΩ at VGS = 6 V, ID = 3.8 A
Max rDS(on) = 75 mΩ at VGS = 4.5 V, ID = 3.7 A
incorporates Shielded Gate technology. This process has been
optimized for the on-state resistance and yet maintain superior
switching performance.
Applications
Advanced package and silicon combination for low rDS(on) and
high efficiency
OringFET / Load Switching
Synchronous Rectification
DC-DC Conversion
Next generation enhanced body diode technol-
ogy, engineered for soft recovery
MSL1 robust package design
100% UIL tested
RoHS Compliant
Bottom
Top
Pin 1
S
S
D
D
D
D
Pin 1
S
S
G
S
S
G
D
D
D
D
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
150
V
V
±20
TC = 25 °C
TA = 25 °C
12
ID
(Note 1a)
(Note 4)
(Note 3)
4.4
A
-Pulsed
30
EAS
Single Pulse Avalanche Energy
Power Dissipation
73
50
mJ
W
TC = 25 °C
TA = 25 °C
PD
Power Dissipation
(Note 1a)
2.5
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
2.5
50
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
12 mm
Quantity
FDMS86252L
FDMS86252L
Power 56
3000 units
©2013 Fairchild Semiconductor Corporation
FDMS86252L Rev.C2
www.fairchildsemi.com
1
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
150
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
104
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 120 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1
μA
±100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
1
1.5
-6
3
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = 250 μA, referenced to 25 °C
mV/°C
V
GS = 10 V, ID = 4.4 A
46
48
52
56
71
75
VGS = 6 V, ID = 3.8 A
VGS = 4.5 V, ID = 3.7 A
rDS(on)
Static Drain to Source On Resistance
Forward Transconductance
mΩ
VGS = 10 V, ID = 4.4 A,
TJ = 125 °C
90
21
110
gFS
VDS = 5 V, ID = 4.4 A
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
952
74
3
1335
105
5
pF
pF
pF
Ω
VDS = 75 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.1
0.6
1.8
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
6.8
1.4
19
14
10
34
10
21
11
ns
ns
VDD = 75 V, ID = 4.4 A,
V
GS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
ns
2.9
15
ns
Qg
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
VGS = 0 V to 4.5 V
nC
nC
nC
nC
Qg
7.6
2.1
2.3
VDD = 75 V,
D = 4.4 A
I
Qgs
Qgd
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 1.9 A
(Note 2)
(Note 2)
0.7
0.8
53
1.2
1.3
85
VSD
Source-Drain Diode Forward Voltage
V
VGS = 0 V, IS = 4.4 A
trr
Reverse Recovery Time
ns
IF = 4.4 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
51
82
nC
Notes:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is guaranteed by design while R is determined by
θCA
θJA
θJC
the user's board design.
a.
50 °C/W when mounted on a
1 in pad of 2 oz copper
125 °C/W when mounted on a
minimum pad of 2 oz copper.
b.
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. E of 73 mJ is based on Starting T = 25 °C, L = 3 mH, I = 7 A, V = 150 V, V = 10 V. 100% tested at L =0.1 mH, I = 24 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id limited by junction temperature, td<=100 μS, please refer to SOA curve for more details.
©2013 Fairchild Semiconductor Corporation
FDMS86252L Rev.C2
www.fairchildsemi.com
2
Typical Characteristics TJ = 25 °C unless otherwise noted
30
3.0
2.5
2.0
1.5
1.0
0.5
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
24
18
12
6
VGS = 6 V
VGS = 2.5 V
VGS = 4.5 V
VGS = 3.5 V
VGS = 3 V
VGS = 3.5 V
VGS = 3 V
VGS = 10 V
VGS = 6 V
18
VGS = 4.5 V
12
VGS = 2.5 V
1
0
0
2
3
4
5
0
6
24
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
150
2.4
PULSE DURATION = 80 μs
ID = 4.4 A
DUTY CYCLE = 0.5% MAX
VGS = 10 V
2.0
1.6
1.2
0.8
0.4
ID = 4.4 A
120
90
TJ = 125 o
C
60
TJ = 25 o
C
30
2
4
6
8
10
-75 -50 -25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure4. On-Resistance vs Gate to
Source Voltage
Figure 3. Normalized On Resistance
vs Junction Temperature
30
30
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
10
24
TJ = 150 o
C
VDS = 5 V
1
18
TJ = 150 o
C
0.1
12
6
TJ = 25 o
C
TJ = 25 o
C
0.01
0.001
TJ = -55 o
C
TJ = -55 o
C
0
1
2
3
4
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2013 Fairchild Semiconductor Corporation
FDMS86252L Rev.C2
www.fairchildsemi.com
3
Typical Characteristics TJ = 25 °C unless otherwise noted
10
10000
1000
100
10
ID = 4.4 A
8
Ciss
VDD = 50 V
VDD = 75 V
6
Coss
4
VDD = 100 V
Crss
2
0
f = 1 MHz
GS = 0 V
V
1
0.1
0
4
8
12
16
1
10
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
24
18
12
6
30
RθJC = 2.5 oC/W
TJ = 25 o
C
10
VGS = 10 V
TJ = 100 o
C
VGS = 4.5 V
TJ = 125 o
C
Limited by Package
50
0
25
1
0.001
0.01
0.1
1
10
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
100
10
10000
SINGLE PULSE
RθJC = 2.5 oC/W
TC = 25 oC
10 us
1000
100
10
THIS AREA IS
LIMITED BY rDS(on)
100 us
1 ms
1
SINGLE PULSE
TJ = MAX RATED
RθJC = 2.5 oC/W
TC = 25 oC
10 ms
DC
0.1
CURVE BENT TO
MEASURED DATA
0.01
10-5
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
0.1
1
10
100
500
1
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure12. Single Pulse Maximum
Power Dissipation
©2013 Fairchild Semiconductor Corporation
FDMS86252L Rev.C2
www.fairchildsemi.com
4
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
P
DM
0.1
0.05
0.02
0.01
t
0.1
1
t
2
NOTES:
(t) = r(t) x R
Z
θJC
θJC
o
R
= 2.5 C/W
θJC
Peak T = P
Duty Cycle, D = t / t
x Z (t) + T
J
DM
θJC C
SINGLE PULSE
0.01
1
2
0.005
10-5
10-4
10-3
10-2
10-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
©2013 Fairchild Semiconductor Corporation
FDMS86252L Rev.C2
www.fairchildsemi.com
5
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE A
5.10
3.91
5.10
PKG
A
SEE
DETAIL B
1.27
6.61
C
L
B
8
7
6
5
8
5
0.77
4.52
3.75
5.85
5.65
C
PKG
6.15
L
KEEP OUT
AREA
1.27
1
4
1
2
3
4
TOP VIEW
0.61
1.27
3.81
LAND PATTERN
RECOMMENDATION
OPTIONAL DRAFT
ANGLE MAY APPEAR
ON FOUR SIDES
SEE
DETAIL C
5.00
4.80
OF THE PACKAGE
0.35
0.15
ꢀꢁꢂꢃ
0.10 C
0.30
0.05
0.05
0.00
SIDE VIEW
ꢀꢁꢂꢃ
8X
0.08 C
C
0.35
0.15
5.20
4.80
1.10
0.90
SEATING
PLANE
DETAIL C
DETAIL B
SCALE: 2:1
3.81
SCALE: 2:1
1.27
0.51
(8X)
0.31
NOTES: UNLESS OTHERWISE SPECIFIED
(0.34)
A. PACKAGE STANDARD REFERENCE: JEDEC MO-240,
ISSUE A, VAR. AA,.
0.10
C A B
1
2
3
4
B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH.
MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM.
C. ALL DIMENSIONS ARE IN MILLIMETERS.
0.76
0.51
(0.52)
D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009.
E. IT IS RECOMMENDED TO HAVE NO TRACES OR
VIAS WITHIN THE KEEP OUT AREA.
6.25
5.90
+0.30
3.48
-0.10
(0.50)
(0.30)
(2X)
8
7
6
5
ꢀꢄꢅꢅꢀꢄꢂꢀ
+0.10
-0.15
0.20
(8X)
3.96
3.61
BOTTOM VIEW
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
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