FDMS86550 [ONSEMI]
60V N沟道PowerTrench® MOSFET;
| 型号： | FDMS86550 |
| 厂家： | 
ONSEMI |
| 描述： | 60V N沟道PowerTrench® MOSFET |
| 文件： | 总8页 (文件大小：348K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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March 2015
FDMS86550
N-Channel PowerTrench® MOSFET
60 V, 234 A, 1.65 mΩ
Features
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process that has
been especially tailored to minimize the on-state resistance and
yet maintain superior switching performance.
Max rDS(on) = 1.65 mΩ at VGS = 10 V, ID = 32 A
Max rDS(on) = 2.2 mΩ at VGS = 8 V, ID = 27 A
Advanced Package and Silicon combination for low rDS(on)
and high efficiency
MSL1 robust package design
100% UIL tested
Applications
Primary DC-DC MOSFET
Secondary Synchronous Rectifier
Load Switch
RoHS Compliant
Bottom
Top
Pin 1
S
S
D
D
D
D
S
Pin 1
S
G
S
S
G
D
D
D
D
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
Parameter
Ratings
60
Units
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
V
V
±20
TC = 25 °C
TC = 100 °C
TA = 25 °C
(Note 5)
(Note 5)
(Note 1a)
(Note 4)
(Note 3)
234
148
ID
A
-Continuous
32
-Pulsed
1021
937
EAS
Single Pulse Avalanche Energy
Power Dissipation
Power Dissipation
mJ
W
TC = 25 °C
TA = 25 °C
156
PD
(Note 1a)
2.7
TJ, TSTG
Operating and Storage Junction Temperature Range
-55 to +150
°C
Thermal Characteristics
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
0.8
45
°C/W
(Note 1a)
Package Marking and Ordering Information
Device Marking
Device
Package
Reel Size
13 ’’
Tape Width
12 mm
Quantity
FDMS86550
FDMS86550
Power 56
3000 units
©2013 Fairchild Semiconductor Corporation
FDMS86550 Rev.1.7
1
www.fairchildsemi.com
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
60
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
I
D = 250 μA, referenced to 25 °C
31
mV/°C
IDSS
IGSS
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
VDS = 48 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1
μA
±100
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
2.5
3.3
-12
4.5
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
I
D = 250 μA, referenced to 25 °C
mV/°C
V
GS = 10 V, ID = 32 A
1.4
1.7
2.2
96
1.65
2.2
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
VGS = 8 V, ID = 27 A
mΩ
VGS = 10 V, ID = 32 A, TJ = 125 °C
VDS = 5 V, ID = 32 A
2.6
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
8235
2140
70
11530
3000
120
pF
pF
pF
Ω
VDS = 30 V, VGS = 0 V,
f = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
0.1
0.9
2.7
Switching Characteristics
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
43
27
42
11
69
43
ns
ns
VDD = 30 V, ID = 32 A,
VGS = 10 V, RGEN = 6 Ω
Turn-Off Delay Time
Fall Time
67
ns
20
ns
Qg
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VGS = 0 V to 10 V
VGS = 0 V to 8 V
110
90
40
20
154
126
nC
nC
nC
nC
Qg
VDD = 30 V,
D = 32 A
I
Qgs
Qgd
Drain-Source Diode Characteristics
V
GS = 0 V, IS = 2.1 A
(Note 2)
(Note 2)
0.7
0.8
68
1.2
1.3
109
99
VSD
Source to Drain Diode Forward Voltage
V
VGS = 0 V, IS = 32 A
trr
Reverse Recovery Time
ns
IF = 32 A, di/dt = 100 A/μs
Qrr
Reverse Recovery Charge
62
nC
Notes:
2
1. R
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
is determined by the user's board design.
θCA
θJA
a. 45 °C/W when mounted on a
b. 115 °C/W when mounted on a
minimum pad of 2 oz copper.
2
1 in pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. E of 937 mJ is based on starting T = 25 °C, L = 3 mH, I = 25 A, V = 60 V, V = 10 V. 100% test at L = 0.1 mH, I = 79 A.
AS
J
AS
DD
GS
AS
4. Pulsed Id please refer to Fig 11 SOA graph for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
©2013 Fairchild Semiconductor Corporation
FDMS86550 Rev.1.7
2
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
320
5
4
3
2
1
0
VGS = 5.5 V
VGS = 10 V
VGS = 8 V
240
VGS = 7 V
VGS = 6 V
VGS = 6.5 V
VGS = 6.5 V
160
VGS = 7 V
VGS = 6 V
VGS = 5.5 V
80
VGS = 8 V
VGS = 10 V
PULSE DURATION = 80 μs
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
DUTY CYCLE = 0.5% MAX
0
1
2
3
4
5
0
80
160
240
320
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure2. N o r m a l i z e d O n - R e s i s ta n c e
vs Drain Current and Gate Voltage
1.8
8
ID = 32 A
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 10 V
ID = 32 A
1.5
1.2
0.9
0.6
6
4
2
0
TJ = 125 o
C
TJ = 25 o
C
-75 -50 -25
0
25 50 75 100 125 150
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
F i gu re 3 . N orma li zed On - Res is ta nc e
vs Junction Temperature
Figure4. On-Resistance vs Gate to
Source Voltage
320
320
100
VGS = 0 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
240
160
80
10
1
VDS = 5 V
TJ = 150 o
C
TJ = 25 oC
TJ = 150 o
C
0.1
TJ = 25 o
C
0.01
0.001
TJ = -55 o
C
TJ = -55 o
C
0
2
3
4
5
6
7
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure6. Source to Drain Diode
Forward Voltage vs Source Current
©2013 Fairchild Semiconductor Corporation
FDMS86550 Rev.1.7
3
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
10
20000
10000
Ciss
ID = 32 A
8
VDD = 20 V
Coss
VDD = 30 V
VDD = 40 V
1000
100
10
6
4
Crss
2
0
f = 1 MHz
GS = 0 V
V
0
30
60
90
120
0.1
1
10
60
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure8. C a p a c i t a n c e v s D r a i n
to Source Voltage
250
200
150
100
50
100
10
1
RθJC = 0.8 oC/W
TJ = 25 o
C
VGS = 10 V
TJ = 100 o
C
VGS = 8 V
TJ = 125 o
C
0
25
0.01
0.1
1
10
100
1000
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
tAV, TIME IN AVALANCHE (ms)
Figure9. U n c l a m p e d I n d u c t i v e
Switching Capability
Figure10. Maximum Continuous Drain
Current vs Case Temperature
2000
1000
5000
SINGLE PULSE
RθJC = 0.8 oC/W
C = 25 o
T
C
10 μs
100
10
1
1000
THIS AREA IS
LIMITED BY rDS(on)
100 μs
1 ms
SINGLE PULSE
T
J = MAX RATED
θJC = 0.8 oC/W
C = 25 oC
10 ms
DC
R
CURVE BENT TO
MEASURED DATA
T
0.1
0.1
100
10-4
10-3
t, PULSE WIDTH (sec)
10-2
10-1
1
1
10
100 200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
©2013 Fairchild Semiconductor Corporation
FDMS86550 Rev.1.7
4
www.fairchildsemi.com
Typical Characteristics TJ = 25 °C unless otherwise noted
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
0.2
0.1
P
DM
0.05
0.02
0.01
t
1
0.1
t
2
NOTES:
SINGLE PULSE
Z
(t) = r(t) x R
= 0.8 °C/W
θJC
θJC
R
θJC
Peak T = P
x Z (t) + T
θJC C
J
DM
Duty Cycle, D = t / t
1
2
0.01
10-4
10-3
10-2
10-1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Transient Thermal Response Curve
©2013 Fairchild Semiconductor Corporation
FDMS86550 Rev.1.7
5
www.fairchildsemi.com
5.10
4.90
A
4.42
3.81
PKG
C
L
B
7
6
5
8
8
5
1.14
KEEP OUT AREA
3.65
6.25
5.90
C
PKG
L
6.61
4.79
1.27
1
4
PIN #1
IDICATOR
TOP VIEW
SIDE VIEW
1
2
1.27
3
4
0.61
SEE
DETAIL A
3.81
5.10
LAND PATTERN
RECOMMENDATION
3.81
1.27
0.10
C A B
0.47
0.37
(0.38)
(8X)
1
4
(0.35)
0.65
0.55
NOTES: UNLESS OTHERWISE SPECIFIED
A) PACKAGE STANDARD REFERENCE:
JEDEC MO-240, ISSUE A, VAR. AA,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
PIN #1
INDICATOR
4.66
4.46
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) IT IS RECOMMENDED TO HAVE NO TRACES
OR VIAS WITHIN THE KEEP OUT AREA.
F) DRAWING FILE NAME: PQFN08JREV3.
8
5
0.70
4.33
4.13
BOTTOM VIEW
0.10 C
1.10
0.90
0.08 C
C
0.05
0.00
0.25
0.15
SEATING
PLANE
SCALE: 2:1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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