FDP075N15A-F102 [ONSEMI]

N 沟道,PowerTrench® MOSFET,150V,130A,7.5mΩ;
FDP075N15A-F102
型号: FDP075N15A-F102
厂家: ONSEMI    ONSEMI
描述:

N 沟道,PowerTrench® MOSFET,150V,130A,7.5mΩ

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文件: 总12页 (文件大小:705K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATA SHEET  
www.onsemi.cn  
MOSFET – N ṿᬣ,  
POWERTRENCH)  
V
R
MAX  
I MAX  
D
DSS  
DS(ON)  
150 V  
7.5 mW @ 10 V  
130 A  
*ꢀꢁꢂꢃꢄ120 A。  
150 V, 130 A, 7.5 mW  
FDP075N15A, FDB075N15A  
TO220  
CASE 221A09  
ꢀ  
N MOSFET onsemi POWERTRENCH  
ꢄꢅ,ꢆꢅꢂꢆꢇꢈꢉꢊꢋꢌꢍꢎꢉꢊꢋꢏꢐ  
ꢑꢒꢓꢔꢕꢍꢎꢖꢗ。  
G
D
S
ꢁ  
D
R  
= 6.25 mW (ꢙꢚꢛ) @ V = 10 V, I = 100 A  
GS D  
ꢘꢜꢓꢔ  
DS(on)  
2
D PAK3 (TO263, 3LEAD)  
CASE 418AJ  
G
ꢘꢍꢝꢞꢊꢑ  
S
ꢟꢠꢡꢢꢞꢍR  
ꢒꢊꢥꢦꢕꢍꢧ  
RoHS ꢩꢪ  
DS(on)  
MARKING DIAGRAM  
✈  
ATX / ꢬꢭꢮ / PSU ꢰꢱꢲꢥ  
ꢳꢐꢴꢊꢗ  
ꢶꢤꢷꢹ  
ꢘꢺꢚꢻꢚꢍꢛꢼꢮ  
$Y&Z&3&K  
FDB  
075N15A  
$Y&Z&3&K  
FDP  
075N15A  
$Y  
= onsemi logo  
FDP075N15A = Device Code  
FDB075N15A  
&Z  
&3  
&K  
= Assembly Plant Code  
= 3Digit Date Code Format  
= 2Digits Lot Run Traceability Code  
D
G
S
NChannel  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 9 of  
this data sheet.  
© Semiconductor Components Industries, LLC, 2017  
1
Publication Order Number:  
September, 2021 Rev. 3  
FDP075N15ACN/D  
FDP075N15A, FDB075N15A  
MOSFET (T = 25°C ꢅꢆ
׆
ꢇꢈꢉ)  
C
FDP075N15AF102  
FDB075N15A  
׶
ꢆ  
ꢇꢈ  
ꢉꢊ  
V
V
DSS  
ꢊꢋ-⁰ꢋꢃի  
᧥ꢋ-⁰ꢋꢃի  
ꢊꢋꢃꢄ  
150  
20  
V
GSS  
V
I
D
130*  
92  
A
- ᪮ঽ (T = 25°C)  
C
- ᪮ঽ (T = 100°C)  
C
I
ꢊꢋꢃꢄ  
- Β (ꢈꢉ 1)  
522  
A
mJ  
DM  
E
ԵΒ↺༉்Ჟ (ꢈꢉ 2)  
l
ٱ
dv/dt Ȝ (ꢈꢉ 3)  
ѿ૧  
588  
AS  
dv/dt  
6.0  
V/ns  
W
P
333  
(T = 25°C)  
C
D
- Į25°C Å⛺  
2.22  
-55 +175  
300  
W/°C  
°C  
T , T  
ļ٬സʈ
ꢌႆී
 
J
STG  
T
L
n⋪ᖅŔᣠჵএꢌႆ,᢭ҋ૶૓ 1/8”,ᓡঽ 5 Ң  
°C  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality  
should not be assumed, damage may occur and reliability may be affected.  
(֢૓ᚡᝧ)  
᥼ꢃիᡕ᪗ᣠ⍭ൺȜꢂϷϚŔȜ
Ö
׏
úय。ୢ᥼ᡕ᪗Ûĵ{Ȝ,෦ៀẵƽ
Öѿ்,
׏
úොೄ
Ö,ᅑ
ڭ
 
׏
∰ሇ。  
*ꢀꢁꢂꢃꢄ120 A。  
1. ⍭ൺȜ:௙Βꢍႆַnꢎꢌ。  
2. T = 25°CL = 3 mHI = 19.8 A。  
J
AS  
DD  
3. I 100 A, di/dt 200 A/ms, V BV  
, T = 25°C.  
SD  
DSS  
J
்  
FDP075N15AF102  
FDB075N15A  
׶
ꢆ  
ꢇꢈ  
ꢉꢊ  
0.45  
62.5  
40  
°C/W  
R
ꢎೃ૶૓ꢐꢑᣠଇȜ  
q
JC  
R
ꢎೃꢒꢐꢑ (ᣠꢓꢔꢕŔ 2
ט
⋪ꢗ) ଇȜ。  
q
JA  
2
ꢎೃꢒꢐꢑ D2-PAK (1 in 2
ט
⋪ꢗ) ଇȜ。  
www.onsemi.cn  
2
 
FDP075N15A, FDB075N15A  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
C
׶
ꢆ  
ꢇꢈ  
Ἣᚥ᥁ꢋ  
ꢌꢅ ꢍꢎꢅ ꢃꢅ  
ꢉꢊ  
ꢏꢐꢁ  
BV  
ꢊꢋ-⁰ꢋϛꢘꢃի  
I
I
= 250 mA, V = 0 V  
150  
V
DSS  
D
GS  
DBV  
DT  
/
ϛꢘꢃիꢌႆꢙꢚ  
= 250 mA, ꢌႆ֢25°C  
0.1  
V/°C  
DSS  
D
J
I
ꢛ᧥ꢋꢃիꢊꢋꢃꢄ  
V
DS  
V
DS  
V
GS  
= 120 V, V = 0 V  
1
mA  
DSS  
GS  
= 120 V, T = 150°C  
500  
100  
C
I
᧥ꢋꢊꢃꢄ  
=
20 V, V = 0 V  
nA  
GSS  
DS  
᫪⑙ꢁ  
V
᧥ꢋꢜȜի  
V
GS  
V
GS  
V
DS  
= V , I = 250 mA  
2.0  
4.0  
7.5  
V
mW  
S
GS(th)  
DS  
D
R
ꢊꢋೃ⁰ꢋꢝꢞොꢟꢃꢑ  
ױ
ꢡො  
= 10 V, I = 100 A  
6.25  
164  
DS(on)  
D
g
FS  
= 10 V, I = 100 A  
D
ꢒꢓꢁ  
C
ͅꢃꢣ  
V
= 75 V, V = 0 V, f = 1 MHz  
5525  
516  
21  
7350  
685  
pF  
pF  
pF  
pF  
nC  
nC  
nC  
nC  
W
iss  
DS  
GS  
C
Ϛꢃꢣ  
oss  
C
֭
ױ
Āꢢꢃꢣ  
rss  
C
்Ჟꢤ͓Ϛꢃꢣ  
10 V Ŕ᧥ꢋꢃꢥꢦᲟ  
᧥ꢋ - ⁰ꢋ᧥ꢋꢃꢥ  
᧥ꢋꢧ
א
ꢃꢥꢜȜ  
᧥ꢋ - ꢊꢋ Ҳ” ꢃꢥ  
ꢩꢪꢫꢃꢑ (G-S)  
V
V
= 75 V, V = 0 V  
909  
77  
oss(er)  
DS  
GS  
Q
= 75 V, I = 100 A, V = 10 V  
100  
g(tot)  
DS  
D
GS  
(ꢈꢉ 4)  
Q
26  
gs  
Q
11  
gs2  
Q
16  
gd  
ESR  
f = 1 MHz  
2.29  
ꢔꢏꢁ  
t
ොꢟꢬꢭꢮꢯ  
ꢏꢟ⛺ԧꢮꢯ  
͓ꢰꢬꢭꢮꢯ  
͓ℝꢮꢯ  
V
= 75 V, I = 100 A, V = 10 V,  
28  
37  
62  
21  
66  
84  
ns  
ns  
ns  
ns  
d(on)  
DD  
G
D
GS  
R
= 4.7 W  
t
r
(ꢈꢉ 4)  
t
134  
52  
d(off)  
t
f
⃯ᥡ -⁰ᥡ
ٱ
ꢁ  
I
ꢊꢋ - ⁰ꢋl
ٱ
ױ
᪮ঽꢃꢄ  
ꢊꢋ - ⁰ꢋl
ٱ
ױ
Βꢃꢄ  
ꢊꢋ - ⁰ꢋl
ٱ
ױ
ի  
֭
ױ
ꢮꢯ  
130*  
520  
1.25  
A
A
S
I
SM  
V
SD  
V
V
= 0 V, I = 100 A  
V
GS  
SD  
t
= 0 V, V = 75 V, I = 100 A,  
97  
264  
ns  
nC  
rr  
GS  
F
DD  
SD  
dI /dt = 100 A/ms  
Q
֭
ױ
ꢃꢥ  
rr  
4. ꢱꢲꢳꢴnļꢌႆŔ͘५ꢵሇ。  
www.onsemi.cn  
3
 
FDP075N15A, FDB075N15A  
ꢍꢎꢁ்⑙ꢖ  
400  
100  
400  
V
GS  
=15.0 V  
10.0 V  
8.0 V  
7.0 V  
6.5 V  
6.0 V  
5.5 V  
5.0 V  
*Notes:  
1. V = 10 V  
DS  
2. 250 ms Pulse Test  
100  
10  
1
175°C  
25°C  
55°C  
*Notes:  
1. 250 ms Pulse Test  
10  
7
2. T = 25°C  
C
0.1  
1
3
2
3
4
5
6
V
DS  
, DrainSource Voltage (V)  
V
GS  
, GateSource Voltage (V)  
 1. ꢑꢗꢘꢁ  
 2. ꢙᩣ⑙ꢁ  
10  
8
400  
100  
175°C  
V
GS  
= 10 V  
25°C  
10  
1
V
GS  
= 20 V  
6
*Notes:  
1. V = 0 V  
GS  
2. 250 ms Pulse Test  
*Note: T = 25°C  
C
4
0
100  
200  
300  
400  
0.0  
0.5  
1.0  
1.5  
I , Drain Current (A)  
D
V
, Body Diode Forward Voltage (V)  
SD  
 3. ꢑ᫪ꢀℋꢚꢛꢜ⃯ᥡꢀἡ᧥ᥡꢀի  
 4. ijꢕ
ٱ
ױ
իꢚꢛꢜ⁰ᥡꢀἡႆ  
10000  
10  
V
DS  
V
DS  
V
DS  
= 30 V  
= 75 V  
= 120 V  
C
iss  
8
6
4
2
0
1000  
100  
10  
C
oss  
*Notes:  
1. V = 0 V  
GS  
2. f = 1 MHz  
C
C
C
= C + C (C = shorted)  
gs gd ds  
= C + C  
= C  
C
iss  
rss  
oss  
rss  
ds  
gd  
*Note: I = 100 A  
gd  
D
0.1  
1
10  
100 200  
0
30  
60  
90  
V
DS  
, DrainSource Voltage (V)  
Q , Total Gate Charge (nC)  
g
 5. ꢁ  
 6. ᧥ᥡꢀ็  
www.onsemi.cn  
4
FDP075N15A, FDB075N15A  
ꢍꢎꢁ்⑙()  
1.10  
1.05  
1.00  
0.95  
0.90  
3.0  
2.5  
2.0  
1.5  
1.0  
*Notes:  
1. V = 0 V  
*Notes:  
1. V = 10 V  
0.5  
GS  
GS  
2. I = 250 mA  
2. I = 100 A  
D
D
0.0  
100 50  
0
50  
100  
150  
200  
100 50  
0
50  
100  
150  
200  
T , Junction Temperature (°C)  
J
T , Junction Temperature (°C)  
J
 7. ϛՏꢀիꢚꢛꢜႆ  
 8. ꢑ᫪ꢀℋꢚꢛꢜႆ  
140  
120  
100  
80  
1000  
100  
10  
V
GS  
= 10 V  
100 ms  
1 ms  
Limited by package  
10 ms  
100 ms  
Operation in This Area  
60  
is Limited by R  
DS(on)  
1
40  
*Notes:  
DC  
0.1  
0.01  
1. T = 25°C  
C
20  
2. T = 175°C  
J
R
= 0.45°C/W  
q
JC  
3. Single Pulse  
0
25  
50  
75  
100  
125  
150  
175  
0.1  
1
10  
100 300  
V
DS  
, DrainSource Voltage (V)  
T , Case Temperature (°C)  
C
 9. ꢃ൩͈࿅ļꢗ  
 10. ⃯ᥡꢀἡꢜ૶૓ႆ  
7
6
5
4
3
2
1
0
50  
10  
If R = 0  
t
AV  
= (L)(I )/(1.3*Rated BV  
V  
)
AS  
DSS DD  
If R = 0  
= (L/R)In[(I *R)/(1.3*Rated BV V )+1]  
DSS DD  
t
AV  
AS  
Starting T = 25°C  
J
Starting T = 150°C  
J
1
0.01  
0
25  
50  
75  
100  
125  
150  
0.1 10  
T , Time in Avalanche (ms)  
AV  
1
100 500  
V
DS  
, Drain to Source Voltage (V)  
 11. Ϛ(Eoss) ⃯ᥡ -⁰ᥡꢀ  
 12.
٭
ꢞꢔꢏꢟ  
www.onsemi.cn  
5
FDP075N15A, FDB075N15A  
ꢍꢎꢁ்⑙()  
1
0.1  
PDM  
t1  
t2  
0.01  
0.001  
*Notes:  
1. Z (t) = 0.45°C/W Max.  
q
JC  
2. Duty Factor, D= t / t  
1
2
3. T T = P  
* Z (t)  
q
JC  
JM  
C
DM  
105  
104  
103  
102  
101  
1
t , ꢸꢹ௙Βᓡঽꢮꢯ (Ң)  
1
 13. ɼꢠꢂꢡএ  
www.onsemi.cn  
6
FDP075N15A, FDB075N15A  
I
G
= ꢺᲟ  
 14. ᧥ᥡꢀ็Ἣᚥꢀᢿꢢ  
RL  
VDS  
90%  
VDS  
VDD  
VGS  
RG  
10%  
VGS  
DUT  
V
GS  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
 15. ꢁꢔꢏἫᚥꢀᢿꢢ  
V
GS  
 16.
٭
ꢞꢔꢏἫᚥꢀᢿꢢ  
www.onsemi.cn  
7
FDP075N15A, FDB075N15A  
+
DUT  
VDS  
_
ISD  
L
Driver  
RG  
Same Type  
as DUT  
VDD  
VGS  
dv/dt controlled by R  
G
I controlled by pulse period  
SD  
Gate Pulse Width  
Gate Pulse Period  
VGS  
D =  
10 V  
(Driver)  
IFM , Body Diode Forward Current  
ISD  
di/dt  
(DUT)  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
VSD  
VDS  
(DUT)  
VDD  
Body Diode  
Forward Voltage Drop  
 17. ꢕ
ٱ
dv/dt ꢥꢅἫᚥꢀᢿꢢ  
www.onsemi.cn  
8
FDP075N15A, FDB075N15A  
᎕᧧ᚖꢜꢄꢧꢨ  
ꢩꢋꢆ  
⍆᧧  
᎕  
ẵ  
ٱ
 
՗ꢽ  
ꢬꢭꢮ  
ꢼ✈  
330 mm  
ꢯꢰ  
Ჟ  
50 ꢄ  
800 ꢄ  
FDP075N15AF102  
FDB075N15A  
FDP075N15A  
FDB075N15A  
TO220  
ꢼ✈  
24 mm  
2
D PAK  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United  
States and/or other countries.  
www.onsemi.cn  
9
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
TO220  
CASE 221A  
ISSUE AK  
DATE 13 JAN 2022  
SCALE 1:1  
STYLE 1:  
PIN 1. BASE  
2. COLLECTOR  
STYLE 2:  
PIN 1. BASE  
2. EMITTER  
STYLE 3:  
PIN 1. CATHODE  
STYLE 4:  
PIN 1. MAIN TERMINAL 1  
2. ANODE  
3. GATE  
2. MAIN TERMINAL 2  
3. GATE  
3. EMITTER  
3. COLLECTOR  
4. EMITTER  
4. COLLECTOR  
4. ANODE  
4. MAIN TERMINAL 2  
STYLE 5:  
PIN 1. GATE  
STYLE 6:  
PIN 1. ANODE  
STYLE 7:  
STYLE 8:  
PIN 1. CATHODE  
2. ANODE  
PIN 1. CATHODE  
2. ANODE  
2. DRAIN  
3. SOURCE  
4. DRAIN  
2. CATHODE  
3. ANODE  
3. CATHODE  
4. ANODE  
3. EXTERNAL TRIP/DELAY  
4. ANODE  
4. CATHODE  
STYLE 9:  
PIN 1. GATE  
STYLE 10:  
PIN 1. GATE  
STYLE 11:  
STYLE 12:  
PIN 1. DRAIN  
2. SOURCE  
3. GATE  
PIN 1. MAIN TERMINAL 1  
2. MAIN TERMINAL 2  
3. GATE  
2. COLLECTOR  
3. EMITTER  
2. SOURCE  
3. DRAIN  
4. COLLECTOR  
4. SOURCE  
4. SOURCE  
4. NOT CONNECTED  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98ASB42148B  
TO220  
PAGE 1 OF 1  
onsemi and  
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves  
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular  
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation  
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.  
© Semiconductor Components Industries, LLC, 2019  
www.onsemi.com  
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
D2PAK3 (TO263, 3LEAD)  
CASE 418AJ  
ISSUE F  
DATE 11 MAR 2021  
SCALE 1:1  
XXXXXX = Specific Device Code  
A
= Assembly Location  
WL  
Y
= Wafer Lot  
= Year  
GENERIC MARKING DIAGRAMS*  
WW  
W
M
G
AKA  
= Work Week  
= Week Code (SSG)  
= Month Code (SSG)  
= PbFree Package  
= Polarity Indicator  
XX  
AYWW  
XXXXXXXXG  
AKA  
XXXXXXXXG  
AYWW  
XXXXXX  
XXYMW  
XXXXXXXXX  
AWLYWWG  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “ G”,  
may or may not be present. Some products  
may not follow the Generic Marking.  
IC  
Standard  
Rectifier  
SSG  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
98AON56370E  
D2PAK3 (TO263, 3LEAD)  
PAGE 1 OF 1  
DESCRIPTION:  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically  
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the  
rights of others.  
© Semiconductor Components Industries, LLC, 2018  
www.onsemi.com  
onsemi,  
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates  
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