FDP100N10 [ONSEMI]

N 沟道 PowerTrench® MOSFET 100V, 75A, 10mΩ;
FDP100N10
型号: FDP100N10
厂家: ONSEMI    ONSEMI
描述:

N 沟道 PowerTrench® MOSFET 100V, 75A, 10mΩ

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2014 1 月  
FDP100N10  
®
N 沟道 PowerTrench MOSFET  
100 V75 A10 mΩ  
特性  
说明  
N 沟道 MOSFET 采用飞兆半导体先进的 PowerTrench® 工艺  
生产,这一先进工艺是专为最大限度地降低通态电阻并保持卓越  
开关性能而定制的。  
RDS(on) = 8.2 mΩ (Typ.)@VGS = 10 V, ID = 75 A  
快速开关速度  
低栅极电荷  
应用  
高性能沟道技术可实现极低的 RDS(on)  
高功率和高电流处理能力  
符合 RoHS 标准  
用于 ATX/ 服务器 / 通信 PSU 的同步整流  
电池保护电路  
电机驱动和不间断电源  
微型光伏逆变器  
D
G
D
S
G
TO-220  
S
MOSFET 最大额定值 TC =25°C 除非另有说明。  
FDP100N10  
符号  
VDSS  
VGSS  
ID  
参数  
单位  
V
100  
±20  
75  
漏极-源极电压  
栅极-源极电压  
漏极电流  
V
A
- 连续 (TC=75°C)  
- 脉冲  
IDM  
(说明 1)  
300  
A
漏极电流  
EAS  
dv/dt  
365  
mJ  
V/ns  
W
单脉冲雪崩能量  
峰值二极管恢复 dv/dt  
(说明 2)  
(说明 3)  
6
208  
(TC = 25°C)  
PD  
功耗  
- 降额 25°C 以上  
1.4  
W/°C  
°C  
TJ, TSTG  
TL  
-55 +175  
300  
工作和存储温度范围  
用于焊接的最大引脚温度,距离外壳 1/8",持续 5 秒  
°C  
热性能  
FDP100N10  
0.72  
符号  
RθJC  
参数  
结至外壳热阻最大值  
单位  
°C/W  
RθJA  
62.5  
结至环境热阻最大值  
www.fairchildsemi.com  
1
©2007 飞兆半导体公司  
FDP100N10 Rev. C4  
封装标识与定购信息  
器件编号  
FDP100N10  
顶标  
FDP100N10  
封装  
TO-220  
包装方法  
塑料管  
卷尺寸  
不适用  
带宽  
不适用  
数量  
50 个  
电气特性 TC =25°C 除非另有说明。  
符号  
参数  
测试条件  
最小值 典型值 最大值  
单位  
关断特性  
BVDSS  
ID = 250 μA, VGS = 0 V, TJ = 25°C  
D = 250 μA,参考条件是 25°C  
100  
-
-
-
-
V
漏极-源极击穿电压  
击穿电压温度系数  
ΔBVDSS  
/ ΔTJ  
I
0.1  
V/°C  
VDS = 100 V, VGS = 0 V  
-
-
-
-
-
-
1
IDSS  
IGSS  
μA  
零栅极电压漏极电流  
VDS = 100 V, VGS = 0 V, TJ = 150°C  
VGS = ±20 V, VDS = 0 V  
500  
±100  
nA  
栅极 - 体漏电流  
导通特性  
VGS(th)  
RDS(on)  
gFS  
VGS = VDS, ID = 250 μA  
VGS = 10 V, ID = 75 A  
VDS = 10 V, ID = 37.5 A  
2.5  
-
4.5  
10  
-
V
mΩ  
S
栅极阈值电压  
-
-
8.2  
110  
漏极至源极静态导通电阻  
正向跨导  
动态特性  
Ciss  
-
-
-
-
-
5500  
530  
220  
76  
7300  
710  
325  
100  
-
pF  
pF  
pF  
nC  
nC  
输入电容  
VDS = 25 V, VGS = 0 V,  
f = 1 MHz  
Coss  
Crss  
Qg(tot)  
Qgs  
输出电容  
反向传输电容  
10V 的栅极电荷总量  
栅极 - 源极栅极电荷  
VDS = 50 V, ID = 75 A,  
30  
V
GS = 10 V  
Qgd  
-
20  
-
nC  
栅漏极 米勒 电荷  
(说明 4)  
开关特性  
td(on)  
tr  
td(off)  
tf  
-
-
-
-
70  
150  
540  
260  
240  
ns  
ns  
ns  
ns  
导通延迟时间  
开通上升时间  
关断延迟时间  
关断下降时间  
VDD = 50 V, ID = 75 A,  
GS = 10 V, RG = 25 Ω  
265  
125  
115  
V
(说明 4)  
漏源极二极管特性  
IS  
-
-
-
-
-
-
-
75  
300  
1.25  
-
A
A
漏源极二极管最大正向连续电流  
漏源极二极管最大正向脉冲电流  
漏源极二极管正向电压  
反向恢复时间  
ISM  
VSD  
trr  
VGS = 0 V, ISD = 75 A  
-
V
71  
164  
ns  
nC  
VGS = 0 V, ISD = 75 A,  
dIF/dt = 100 A/μs  
Qrr  
注意:  
-
反向恢复电荷  
1: 重复额定值:脉冲宽度受限于最大结温。  
2: L = 0.13 mHI = 75 AV = 25 V, R = 25 Ω,启动 = 25°C。  
AS  
DD  
G
3:  
I
75 Adi/dt 200 A/μsV BV  
,开始 T =25°C。  
DSS J  
SD  
DD  
4: 本质上独立于工作温度的典型特性。  
www.fairchildsemi.com  
©2007 飞兆半导体公司  
FDP100N10 Rev. C4  
2
典型性能特征  
1. 导通区域特性  
2. 传输特性  
1000  
500  
VGS = 15.0 V  
10.0 V  
8.0 V  
7.0 V  
6.5 V  
6.0 V  
5.5 V  
100  
10  
1
100  
150oC  
-55oC  
25oC  
10  
5
*Notes:  
1. 250μs Pulse Test  
2. TC = 25oC  
*Notes:  
1. VDS = 20V  
2. 250μs Pulse Test  
2
4
6
8
10  
12  
0.1  
1
5
VGS,Gate-Source Voltage[V]  
VDS,Drain-Source Voltage[V]  
3. 导通电阻变量与漏极电流和栅极电压的关系  
4. 体二极管正向电压变量与源电流的关系和  
温度  
1000  
0.020  
0.015  
100  
10  
1
150oC  
VGS = 10V  
0.010  
25oC  
VGS = 20V  
0.005  
*Notes:  
1. VGS = 0V  
*Note: TJ = 25oC  
2. 250μs Pulse Test  
0.000  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
0
50  
100 150 200 250 300 350  
ID, Drain Current [A]  
VSD, Body Diode Forward Voltage [V]  
5. 电容特性  
8000  
6. 栅极电荷特性  
10  
C
C
C
= C + C (C = shorted)  
gs gd ds  
iss  
VDS = 80V  
= C + C  
ds gd  
oss  
rss  
VDS = 50V  
= C  
gd  
VDS = 25V  
8
6000  
4000  
2000  
0
Ciss  
*Note:  
1. VGS = 0V  
2. f = 1MHz  
6
4
2
0
Coss  
Crss  
*Note: ID = 75A  
60 75  
0.1  
1
10  
30  
0
15  
30  
45  
90  
VDS, Drain-Source Voltage [V]  
Qg, Total Gate Charge [nC]  
www.fairchildsemi.com  
©2007 飞兆半导体公司  
FDP100N10 Rev. C4  
3
典型性能特征 (接上页)  
7. 击穿电压变量与温度的关系  
8. 导通电阻变量与温度的关系  
3.0  
1.2  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1.1  
1.0  
0.9  
*Notes:  
1. VGS = 0V  
*Notes:  
1. VGS = 10V  
2. ID = 250μA  
2. ID = 75A  
0.8  
-100  
-100  
-50  
0
50  
100  
150  
200  
-50  
0
50  
100  
150  
200  
o
o
TJ, Junction Temperature [ C]  
TJ, Junction Temperature [ C]  
9. 最大安全工作区  
10. 最大漏极电流与壳体温度的关系  
100  
500  
100  
80  
60  
40  
20  
0
100 μs  
10  
THIS AREA IS  
LIMITED BY r  
DS(on)  
SINGLE PULSE  
1
1 ms  
TJ = MAX RATED  
RθJc = 0.72 oC/W  
Tc = 25 oC  
10 ms  
100 ms  
DC  
0.1  
0.1  
25  
50  
75  
100  
125  
150  
175  
1
10  
100  
400  
o
TC, Case Temperature [ C]  
VDS, DRAIN to SOURCE VOLTAGE (V)  
11. 瞬态热响应曲线  
1
0.5  
0.2  
0.1  
0.1  
0.05  
PDM  
0.02  
t1  
t2  
0.01  
0.01  
*Notes:  
Single pulse  
1. ZθJC(t) = 0.72oC/W Max.  
2. Duty Factor, D=t1/t2  
3. TJM - TC = PDM * ZθJC(t)  
1E-3  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
t
形脉冲时间 [ ]  
1
www.fairchildsemi.com  
©2007 飞兆半导体公司  
FDP100N10 Rev. C4  
4
I = 恒流  
G
12. 栅极电荷测试电路与波形  
RL  
VDS  
90%  
VDS  
VDD  
VGS  
RG  
10%  
VGS  
DUT  
V
GS  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
13. 阻性开关测试电路与波形  
VGS  
14. 非箝位感性开关测试电路与波形  
www.fairchildsemi.com  
©2007 飞兆半导体公司  
FDP100N10 Rev. C4  
5
+
DUT  
VDS  
_
I SD  
L
Driver  
RG  
Same Type  
as DUT  
VDD  
VGS  
• dv/dt controlled by RG  
• ISD controlled by pulse period  
Gate Pulse Width  
--------------------------  
VGS  
D =  
Gate Pulse Period  
10V  
( Driver )  
IFM , Body Diode Forward Current  
I SD  
di/dt  
( DUT )  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
VSD  
VDS  
( DUT )  
VDD  
Body Diode  
Forward Voltage Drop  
15. 峰值二极管恢复 dv/dt 测试电路与波形  
www.fairchildsemi.com  
©2007 飞兆半导体公司  
FDP100N10 Rev. C4  
6
机械尺寸  
SUPPLIER "B" PACKAGE  
SHAPE  
Ø4.00  
3.50  
10.67  
9.65  
SUPPLIER "A" PACKAGE  
SHAPE  
E
3.40  
2.50  
16.30  
13.90  
IF PRESENT, SEE NOTE "D"  
E
16.51  
15.42  
9.40  
8.13  
E
1
2
3
4.10  
2.70  
[2.46]  
C
14.04  
12.70  
2.13  
2.06  
FRONT VIEWS  
H
4.70  
4.00  
1.62  
1.42  
1.62  
1.10  
2.67  
2.40  
"A1"  
8.65  
7.59  
1.00  
0.55  
SEE NOTE "F"  
5°  
3°  
5°  
3°  
6.69  
6.06  
OPTIONAL  
CHAMFER  
E
14.30  
11.50  
NOTE "I"  
BOTTOM VIEW  
NOTES:  
A) REFERENCE JEDEC, TO-220, VARIATIONAB  
B) ALL DIMENSIONS AREINMILLIMETERS.  
C) DIMENSIONS COMMONTOALL PACKAGE  
SUPPLIERS EXCEPT WHERE NOTED [ ].  
D) LOCATIONOF MOLDEDFEATUREMAYVARY  
(LOWERLEFT CORNER, LOWERCENTER  
ANDCENTEROF THE PACKAGE)  
3
2
1
E DOES NOT COMPLY JEDEC STANDARD VALUE.  
F) "A1" DIMENSIONSASBELOW:  
SINGLE GAUGE = 0.51 - 0.61  
DUAL GAUGE = 1.10 - 1.45  
G) DRAWING FILE NAME: TO220B03REV8  
H) PRESENCE IS SUPPLIER DEPENDENT  
I) SUPPLIERDEPENDENT MOLDLOCKINGHOLES  
INHEATSINK.  
J) FAIRCHILD SEMICONDUCTOR  
0.60  
0.36  
2.85  
2.10  
BACK VIEW  
SIDE VIEW  
16. TO-220,模塑, 3 引脚, Jedec 变量 AB  
封装图纸作为一项服务,提供给考虑飞兆半导体元件的客户。具体参数可能会有变化,且不会做出相应通知。请注意图纸上的版本和 /  
或日期,并联系飞兆半导体代表核实或获得最新版本。封装规格并不超出飞兆公司全球范围内的条款与条件,尤其指保修,保修涵盖飞  
兆半导体的全部产品。  
随时访问飞兆半导体在线封装网页,可以获取最新的封装图纸:  
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT220-003  
www.fairchildsemi.com  
©2007 飞兆半导体公司  
FDP100N10 Rev. C4  
7
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©2007 飞兆半导体公司  
FDP100N10 Rev. C4  
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