L4949DR2G [ONSEMI]
100 mA, 5.0 V, Low Dropout Voltage Regulator with Power−On Reset; 百毫安， 5.0 V ，低压差稳压器具有上电复位
| 型号： | L4949DR2G |
| 厂家： | 
ONSEMI |
| 描述： | 100 mA, 5.0 V, Low Dropout Voltage Regulator with Power−On Reset |
| 文件： | 总10页 (文件大小：117K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
L4949, NCV4949
100 mA, 5.0 V, Low Dropout
Voltage Regulator with
Power−On Reset
The L4949 is a monolithic integrated 5.0 V voltage regulator with a
very low dropout and additional functions such as power−on reset and
input voltage sense.
It is designed for supplying the micro−computer controlled systems
especially in automotive applications.
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MARKING DIAGRAMS
Features
8
8
• Operating DC Supply Voltage Range 5.0 V to 28 V
• Transient Supply Voltage Up to 40 V
L4949N
AWL
YYWWG
1
PDIP−8
N SUFFIX
CASE 626
• Extremely Low Quiescent Current in Standby Mode
• High Precision Standby Output Voltage 5.0 V 1%
• Output Current Capability Up to 100 mA
1
8
1
• Very Low Dropout Voltage Less Than 0.4 V
• Reset Circuit Sensing The Output Voltage
8
L4949
ALYWD
G
1
• Programmable Reset Pulse Delay With External Capacitor
SOIC−8
D SUFFIX
CASE 751
• Voltage Sense Comparator
• Thermal Shutdown and Short Circuit Protections
• NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
20
• Pb−Free Packages are Available
20
L4949DW
AWLYYWWG
1
Output
Voltage (V
8
SOIC−20W
DW SUFFIX
CASE 751D
)
out
V
3
C
T
4
Z
1
Supply
)
Voltage (V
CC
Preregulator
6.0 V
A
= Assembly Location
= Year
WL, L = Wafer Lot
YY, Y
1
WW, W = Work Week
G or G = Pb−Free Device
2.0 mA
Reset
6
+
−
PIN CONNECTIONS
2.0 V
Regulator
Sense
Output
(S )
o
Reset
V
s
Sense
Input
(S )
i
VCC
Si
V
S
1
8
7
6
5
out
7
2
3
4
o
2
+
−
V
Reset
GND
Z
1.23 V
1.23 V
ref
Sense
C
T
5
GND
(Top View)
Figure 1. Representative Block Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
June, 2006 − Rev. 9
L4949/D
L4949, NCV4949
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
28
Unit
V
DC Operating Supply Voltage
Transient Supply Voltage (t < 1.0 s)
Output Current
V
CC
V
40
V
CC TR
I
Internally
Limited
−
out
Output Voltage
V
20
V
mA
−
out
Sense Input Current
Sense Input Voltage
I
1.0
SI
V
V
CC
SI
Output Voltages
Reset Output
Sense Output
V
V
V
20
20
Reset
SO
Output Currents
Reset Output
Sense Output
mA
I
5.0
5.0
Reset
I
SO
Preregulator Output Voltage
Preregulator Output Current
V
7.0
5.0
V
mA
V
Z
I
Z
ESD Protection at any pin
Human Body Model
Machine Model
−
−
2000
400
Thermal Resistance, Junction−to−Air
R
q
JA
°C/W
P Suffix, DIP−8 Plastic Package, Case 626
D Suffix, SOIC−8 Plastic Package, Case 751
D Suffix, SOIC−20 Plastic Package, Case 751D
100
200
80
Operating Junction Temperature Range
Storage Temperature Range
T
−40 to +150
−65 to +150
°C
°C
J
T
stg
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
ELECTRICAL CHARACTERISTICS (V = 14 V, −40°C < T < 125°C, unless otherwise specified.)
CC
A
Characteristic
Symbol
Min
4.95
4.9
Typ
5.0
5.0
5.0
Max
5.05
5.1
Unit
V
Output Voltage (T = 25°C, I = 1.0 mA)
V
out
A
out
Output Voltage (6.0 V < V < 28 V, 1.0 mA < I < 50 mA)
V
out
V
CC
out
Output Voltage (V = 35 V, t < 1.0 s, 1.0 mA < I < 50 mA)
V
out
4.9
5.1
V
CC
out
Dropout Voltage
V
V
drop
I
I
I
= 10 mA
= 50 mA
= 100 mA
−
−
−
0.1
0.2
0.3
0.25
0.40
0.50
out
out
out
Input to Output Voltage Difference in Undervoltage Condition
(V = 4.0 V, I = 35 mA)
V
−
0.2
0.4
V
IO
CC
out
Line Regulation (6.0 V < V < 28 V, I = 1.0 mA)
Reg
−
−
1.0
8.0
20
30
mV
mV
mA
CC
out
line
Load Regulation (1.0 mA < I < 100 mA)
Reg
load
out
Current Limit
I
Lim
V
= 4.5 V
= 0 V
105
−
200
100
400
−
out
V
out
Quiescent Current (I = 0.3 mA, T < 100°C)
I
QSE
−
−
150
−
260
5.0
mA
out
A
Quiescent Current (I = 100 mA)
I
mA
out
Q
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2
L4949, NCV4949
ELECTRICAL CHARACTERISTICS (continued) (V = 14 V, −40°C < T < 125°C, unless otherwise specified.)
CC
A
Characteristic
Symbol
Min
Typ
Max
Unit
RESET
Reset Threshold Voltage
V
−
V
out
− 0.5
−
V
Resth
Reset Threshold Hysteresis
V
mV
Resth,hys
@ T = 25°C
50
50
100
−
200
300
A
@ T = −40 to +125°C
A
Reset Pulse Delay (C = 100 nF, t ≥ 100 ms)
t
55
−
100
5.0
−
180
30
0.4
1.0
−
ms
ms
V
T
R
ResD
Reset Reaction Time (C = 100 nF)
t
ResR
T
Reset Output Low Voltage (R
= 10 kW to V , V ≥ 3.0 V)
V
−
Reset
out
CC
ResL
ResH
Reset Output High Leakage Current (V
Delay Comparator Threshold
= 5.0 V)
I
−
−
mA
V
Reset
V
−
2.0
100
CTth
Delay Comparator Threshold Hysteresis
V
V
−
−
mV
CTth, hys
SENSE
Sense Low Threshold (V Decreasing = 1.5 V to 1.0 V)
V
1.16
20
1.23
100
−
1.35
200
0.4
V
mV
V
SI
SOth
Sense Threshold Hysteresis
SOth,hys
Sense Output Low Voltage (V ≤ 1.16 V, V ≥ 3.0 V, R = 10 kW to V
)
out
V
−
SI
CC
SO
SOL
Sense Output Leakage (V = 5.0 V, V ≥ 1.5 V)
I
−
−
1.0
mA
mA
SO
SI
SOH
Sense Input Current
I
−1.0
0.1
1.0
SI
PREREGULATOR
Preregulator Output Voltage (I = 10 mA)
V
−
6.3
−
V
Z
Z
PIN FUNCTION DESCRIPTION
Pin
Pin
Symbol
Description
SOIC−8, PDIP−8
SOIC−20W
1
2
3
4
5
6
7
8
−
19
V
Supply Voltage
CC
20
S
Input of Sense Comparator
Output of Preregulator
Reset Delay Capacitor
Ground
i
1
V
Z
2
C
T
4 − 7, 14 − 17
GND
10
Reset
Output of Reset Comparator
Output of Sense Comparator
Main Regulator Output
No Connect
11
12
S
O
V
out
3, 8, 9, 13, 18
NC
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3
L4949, NCV4949
TYPICAL CHARACTERIZATION CURVES
5.04
5.02
5.0
6.0
T = 25°C
V
= 14 V
= 1.0 mA
J
CC
I
5.0
4.0
out
R = 5.0 k
L
3.0
2.0
1.0
0
R = 100 W
L
4.98
4.96
−40 −20
0
20
40
60
80
100
120
0
1.0 2.0 3.0 4.0 5.0 6.0 7.0
, SUPPLY VOLTAGE (V)
8.0 9.0 10
T , JUNCTION TEMPERATURE (°C)
J
V
CC
Figure 3. Output Voltage versus
Supply Voltage
Figure 2. Output Voltage versus
Junction Temperature
250
0.40
T = 25°C
J
I
= 100 mA
out
200
0.30
0.20
0.10
0
150
100
I
I
= 50 mA
= 10 mA
out
out
50
0
0.1
1.0
10
100
−40
−20
0
20
40
60
80
100
120
I , OUTPUT CURRENT (mA)
out
T , JUNCTION TEMPERATURE (°C)
J
Figure 4. Dropout Voltage versus
Output Current
Figure 5. Dropout Voltage versus
Junction Temperature
3.0
2.5
2.0
1.5
1.0
0.5
0
3.0
V
= 14 V
CC
T = 25°C
2.5
2.0
1.5
1.0
0.5
J
T = 25°C
J
R = 100 W
L
R = 5.0 k
L
0
0.1
1.0
10
100
0
5.0
10
15
20
25
30
I , OUTPUT CURRENT (mA)
out
V , SUPPLY VOLTAGE (V)
CC
Figure 6. Quiescent Current versus
Output Current
Figure 7. Quiescent Current versus
Supply Voltage
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4
L4949, NCV4949
TYPICAL CHARACTERIZATION CURVES (continued)
6.0
4.7
T = 25°C
J
4.66
Upper Threshold
4.62
5.0
4.0
3.0
2.0
1.0
Resistor 10 k
from Reset Output
to 5.0 V
4.58
4.54
4.5
Lower Threshold
4.46
4.42
0
4.0 4.1 4.2 4.3
4.4 4.5 4.6 4.7 4.8
, OUTPUT VOLTAGE (V)
4.9 5.0
−40
−20
0
20
40
60
80
100
120
V
out
T , JUNCTION TEMPERATURE (°C)
J
Figure 9. Reset Thresholds versus
Junction Temperature
Figure 8. Reset Output versus
Regulator Output Voltage
6.0
5.0
4.0
3.0
2.0
1.0
0
1.4
1.38
1.36
1.34
1.32
1.3
T = 25°C
J
Upper Threshold
Lower Threshold
Resistor 10 k
from Sense Output
to 5.0 V
1.28
1.26
1.24
1.22
1.2
1.0 1.05 1.1 1.15 1.2 1.25 1.3 1.35 1.4 1.45 1.5
−40
−20
0
20
40
60
80
100
120
V , SENSE INPUT VOLTAGE (V)
SI
T , JUNCTION TEMPERATURE (°C)
J
Figure 10. Sense Output versus
Sense Input Voltage
Figure 11. Sense Thresholds versus
Junction Temperature
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5
L4949, NCV4949
APPLICATION INFORMATION
Supply Voltage Transient
less than 8.0 V supply transients of more than 0.4 V/ms can
cause a reset signal perturbation. To improve the transient
behavior for supply voltages less than 8.0 V a capacitor at
Pin 3 can be used. A capacitor at Pin 3 (C3 ≤ 1.0 mF) reduces
also the output noise.
High supply voltage transients can cause a reset output
signal perturbation. For supply voltages greater than 8.0 V
the circuit shows a high immunity of the reset output against
supply transients of more than 100 V/ms. For supply voltages
V
out
C
C3
O
V
(optional)
Z
3
8
C
4
T
V
V
bat
CC
Preregulator
6.0 V
1
Cs
2.0 mA
Reset
6
10 kW
10 kW
+
−
V
out
2.0 V
Regulator
Reset
R
V
SO
CC
So
S
i
7
2
+
−
1.23 V
1.23 V
ref
Sense
5
NOTE: 1. For stability: C ≥ 1.0 mF, C ≥ 4.7 mF, ESR < 10 W at 10 kHz
GND
s
O
2. Recommended for application: C = C = 10 mF
s
O
Figure 12. Application Schematic
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6
L4949, NCV4949
OPERATING DESCRIPTION
V
out
The L4949 is a monolithic integrated low dropout voltage
regulator. Several outstanding features and auxiliary
functions are implemented to meet the requirements of
supplying microprocessor systems in automotive
applications. Nevertheless, it is suitable also in other
applications where the present functions are required. The
modular approach of this device allows the use of other
features and functions independently when required.
V
out
5.0 V
Voltage Regulator
The voltage regulator uses an isolated Collector Vertical
PNP transistor as a regulating element. With this structure,
very low dropout voltage at currents up to 100 mA is
obtained. The dropout operation of the standby regulator is
maintained down to 3.0 V input supply voltage. The output
voltage is regulated up to the transient input supply voltage
of 35 V. With this feature no functional interruption due to
overvoltage pulses is generated.
The typical curve showing the standby output voltage as
a function of the input supply voltage is shown in Figure 14.
The current consumption of the device (quiescent current)
is less than 200 mA.
0 V
2.0 V
5.0 V
35 V
V
CC
Figure 14. Output Voltage versus Supply Voltage
3.0
2.5
T = 25°C
J
2.0
1.5
1.0
0.5
To reduce the quiescent current peak in the undervoltage
region and to improve the transient response in this region,
the dropout voltage is controlled. The quiescent current as
a function of the supply input voltage is shown in Figure 15.
R = 100 W
L
R = 5.0 k
L
Short Circuit Protection:
The maximum output current is internally limited. In case
of short circuit, the output current is foldback current limited
as described in Figure 13.
0
0
5.0
10
15
20
25
30
V
, SUPPLY VOLTAGE (V)
CC
Figure 15. Quiescent Current versus Supply Voltage
10
Preregulator
To improve the transient immunity a preregulator
stabilizes the internal supply voltage to 6.0 V. This internal
voltage is present at Pin 3 (V ). This voltage should not be
Z
used as an output because the output capability is very small
(≤ 100 mA).
5.0
This output may be used as an option when better transient
behavior for supply voltages less than 8.0 V is required. In
this case a capacitor (100 nF − 1.0 mF) must be connected
between Pin 3 and GND. If this feature is not used Pin 3 must
be left open.
0
20
100
200
I
(mA)
out
Figure 13. Foldback Characteristic of Vout
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7
L4949, NCV4949
Reset Circuit
Standby output voltage drops below the reset threshold
only a bit longer than the reaction time results in a shorter
reset delay time.
The block circuit diagram of the reset circuit is shown in
Figure 16.
The reset circuit supervises the output voltage. The reset
threshold of 4.5 V is defined with the internal reference
voltage and standby output divider.
The nominal reset delay time will be generated for
standby output voltage drops longer than approximately
50 ms. The typical reset output waveforms are shown in
Figure 17.
The reset pulse delay time t , is defined with the charge
RD
time of an external capacitor C :
T
40 V
V
out
V
in
C
x 2.0 V
T
t
+
RD
2.0 mA
V
out1
5.0 V
VRT + 0.1 V
UKT
The reaction time of the reset circuit originates from the
discharge time limitation of the reset capacitor C and is
T
3.0 V
t
proportional to the value of C . The reaction time of the reset
T
t
R
circuit increases the noise immunity.
Reset
1.23 V V
ref
t
t
RD
RD
t
RR
2.0 mA
22 k
Reset
Output
Overload
Switch On
Input Drop
Dump
Switch Off
C
Out
T
Figure 17. Typical Reset Output Waveforms
+
Sense Comparator
2.0 V
−
The sense comparator compares an input signal with an
internal voltage reference of typical 1.23 V. The use of an
external voltage divider makes this comparator very flexible
in the application.
Reg
It can be used to supervise the input voltage either before
or after the protection diode and to give additional
information to the microprocessor like low voltage warnings.
Figure 16. Reset Circuit
ORDERING INFORMATION
†
Device
Operating Temperature Range
Package
Shipping
L4949N
PDIP−8
50 Units / Rail
50 Units / Rail
L4949NG
PDIP−8
(Pb−Free)
L4949D
SOIC−8
98 Units / Rail
98 Units / Rail
L4949DG
SOIC−8
(Pb−Free)
L4949DR2
SOIC−8
2500 Units / Tape & Reel
2500 Units / Tape & Reel
L4949DR2G
SOIC−8
(Pb−Free)
T = −40°C to +125°C
J
NCV4949DG*
SOIC−8
98 Units / Rail
(Pb−Free)
NCV4949DR2*
SOIC−8
2500 Units / Tape & Reel
2500 Units / Tape & Reel
NCV4949DR2G*
SOIC−8
(Pb−Free)
NCV4949DWR2*
SOIC−20W
1000 Units / Tape & Reel
1000 Units / Tape & Reel
NCV4949DWR2G*
SOIC−20W
(Pb−Free)
†For information on tape and reel specifications,including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV4949: T = −40°C, T
= +125°C. Guaranteed by design.
low
high
NCV prefix is for automotive and other applications requiring site and change control.
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8
L4949, NCV4949
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 626−05
ISSUE L
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
8
5
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−B−
MILLIMETERS
INCHES
MIN
1
4
DIM MIN
MAX
10.16
6.60
4.45
0.51
1.78
MAX
0.400
0.260
0.175
0.020
0.070
A
B
C
D
F
9.40
6.10
3.94
0.38
1.02
0.370
0.240
0.155
0.015
0.040
F
−A−
NOTE 2
L
G
H
J
2.54 BSC
0.100 BSC
0.76
0.20
2.92
1.27
0.30
3.43
0.030
0.008
0.115
0.050
0.012
0.135
K
L
C
7.62 BSC
0.300 BSC
M
N
−−−
0.76
10
_
1.01
−−−
0.030
10
0.040
_
J
−T−
SEATING
PLANE
N
M
D
K
G
H
M
M
M
B
0.13 (0.005)
T A
SOIC−20 WB
DW SUFFIX
CASE 751D−05
ISSUE G
D
A
q
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
20
11
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
E
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
1
10
MILLIMETERS
B
DIM MIN
MAX
2.65
0.25
0.49
0.32
12.95
7.60
20X B
A
A1
B
C
D
E
2.35
0.10
0.35
0.23
12.65
7.40
M
S
S
B
0.25
T A
A
e
1.27 BSC
H
h
10.05
0.25
0.50
0
10.55
0.75
0.90
7
SEATING
PLANE
L
18X e
q
_
_
A1
C
T
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9
L4949, NCV4949
PACKAGE DIMENSIONS
SOIC−8
D SUFFIX
CASE 751−07
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−X−
A
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
8
5
4
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
S
M
M
B
0.25 (0.010)
Y
1
K
−Y−
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN
MAX
0.197
0.157
0.069
0.020
A
B
C
D
G
H
J
K
M
N
S
4.80
3.80
1.35
0.33
5.00 0.189
4.00 0.150
1.75 0.053
0.51 0.013
C
N X 45
_
SEATING
PLANE
−Z−
1.27 BSC
0.050 BSC
0.10 (0.004)
0.10
0.19
0.40
0
0.25 0.004
0.25 0.007
1.27 0.016
0.010
0.010
0.050
8
0.020
0.244
M
J
H
D
8
0
_
_
_
_
0.25
5.80
0.50 0.010
6.20 0.228
M
S
S
X
0.25 (0.010)
Z
Y
SOLDERING FOOTPRINT*
1.52
0.060
7.0
4.0
0.275
0.155
0.6
0.024
1.270
0.050
mm
inches
ǒ
Ǔ
SCALE 6:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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