MM74HC126MTCX [ONSEMI]
3 态四路缓冲器;
| 型号： | MM74HC126MTCX |
| 厂家： | 
ONSEMI |
| 描述： | 3 态四路缓冲器 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总11页 (文件大小：341K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
3-STATE Quad Buffers
14
SOIC−14
1
MM74HC125, MM74HC126
CASE 751A−03
General Description
14
The MM74HC125 and MM74HC126 are general purpose 3−STATE
high speed non−inverting buffers utilizing advanced silicon−gate
CMOS technology. They have high drive current outputs which enable
high speed operation even when driving large bus capacitances.
These circuits possess the low power dissipation of CMOS circuitry,
yet have speeds comparable to low power Schottky TTL circuits. Both
circuits are capable of driving up to 15 low power Schottky inputs.
The MM74HC125 require the 3−STATE control input C to be taken
high to put the output into the high impedance condition, whereas
the MM74HC126 require the control input to be low to put the output
into high impedance.
1
SOIC−14
CASE 751EF
14
1
TSSOP−14 WB
CASE 948G
All inputs are protected from damage due to static discharge by
diodes to VCC and ground.
MARKING DIAGRAM
Features
• Typical Propagation Delay: 13 ns
14
• Wide Operating Voltage Range: 2 V – 6 V
• Low Input Current: 1 mA Maximum
• Low Quiescent Current: 160 mA maximum (74HC Series)
• Fanout of 15 LS−TTL Loads
HC12XA
AWLYWW
1
SOIC−14
• These Devices are Pb−Free, Halide Free and are RoHS Compliant
14
HC
12XA
ALYW
1
TSSOP−14 WB
HC12XA= Specific Device Code
(X = 5 or 6)
A
= Assembly Location
WL, L = Wafer Lot
= Year
Y
WW, W = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 1983
1
Publication Order Number:
November, 2022 − Rev. 2
MM74HC126/D
MM74HC125, MM74HC126
Connection Diagram
V
C4
13
A4
12
Y4
11
C3
10
A3
Y3
V
C4
13
A4
12
Y4
11
C3
10
A3
Y3
CC
CC
14
9
8
14
9
8
1
2
3
4
5
6
7
1
2
3
4
5
6
7
C1
A1
Y1
C2
Y2
GND
C1
A1
Y1
C2
Y2
GND
A2
A2
Top View (MM74HC125)
Top View (MM74HC126)
Figure 1. Pin Assignments for SOIC and TSSOP
TRUTH TABLE (MM74HC125) TRUTH TABLE (MM74HC126)
Inputs
Output
Inputs
Output
A
H
L
C
L
Y
H
L
A
H
L
C
H
H
L
Y
H
L
L
X
H
Z
X
Z
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2
MM74HC125, MM74HC126
ABSOLUTE MAXIMUM RATINGS (Note 1)
Symbol
Parameter
Rating
V
CC
Supply Voltage
–0.5 to +7.0 V
V
IN
DC Input Voltage
–0.5 to V + 0.5 V
CC
V
DC Output Voltage
Clamp Diode Current
DC Output Current, per Pin
–0.5 to V + 0.5 V
OUT
CC
I , I
IK OK
20 mA
35 mA
I
OUT
I
DC V or GND Current, per Pin
70 mA
CC
CC
T
Storage Temperature Range
Power Dissipation
–65°C to +150°C
600 mW
STG
P
Note 2
D
S.O. Package Only
500 mW
T
L
Lead Temperature (Soldering 10 Seconds)
260°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Unless otherwise specified all voltages are referenced to ground.
2. Power Dissipation temperature derating − plastic “N” package: –12 mW/°C from 65°C to 85°C.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2
Max
Unit
V
V
CC
Supply Voltage
6
V
, V
DC Input or Output Voltage
Operating Temperature Range
Input Rise or Fall Time
0
V
V
IN OUT
CC
T
A
–55
−
+125
1000
500
°C
ns
ns
ns
t , t
r
V
CC
V
CC
V
CC
= 2.0 V
= 4.5 V
= 6.0 V
f
−
−
400
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
www.onsemi.com
3
MM74HC125, MM74HC126
DC CHARACTERISTICS (Note 3)
T
= −40°C
T = −55°C
A
A
to 85°C
to 125°C
T
A
= 25°C
Typ
−
Guaranteed Limits
Symbol
Parameter
Conditions
V
CC
(V)
Unit
V
IH
Minimum HIGH Level Input
Voltage
2.0
1.5
1.5
3.15
4.2
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.7
V
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
−
3.15
4.2
−
V
IL
Maximum LOW Level Input
Voltage
−
0.5
0.5
V
V
−
1.35
1.8
1.35
1.8
−
V
OH
Minimum HIGH Level Output
Voltage
V
|I
= V or V ,
2.0
4.5
6.0
4.2
1.9
1.9
IN
IH
IL
| ≤ 20 mA
OUT
4.4
4.4
5.9
5.9
V
IN
= V or V ,
3.98
3.84
IH
IL
|I
| ≤ 6.0 mA
OUT
V
OUT
= V or V ,
6.0
5.7
5.48
5.34
5.2
IN
IH
IL
|I
| ≤ 7.8 mA
V
OL
Maximum LOW Level Output
Voltage
V
|I
= V or V ,
OUT
2.0
4.5
6.0
4.5
0
0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.4
V
IN
IH
IL
| ≤ 20 mA
0
0.1
0.1
V
= V or V ,
0.2
0.26
0.33
IN
IH
IL
|I
| ≤ 6.0 mA
OUT
V
OUT
= V or V ,
6.0
6.0
0.2
0.26
0.5
0.33
5
0.4
10
IN
IH
IL
|I
| ≤ 7.8 mA
I
Maximum 3−STATE Output
Leakage Current
V
V
= V or V ,
−
mA
OZ
IN
OUT
IH
IL
= V or GND
CC
C = Disabled
n
I
Maximum Input Current
V
V
= V or GND
6.0
6.0
−
−
0.1
8.0
1.0
80
1.0
mA
mA
IN
IN
CC
I
Maximum Quiescent Supply
Current
= V or GND,
160
CC
IN
CC
I
= 0 mA
OUT
3. For a power supply of 5 V 10% the worst case output voltages (V , and V ) occur for HC at 4.5 V. Thus the 4.5 V values should be used
OH
OL
when designing with this supply. Worst case V and V occur at V = 5.5 V and 4.5 V respectively. (The V value at 5.5 V is 3.85 V.) The
IH
IL
CC
IH
worst case leakage current (I , I , and I ) occur for CMOS at the higher voltage and so the 6.0 V values should be used.
IN CC
OZ
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4
MM74HC125, MM74HC126
AC CHARACTERISTICS (V = 5 V, T = 25°C, C = 45 pF, t = t = 6 ns)
CC
A
L
r
f
Guaranteed
Limit
Symbol
, t
Parameter
Conditions
Typ
13
13
17
18
13
Unit
ns
t
Maximum Propagation Delay Time
18
25
25
25
25
PHL PLH
t
t
Maximum Output Enable Time to HIGH Level
Maximum Output Disable Time from HIGH Level
Maximum Output Enable Time to LOW Level
Maximum Output Disable Time from LOW Level
R = 1 kW
ns
PZH
PHZ
L
R = 1 kW, C = 5 pF
ns
L
L
t
t
R = 1 kW
ns
PZL
L
R = 1 kW, C = 5 pF
ns
PLZ
L
L
AC CHARACTERISTICS (V = 2.0 V to 6.0 V, C = 50 pF, t = t = 6 ns (unless otherwise specified))
CC
L
r
f
T
= −40°C
T = −55°C
A
A
to 85°C
to 125°C
T
A
= 25°C
Typ
40
14
12
35
14
12
25
14
12
25
14
12
35
15
13
30
7
Guaranteed Limits
Symbol
, t
Parameter
V
CC
(V)
Conditions
Unit
t
t
Maximum Propagation Delay Time
2.0
100
125
25
21
163
33
28
156
31
26
156
31
26
175
35
30
75
15
13
10
20
−
150
30
25
195
39
39
188
38
31
188
38
31
210
42
36
90
18
15
10
20
−
ns
PHL PLH
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
20
17
130
26
22
125
25
21
125
25
21
140
28
24
60
12
10
10
20
−
, t
Maximum Propagation Delay Time
Maximum Output Enable Time
Maximum Output Disable Time
Maximum Output Enable Time
Maximum Output Rise and Fall Time
C = 150 pF,
ns
ns
ns
ns
ns
PLH PHL
L
t
t
t
, t
R = 1 kW
L
PZH PZL
, t
R = 1 kW
L
PHZ PLZ
, t
C = 150 pF,
L
R = 1 kW
PZL PZH
L
t
, t
C = 50 pF
TLH THL
L
6
C
IN
Input Capacitance
5
pF
pF
pF
C
OUT
Output Capacitance Outputs
15
45
6
C
PD
Power Dissipation Capacitance
(per gate) (Note 4)
Enabled
Disabled
−
−
−
2
4. C determines the no load dynamic power consumption, P = C
V
f + I
V
, and the no load dynamic current consumption,
PD
D
PD CC
CC CC
I
= C
V
f + I
.
S
PD CC
CC
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5
MM74HC125, MM74HC126
ORDERING INFORMATION
Part Number
†
Package
Shipping
MM74HC125M
SOIC−14, Case 751A−03
(Pb−Free, Halide Free)
55 Units / Tube
2500 / Tape & Reel
96 Units / Tube
MM74HC125MX
MM74HC125MTC
MM74HC125MTCX
MM74HC126M
SOIC−14, Case 751A−03
(Pb−Free, Halide Free)
TSSOP−14, Case 948G−01
(Pb−Free, Halide Free)
TSSOP−14 WB, Case 948G−01
(Pb−Free, Halide Free)
2500 / Tape & Reel
55 Units / Tube
SOIC−14, Case 751A−03
(Pb−Free, Halide Free)
MM74HC126MX
MM74HC126MTCX
SOIC−14, Case 751EF
(Pb−Free, Halide Free)
2500 / Tape & Reel
2500 / Tape & Reel
TSSOP−14 WB, Case 948G−01
(Pb−Free, Halide Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NOTE: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
www.onsemi.com
6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC−14 NB
CASE 751A−03
ISSUE L
14
1
DATE 03 FEB 2016
SCALE 1:1
NOTES:
D
A
B
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF AT
MAXIMUM MATERIAL CONDITION.
4. DIMENSIONS D AND E DO NOT INCLUDE
MOLD PROTRUSIONS.
14
8
7
A3
E
H
5. MAXIMUM MOLD PROTRUSION 0.15 PER
SIDE.
L
DETAIL A
1
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
13X b
M
M
B
0.25
A
A1
A3
b
D
E
1.35
0.10
0.19
0.35
8.55
3.80
1.75 0.054 0.068
0.25 0.004 0.010
0.25 0.008 0.010
0.49 0.014 0.019
8.75 0.337 0.344
4.00 0.150 0.157
M
S
S
B
0.25
C A
DETAIL A
h
A
X 45
_
e
H
h
L
1.27 BSC
0.050 BSC
6.20 0.228 0.244
0.50 0.010 0.019
1.25 0.016 0.049
5.80
0.25
0.40
0
0.10
M
A1
e
M
7
0
7
_
_
_
_
SEATING
PLANE
C
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
6.50
14
14X
1.18
XXXXXXXXXG
AWLYWW
1
1
XXXXX = Specific Device Code
A
WL
Y
= Assembly Location
= Wafer Lot
= Year
1.27
PITCH
WW
G
= Work Week
= Pb−Free Package
14X
0.58
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLES ON PAGE 2
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42565B
SOIC−14 NB
PAGE 1 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
SOIC−14
CASE 751A−03
ISSUE L
DATE 03 FEB 2016
STYLE 1:
STYLE 2:
CANCELLED
STYLE 3:
STYLE 4:
PIN 1. NO CONNECTION
2. CATHODE
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. NO CONNECTION
7. ANODE/CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. NO CONNECTION
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
PIN 1. NO CONNECTION
2. ANODE
3. ANODE
4. NO CONNECTION
5. ANODE
6. NO CONNECTION
7. ANODE
8. ANODE
9. ANODE
10. NO CONNECTION
11. ANODE
12. ANODE
13. NO CONNECTION
14. COMMON CATHODE
3. CATHODE
4. NO CONNECTION
5. CATHODE
6. NO CONNECTION
7. CATHODE
8. CATHODE
9. CATHODE
10. NO CONNECTION
11. CATHODE
12. CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 5:
STYLE 6:
STYLE 7:
STYLE 8:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. NO CONNECTION
7. COMMON ANODE
8. COMMON CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
PIN 1. CATHODE
2. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
7. CATHODE
8. ANODE
PIN 1. ANODE/CATHODE
2. COMMON ANODE
3. COMMON CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. ANODE/CATHODE
7. ANODE/CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. COMMON CATHODE
12. COMMON ANODE
13. ANODE/CATHODE
14. ANODE/CATHODE
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. ANODE/CATHODE
7. COMMON ANODE
8. COMMON ANODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. NO CONNECTION
12. ANODE/CATHODE
13. ANODE/CATHODE
14. COMMON CATHODE
9. ANODE
10. ANODE
11. ANODE
12. ANODE
13. ANODE
14. ANODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42565B
SOIC−14 NB
PAGE 2 OF 2
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC14
CASE 751EF
ISSUE O
DATE 30 SEP 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13739G
SOIC14
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSSOP−14 WB
CASE 948G
ISSUE C
14
DATE 17 FEB 2016
1
SCALE 2:1
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
M
S
S
V
0.10 (0.004)
T U
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
S
0.15 (0.006) T U
N
0.25 (0.010)
14
8
2X L/2
M
B
L
N
−U−
PIN 1
IDENT.
F
7
1
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
DETAIL E
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T U
A
−V−
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
K1
A
B
C
D
F
G
H
J
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
J1
K
−W−
C
K1 0.19
L
M
6.40 BSC
0.252 BSC
0.10 (0.004)
0
8
0
8
_
_
_
_
SEATING
PLANE
−T−
H
G
DETAIL E
D
GENERIC
MARKING DIAGRAM*
14
SOLDERING FOOTPRINT
XXXX
XXXX
ALYWG
G
7.06
1
1
A
L
= Assembly Location
= Wafer Lot
Y
W
G
= Year
= Work Week
= Pb−Free Package
0.65
PITCH
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
01.34X6
14X
1.26
DIMENSIONS: MILLIMETERS
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98ASH70246A
TSSOP−14 WB
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
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