NCP565D2TR4 [ONSEMI]
1.5 A Low Dropout Linear Regulator; 1.5低压差线性稳压器
| 型号： | NCP565D2TR4 |
| 厂家： | 
ONSEMI |
| 描述： | 1.5 A Low Dropout Linear Regulator |
| 文件： | 总12页 (文件大小：115K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NCP565
1.5 A Low Dropout
Linear Regulator
The NCP565 low dropout linear regulator will provide 1.5 A at a
fixed output voltage or an adjustable voltage down to 0.9 V. The fast
loop response and low dropout voltage make this regulator ideal for
applications where low voltage and good load transient response are
important. Device protection includes current limit, short circuit
protection, and thermal shutdown. The NCP565 is packaged in a 5 pin
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MARKING
DIAGRAMS
2
2
D PAK for adjustable voltage version and a 3 pin D PAK for fixed
voltage version.
Features
2
D PAK
NC
P565D2Txx
AWLYWWG
• Pb−Free Packages are Available
CASE 936
FIXED
1
• Ultra Fast Transient Response (t1.0 ms)
• Low Ground Current (1.1 mA @ Iload = 1.5 A)
• Low Dropout Voltage (0.9 V @ Iload = 1.5 A)
• Low Noise (28 mVrms)
2
3
Tab = Ground
Pin 1. V
in
2. Ground
3. V
out
• 0.9 V Reference Voltage
• Adjustable Output Voltage from 7.7 V down to 0.9 V
• 1.2 V Fixed Output Version. Other Fixed Voltages Available on
Request
2
• Current Limit Protection (3.5 A)
• Thermal Shutdown Protection (155°C)
D PAK
NC
P565D2Txx
AWLYWWG
CASE 936A
ADJUSTABLE
1
5
Typical Applications
Tab = Ground
Pin 1. N.C.
• Servers
2. V
in
3. Ground
4. V
5. Adj
• ASIC Power Supplies
• Post Regulation for Power Supplies
• Constant Current Source
out
xx = R4 or 12
A
= Assembly Location
WL = Wafer Lot
Y
= Year
WW = Work Week
= Pb−Free
G
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
Semiconductor Components Industries, LLC, 2004
1
Publication Order Number:
July, 2004 − Rev. 8
NCP565/D
NCP565
PIN DESCRIPTION
Pin No.
Pin No.
Adjustable Version
Fixed Version
Symbol
Description
1
−
N.C.
−
2
1
2, Tab
3
V
Positive Power Supply Input Voltage
in
3, Tab
Ground
Power Supply Ground
4
5
V
out
Regulated Output Voltage
−
Adj
This pin is to be connected to the R
resistors on the output. The
sense
linear regulator will attempt to maintain 0.9 V between this pin and
ground. Refer to Figure 1 for the equation.
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
V
Input Voltage (Note 1)
Output Pin Voltage
Adjust Pin Voltage
V
in
9.0
V
−0.3 to V + 0.3
V
out
in
V
adj
−0.3 to V + 0.3
V
in
Thermal Characteristics (Note 2)
Case 936A
°C/W
Thermal Resistance, Junction−to−Air
Thermal Resistance, Junction−to−Case
Rq
45
5.0
JA
Rq
JC
Operating Junction Temperature Range
Storage Temperature Range
TJ
Tstg
−40 to 150
−55 to 150
°C
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model JESD 22−A114−B
Machine Model JESD 22−A115−A
2. The maximum package power dissipation is:
T
* T
J(max)
A
P
D
+
R
qJA
V
in
V
in
C1
C1
Voltage
Reference
Block
Voltage
Reference
Block
V
ref
= 0.9 V
V
ref
= 0.9 V
V
out
V
out
Output
Stage
Output
Stage
5.6
pF
R1
R2
R1
R2
C2
C2
ADJ
GND
V
V
GND
out
ref
GND
R1 + R2 ǒ * 1Ǔ
Figure 1. Typical Schematic, Adjustable Output
Figure 2. Typical Schematic, Fixed Output
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2
NCP565
ELECTRICAL CHARACTERISTICS (V − V = 1.6 V, V = 0.9 V, T = 25°C, C = C = 150 mF, values unless otherwise noted.)
in
out
out
J
in
out
Characteristic
Symbol
Min
Typ
Max
Unit
ADJUSTABLE OUTPUT VERSION
Reference Voltage (10 mA < I < 1.5 A; 2.5 V < V < 9.0 V; T = −10 to 105°C)
V
ref
0.882
(−2%)
0.9
0.9
0.918
(+2%)
V
V
out
in
J
Reference Voltage (10 mA < I < 1.5 A; 2.5 V < V < 9.0 V; T = −40 to 125°C)
V
out
0.873
(−3%)
0.927
(+3%)
out
in
J
ADJ Pin Current
Line Regulation (I = 10 mA)
I
−
−
30
0.03
0.03
0.9
3.5
85
−
−
nA
%
Adj
Reg
out
line
Load Regulation (10 mA < I < 1.5 A)
Reg
−
−
%
out
load
Dropout Voltage (I = 1.5 A) (Note 3)
Vdo
−
1.3
−
V
out
Current Limit
I
1.6
−
A
lim
Ripple Rejection (120 Hz; I = 1.5 A)
RR
RR
−
dB
dB
°C
out
Ripple Rejection (1 kHz; I = 1.5 A)
−
75
−
out
Thermal Shutdown
−
150
1.1
28
−
Ground Current (I = 1.5 A)
Iq
−
3.0
−
mA
mVrms
out
Output Noise Voltage (f = 100 Hz to 100 kHz, I = 1.5 A)
V
−
out
n
FIXED OUTPUT VOLTAGE
Output Voltage (10 mA < I < 1.5 A; 2.5 V < V < 9.0 V; T = −10 to 105°C)
V
out
1.176
(−2%)
1.2
1.2
1.224
(+2%)
%
%
out
in
J
Output Voltage (10 mA < I < 1.5 A; 2.5 V < V < 9.0 V; T = −40 to 125°C)
V
out
1.164
(−3%)
1.236
(+3%)
out
in
J
Line Regulation (I = 10 mA)
Reg
−
−
0.03
0.03
0.9
3.5
85
−
−
%
%
out
line
Load Regulation (10 mA < I < 1.5 A)
Reg
load
out
Dropout Voltage (I = 1.5 A) (Note 3)
Vdo
−
1.3
−
V
out
Current Limit
I
lim
1.6
−
A
Ripple Rejection (120 Hz; I = 1.5 A)
RR
RR
−
dB
dB
°C
out
Ripple Rejection (1 kHz; I = 1.5 A)
−
75
−
out
Thermal Shutdown
−
150
1.1
28
−
Ground Current (I = 1.5 A)
Iq
−
3.0
−
mA
mVrms
out
Output Noise Voltage (f = 100 Hz to 100 kHz, I = 1.5 A)
V
n
−
out
3. Dropout voltage is a measurement of the minimum input/output differential at full load.
ORDERING INFORMATION
†
Device
Nominal Output Voltage*
Package
Shipping
2
NCP565D2T
Adj
Adj
Adj
D PAK
50 Tube
2
NCP565D2TR4
D PAK
800 Tape & Reel
800 Tape & Reel
2
NCP565D2TR4G
D PAK
(Pb−Free)
2
NCP565D2T12
Fixed
Fixed
Fixed
D PAK
50 Tube
2
NCP565D2T12R4
NCP565D2T12R4G
D PAK
800 Tape & Reel
800 Tape & Reel
2
D PAK
(Pb−Free)
*For other fixed output versions, please contact the factory.
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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3
NCP565
TYPICAL CHARACTERISTICS
0.9005
0.9000
0.8995
0.8990
0.8985
0.8980
0.8975
0.8970
3.90
3.85
3.80
3.75
3.70
3.65
3.60
3.55
3.50
3.45
3.40
3.35
V
= 2.5 V
= 0.9 V
= C = 150 mF
out
in
V
out
V
= 2.5 V
= 0.9 V
= C = 150 mF
out
in
C
in
V
out
C
in
−50 −25
0
25
50
75
100 125 150
−50 −25
0
25
50
75
100
125 150
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 3. Output Voltage vs. Temperature
Figure 4. Short Circuit Current Limit
vs. Temperature
1.2
1.0
0.8
0.6
0.4
0.2
0
1.16
1.14
1.12
1.10
1.08
1.06
1.04
1.02
1.00
0.98
0.96
I
= 1.5 A
out
I
= 50 mA
out
V
= 2.5 V
= 0.9 V
= 1.5 V
= C = 150 mF
out
in
V
out
I
out
C
= C = 150 mF
out
in
C
in
−50 −25
0
25
50
75
100
125 150
−50 −25
0
25
50
75
100
125 150
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 5. Dropout Voltage vs. Temperature
Figure 6. Ground Current vs. Temperature
1.28
1.26
1.24
1.22
1.2
100
90
80
70
60
50
40
30
20
10
0
1.18
1.16
1.14
1.12
I
= 1.5 A
out
0
300
600
900
1200
1500
10
100
1000
10000
100000 1000000
I
, OUTPUT CURRENT (mA)
F, FREQUENCY (Hz)
out
Figure 7. Ground Current vs. Output Current
Figure 8. Ripple Rejection vs. Frequency
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4
NCP565
TYPICAL CHARACTERISTICS
10
10
0
−10
−20
−30
−40
0
−10
V
= 4.59 V
= 0.9 V
V = 4.59 V
in
in
−20
−30
−40
V
out
V
out
= 0.9 V
1.50
1.00
0.50
0
1.50
1.00
0.50
0
0
50 100
150 200 250 300 350 400
TIME (nS)
0
0.5
1.0
1.5 2.0
2.5 3.0
3.5
4.0
TIME (ms)
Figure 9. Load Transient from 10 mA to 1.5 A
Figure 10. Load Transient from 10 mA to 1.5 A
50
50
40
30
20
10
0
40
30
20
10
0
V
V
= 4.59 V
= 0.9 V
V
V
= 4.59 V
= 0.9 V
in
in
out
out
1.50
1.00
0.50
1.50
1.00
0.50
0
0
−50
200
250 300 350
0
50
100 150
400
0
0.2
0.4 0.6
0.8
1.0 1.2
1.4
1.6
TIME (nS)
TIME (ms)
Figure 11. Load Transient from 1.5 A to 10 mA
Figure 12. Load Transient from 1.5 A to 10 mA
100
100
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
V
= 3.0 V
= 0.9 V
= 1.5 A
in
V
out
V
= 3.0 V
= 0.9 V
= 10 mA
in
I
out
V
out
I
out
Start 1.0 kHz
Stop 100 kHz
Start 1.0 kHz
Stop 100 kHz
FREQUENCY (kHz)
FREQUENCY (kHz)
Figure 13. Noise Density vs. Frequency
Figure 14. Noise Density vs. Frequency
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5
NCP565
Adjustable Operation
APPLICATION INFORMATION
The typical application circuit for the adjustable output
regulators is shown in Figure 1. The adjustable device
develops and maintains the nominal 0.9 V reference voltage
between Adj and ground pins. A resistor divider network R1
and R2 causes a fixed current to flow to ground. This current
creates a voltage across R1 that adds to the 0.9 V across R2
and sets the overall output voltage.
The NCP565 low dropout linear regulator provides
adjustable voltages at currents up to 1.5 A. It features ultra
fast transient response and low dropout voltage. These
devices contain output current limiting, short circuit
protection and thermal shutdown protection.
Input, Output Capacitor and Stability
The output voltage is set according to the formula:
An input bypass capacitor is recommended to improve
transient response or if the regulator is located more than a
few inches from the power source. This will reduce the
circuit’s sensitivity to the input line impedance at high
frequencies and significantly enhance the output transient
response. Different types and different sizes of input
capacitors can be chosen dependent on the quality of power
supply. A 150 mF OSCON 16SA150M type from Sanyo
should be adequate for most applications. The bypass
capacitor should be mounted with shortest possible lead or
track length directly across the regulator’s input terminals.
The output capacitor is required for stability. The NCP565
remains stable with ceramic, tantalum, and aluminum−
electrolytic capacitors with a minimum value of 1.0 mF as
long as the ESR remains between 50 mW and 2.5 W. The
NCP565 is optimized for use with a 150 mF OSCON
16SA150M type in parallel with a 10 mF OSCON 10SL10M
type from Sanyo. The 10 mF capacitor is used for best AC
stability while 150 mF capacitor is used for achieving
excellent output transient response. The output capacitors
should be placed as close as possible to the output pin of the
device. If not, the excellent load transient response of
NCP565 will be degraded.
R1 ) R2
ǒ
Ǔ* I
V
+ V
R2
out
ref
Adj
R2
The adjust pin current, Iadj, is typically 30 nA and
normally much lower than the current flowing through R1
and R2, thus it generates a small output voltage error that can
usually be ignored.
Load Transient Measurement
Large load current changes are always presented in
microprocessor applications. Therefore good load transient
performance is required for the power stage. NCP565 has
the feature of ultra fast transient response. Its load transient
responses in Figures 9 through 12 are tested on evaluation
board shown in Figure 15. On the evaluation board, it
consists of NCP565 regulator circuit with decoupling and
filter capacitors and the pulse controlled current sink to
obtain load current transitions. The load current transitions
are measured by current probe. Because the signal from
current probe has some time delay, it causes
un−synchronization between the load current transition and
output voltage response, which is shown in Figures 9
through 12.
GEN
V
out
−V
CC
V
NCP565
RL
V
in
Evaluation Board
Pulse
GND
+
+
GND
Scope Voltage Probe
Figure 15. Schematic for Transient Response Measurement
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6
NCP565
PCB Layout Considerations
several capacitors in parallel. This reduces the overall ESR
and reduces the instantaneous output voltage drop under
transient load conditions. The output capacitor network
should be as close as possible to the load for the best results.
The schematic of NCP565 typical application circuit, which
this PCB layout is base on, is shown in Figure 16. The output
voltage is set to 3.3 V for this demonstration board according
to the feedback resistors in the Table 1.
Good PCB layout plays an important role in achieving
good load transient performance. Because it is very sensitive
to its PCB layout, particular care has to be taken when
tackling Printed Circuit Board (PCB) layout. The figures
below give an example of a layout where parasitic elements
are minimized. For microprocessor applications it is
customary to use an output capacitor network consisting of
V
out
2
4
5
V
V
out
V
in
in
NCP565
1
Adj
NC
C
C
C
C
C
3
1
2
4
3
150 m
150 m
10 m
150 m
150 m
GND
3
GND
GND
R
R
2
1
15.8 k
42.2 k
C
6
5.6 p
Figure 16. Schematic of NCP565 Typical Application Circuit
Figure 17. Top Layer
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7
NCP565
Figure 18. Bottom Layer
NCP565
ON Semiconductor
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D1
R2
R1
C6
VIN
VOUT
C2
C3
C5
C1
GND
GND
July, 2003
Figure 19. Silkscreen Layer
Table 1. Bill of Materials for NCP565 Adj Demonstration Board
Item
Used #
Component
Designators
Suppliers
Part Number
1
4
Radial Lead Aluminum Capacitor
C1, C2, C3, C5
Sanyo Oscon
16SA150M
150 mF/16 V
2
1
Radial Lead Aluminum Capacitor
C4
Sanyo Oscon
10SL10M
10 mF/10 V
3
4
5
6
1
1
1
1
SMT Chip Resistor (0805) 15.8 K 1%
SMT Chip Resistor (0805) 42.2 K 1%
SMT Ceramic Capacitor (0603) 5.6 pF 10%
NCP565 Low Dropout Linear Regulator
R2
R1
C6
U1
Vishay
Vishay
CRCW08051582F
CRCW08054222F
VJ0603A5R6KXAA
NCP565D2TR4
Vishay
ON Semiconductor
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8
NCP565
Protection Diodes
Thermal Considerations
When large external capacitors are used with a linear
regulator it is sometimes necessary to add protection diodes.
If the input voltage of the regulator gets shorted, the output
capacitor will discharge into the output of the regulator. The
discharge current depends on the value of the capacitor, the
This series contains an internal thermal limiting circuit
that is designed to protect the regulator in the event that the
maximum junction temperature is exceeded. This feature
provides protection from a catastrophic device failure due to
accidental overheating. It is not intended to be used as a
substitute for proper heat sinking. The maximum device
power dissipation can be calculated by:
output voltage and the rate at which V drops. In the
in
NCP565 linear regulator, the discharge path is through a
large junction and protection diodes are not usually needed.
If the regulator is used with large values of output
capacitance and the input voltage is instantaneously shorted
to ground, damage can occur. In this case, a diode connected
as shown in Figure 20 is recommended.
T
* T
A
J(max)
P
+
D
R
qJA
2
The devices are available in surface mount D PAK
package. The package has an exposed metal tab that is
specifically designed to reduce the junction to air thermal
resistance, R , by utilizing the printed circuit board
qJA
copper as a heat dissipater. Figure 21 shows typical R
qJA
1N4002 (Optional)
V
in
V
out
values that can be obtained from a square pattern using
economical single sided 2.0 ounce copper board material.
The final product thermal limits should be tested and
quantified in order to insure acceptable performance and
V
V
out
in
C
NCP565
Adj
C
C
2
1
Adj
GND
R
R
1
2
reliability. The actual R
can vary considerably from the
qJA
graph shown. This will be due to any changes made in the
copper aspect ratio of the final layout, adjacent heat sources,
and air flow.
Figure 20. Protection Diode for Large
Output Capacitors
3.5
80
P
D(max)
for T = +50°C
A
3.0
70
60
50
40
30
Free Air
Mounted
Vertically
2.0 oz. Copper
L
2.5
2.0
Minimum
Size Pad
L
1.5
1.0
R
q
JA
0
5.0
10
15
20
L, LENGTH OF COPPER (mm)
25
30
Figure 21. 3−Pin and 5−Pin D2PAK
Thermal Resistance and Maximum Power
Dissipation vs. P.C.B Length
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9
NCP565
PACKAGE DIMENSIONS
D2PAK−3
D2T SUFFIX
CASE 936−03
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS
A AND K.
TERMINAL 4
−T−
OPTIONAL
CHAMFER
K
E
A
U
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 4.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.025 (0.635) MAXIMUM.
S
V
B
H
F
1
2
3
M
L
INCHES
DIM MIN MAX
MILLIMETERS
MIN MAX
9.804 10.236
J
D
P
N
A
B
C
D
E
F
0.386
0.356
0.170
0.026
0.045
0.403
0.368
0.180
0.036
0.055
9.042
4.318
0.660
1.143
9.347
4.572
0.914
1.397
G
0.010 (0.254) M
T
R
0.051 REF
0.100 BSC
0.539 0.579 13.691 14.707
0.125 MAX
0.050 REF
0.000
0.088
0.018
0.058
1.295 REF
2.540 BSC
G
H
J
C
3.175 MAX
1.270 REF
K
L
0.010
0.102
0.026
0.078
0.000
0.254
2.591
0.660
1.981
M
N
P
R
S
U
V
2.235
0.457
1.473
5_REF
5_REF
0.116 REF
0.200 MIN
0.250 MIN
2.946 REF
5.080 MIN
6.350 MIN
SOLDERING FOOTPRINT*
8.38
0.33
1.016
0.04
10.66
0.42
5.08
0.20
3.05
0.12
17.02
0.67
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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10
NCP565
PACKAGE DIMENSIONS
D2PAK−5
D2T SUFFIX
CASE 936A−02
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A
AND K.
−T−
TERMINAL 6
OPTIONAL
CHAMFER
A
E
U
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 6.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED 0.025
(0.635) MAXIMUM.
S
K
V
B
H
1
2
3
4 5
M
L
INCHES
DIM MIN MAX
MILLIMETERS
MIN MAX
9.804 10.236
D
P
N
A
B
C
D
E
G
H
K
L
0.386
0.356
0.170
0.026
0.045
0.067 BSC
0.539
0.050 REF
0.000
0.088
0.018
0.058
0.403
0.368
0.180
0.036
0.055
M
0.010 (0.254)
T
9.042
4.318
0.660
1.143
9.347
4.572
0.914
1.397
G
R
1.702 BSC
0.579 13.691 14.707
1.270 REF
0.010
0.102
0.026
0.078
0.000
0.254
2.591
0.660
1.981
C
M
N
P
R
S
U
V
2.235
0.457
1.473
5_REF
5_REF
0.116 REF
0.200 MIN
0.250 MIN
2.946 REF
5.080 MIN
6.350 MIN
SOLDERING FOOTPRINT*
8.38
0.33
1.702
0.067
10.66
0.42
1.016
0.04
3.05
0.12
16.02
0.63
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
11
NCP565
The product described herein (NCP565), may be covered by one or more of the following U.S. patents: 5,920,184; 5,834,926.
There may be other patents pending.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
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2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
NCP565/D
相关型号：
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