NLSV1T240MUTBG [ONSEMI]

1-Bit Dual-Supply Inverting Level Translator; 1位双电源反相电平转换器
NLSV1T240MUTBG
型号: NLSV1T240MUTBG
厂家: ONSEMI    ONSEMI
描述:

1-Bit Dual-Supply Inverting Level Translator
1位双电源反相电平转换器

转换器 电平转换器
文件: 总6页 (文件大小:85K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
NLSV1T240  
1-Bit Dual-Supply Inverting  
Level Translator  
The NLSV1T240 is a 1-bit configurable dual-supply voltage level  
translator. The input A and output B ports are designed to track two  
n
n
different power supply rails, V  
and V  
respectively. Both  
CCA  
CCB  
http://onsemi.com  
MARKING  
DIAGRAM  
supply rails are configurable from 0.9 V to 4.5 V allowing universal  
low-voltage translation from the input A to the output B port.  
n
n
Features  
ꢀWide V  
and V  
Operating Range: 0.9 V to 4.5 V  
CCA  
CCB  
1
3M  
ꢀHigh-Speed w/ Balanced Propagation Delay  
G
UDFN6  
MU SUFFIX  
CASE 517AA  
ꢀInputs and Outputs have OVT Protection to 4.5 V  
ꢀNon-preferential V  
and V  
Sequencing  
CCA  
CCB  
ꢀOutputs at 3-State until Active V is Reached  
CC  
3
= Specific Device Code  
= Date Code  
ꢀPower-Off Protection  
M
G
= Pb-Free Package  
ꢀOutputs Switch to 3-State with V  
at GND  
CCB  
ꢀUltra-Small Packaging: 1.2 mm x 1.0 mm UDFN6  
ꢀThis is a Pb-Free Device  
PIN ASSIGNMENT  
Typical Applications  
1
2
3
6
5
4
V
B
V
CCB  
CCA  
ꢀMobile Phones, PDAs, Other Portable Devices  
A
Important Information  
GND  
OE  
ꢀESD Protection for All Pins:  
Human Body Model (HBM) > 2000 V  
(Top View)  
V
CCA  
V
CCB  
ORDERING INFORMATION  
B
A
Device  
Package  
Shipping  
NLSV1T240MUTBG UDFN6 3000/Tape & Reel  
(Pb-Free)  
OE  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
Figure 1. Logic Diagram  
©ꢀ Semiconductor Components Industries, LLC, 2008  
March, 2008 - Rev. 3  
1
Publication Order Number:  
NLSV1T240/D  
NLSV1T240  
PIN ASSIGNMENT  
PIN  
TRUTH TABLE  
FUNCTION  
Inputs  
Outputs  
V
Input Port DC Power Supply  
Output Port DC Power Supply  
Ground  
CCA  
CCB  
OE  
L
A
L
B
V
H
L
GND  
A
L
H
X
Input Port  
H
3-State  
B
Output Port  
OE  
Output Enable  
MAXIMUM RATINGS  
Symbol  
Rating  
Value  
Condition  
Unit  
V
V , V  
CCA CCB  
DC Supply Voltage  
-0.5 to +5.5  
-0.5 to +5.5  
-0.5 to +5.5  
-0.5 to +5.5  
-0.5 to +5.5  
-0.5 to +5.5  
-20  
V
DC Input Voltage  
Control Input  
A
OE  
B
V
I
V
C
V
O
V
DC Output Voltage  
(Power Down)  
(Active Mode)  
V
= V  
= 0  
V
CCA  
CCB  
B
V
(Tri-State Mode)  
B
V
I
DC Input Diode Current  
DC Output Diode Current  
V < GND  
I
mA  
mA  
mA  
mA  
mA  
°C  
IK  
I
-50  
V < GND  
O
OK  
I
DC Output Source/Sink Current  
DC Supply Current Per Supply Pin  
DC Ground Current per Ground Pin  
Storage Temperature  
50  
O
I
, I  
CCA CCB  
100  
I
100  
GND  
T
-65 to +150  
STG  
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the  
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect  
device reliability.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
, V  
Parameter  
Min  
0.9  
Max  
4.5  
4.5  
4.5  
4.5  
Unit  
V
V
Positive DC Supply Voltage  
Bus Input Voltage  
Control Input  
CCA CCB  
V
I
GND  
GND  
GND  
GND  
GND  
-40  
V
V
C
OE  
B
V
V
IO  
Bus Output Voltage  
(Power Down Mode)  
(Active Mode)  
V
B
V
CCB  
V
(Tri-State Mode)  
B
4.5  
V
T
A
Operating Temperature Range  
Input Transition Rise or Rate  
V , from 30% to 70% of V ; V = 3.3 V 0.3 V  
+85  
10  
°C  
nS  
Dt / DV  
0
I
CC CC  
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2
NLSV1T240  
DC ELECTRICAL CHARACTERISTICS  
-405C to +855C  
Min  
Max  
Symbol  
Parameter  
Test Conditions  
V
CCA  
(V)  
V
CCB  
(V)  
Unit  
V
Input HIGH Voltage  
(A, OE)  
0.9 – 4.5  
V
3.6 – 4.5  
2.7 – 3.6  
2.3 – 2.7  
1.4 - 2.3  
2.2  
-
IH  
2.0  
1.6  
-
-
-
0.65 * V  
CCA  
CCA  
0.9 – 1.4  
3.6 – 4.5  
2.7 – 3.6  
2.3 – 2.7  
1.4 - 2.3  
0.9 * V  
-
V
Input LOW Voltage  
(A, OE)  
0.9 – 4.5  
V
-
-
-
-
-
0.8  
IL  
0.8  
0.7  
0.35 * V  
CCA  
CCA  
0.9 – 1.4  
0.1 * V  
V
Output HIGH Voltage  
V
I
I
I
I
= -100 mA; V = V  
I
0.9 – 4.5 0.9 – 4.5  
V – 0.2  
CCB  
-
-
OH  
OH  
OH  
OH  
OH  
IH  
IH  
= -0.5 mA; V = V  
I
0.9  
1.4  
1.65  
2.3  
2.3  
2.7  
2.3  
3.0  
3.0  
0.9  
1.4  
1.65  
2.3  
2.3  
2.7  
2.3  
3.0  
3.0  
0.75 * V  
1.05  
1.25  
2.0  
1.8  
2.2  
1.7  
2.4  
2.2  
-
CCB  
= -2 mA; V = V  
I
-
IH  
IH  
= -6 mA; V = V  
I
-
-
I
I
= -12 mA; V = V  
I
-
OH  
IH  
-
= -18 mA; V = V  
I
-
OH  
IH  
IH  
-
I
I
I
I
I
I
= -24 mA; V = V  
I
-
OH  
OL  
OL  
OL  
OL  
OL  
V
Output LOW Voltage  
V
= 100 mA; V = V  
I
0.9 – 4.5 0.9 – 4.5  
0.2  
0.3  
OL  
IL  
= 0.5 mA; V = V  
I
1.1  
1.4  
1.65  
2.3  
2.7  
2.3  
3.0  
3.0  
1.1  
1.4  
1.65  
2.3  
2.7  
2.3  
3.0  
3.0  
-
IH  
= 2 mA; V = V  
I
-
0.35  
0.3  
0.4  
0.4  
0.6  
0.4  
0.55  
1.0  
IH  
IL  
= 6 mA; V = V  
I
-
= 12 mA; V = V  
I
-
IL  
-
I
OL  
= 18 mA; V = V  
I
-
IL  
-
I
OL  
= 24 mA; V = V  
I
-
IL  
I
I
Input Leakage Current  
V = V  
CCA  
or GND  
0.9 – 4.5 0.9 – 4.5  
-1.0  
mA  
mA  
I
I
Power-Off Leakage Current  
OE = 0 V  
0
0.9 – 4.5  
0.9 – 4.5  
0
-1.0  
-1.0  
1.0  
1.0  
OFF  
CCA  
CCB  
I
I
Quiescent Supply Current  
Quiescent Supply Current  
Quiescent Supply Current  
V = V  
I
or GND;  
= V  
CCB  
0.9 – 4.5 0.9 - 4.5  
0.9 – 4.5 0.9 - 4.5  
0.9 – 4.5 0.9 – 4.5  
-
-
-
-
1.0  
1.0  
2.0  
mA  
mA  
mA  
mA  
CCA  
CCA  
CCA  
I
O
= 0, V  
CCA  
V = V  
I
or GND;  
= V  
CCB  
I
O
= 0, V  
CCA  
I
+ I  
V = V  
I
or GND;  
= V  
CCB  
CCA  
CCB  
I
O
= 0, V  
CCA  
DI  
Increase in I per Input Voltage, V = V  
I
– 0.6 V;  
or GND  
4.5  
3.6  
4.5  
3.6  
10  
5.0  
CCA  
CCB  
OZ  
CC  
Other Inputs at V  
CCA  
or GND  
CCA  
V = V  
I
CCA  
DI  
Increase in I per Input Voltage, V = V  
I
– 0.6 V;  
or GND  
4.5  
3.6  
4.5  
3.6  
-
10  
5.0  
mA  
mA  
CC  
Other Inputs at V  
CCA  
or GND  
CCA  
V = V  
I
CCA  
I
I/O Tri-State Output Leakage  
Current  
T = 25°C, OE = 0 V  
0.9 – 4.5 0.9 – 4.5  
-1.0  
1.0  
A
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3
NLSV1T240  
TOTAL STATIC POWER CONSUMPTION (ICCA + ICCB  
)
-405C to +855C  
V
CCB  
(V)  
4.5  
3.3  
2.8  
1.8  
0.9  
V
CCA  
(V)  
Min  
Max  
2
Min  
Max  
2
Min  
Max  
Min  
Max  
2
Min  
Max  
< 1.5  
< 1.5  
< 0.5  
< 0.5  
< 0.5  
Unit  
mA  
4.5  
2
3.3  
2.8  
1.8  
0.9  
2
2
2
2
mA  
< 2  
< 1  
< 0.5  
< 1  
< 1  
< 0.5  
< 1  
< 0.5  
< 0.5  
< 0.5  
mA  
< 0.5  
< 0.5  
mA  
mA  
NOTE: Connect ground before applying supply voltage V  
CCA  
will not damage the IC.  
or V . This device is designed with the feature that the power-up  
CCB  
sequence of V  
and V  
CCA  
CCB  
AC ELECTRICAL CHARACTERISTICS  
-405C to +855C  
V
CCB  
(V)  
4.5  
3.3  
2.8  
1.8  
1.2  
Min  
Max  
Min  
Max  
1.8  
Min  
Max  
2.0  
Min  
Max  
2.1  
Min  
Max  
2.3  
Symbol  
Parameter  
V
(V)  
Unit  
CCA  
t
t
,
Propagation  
Delay,  
4.5  
1.6  
1.7  
nS  
PLH  
PHL  
3.3  
2.8  
1.8  
1.2  
4.5  
3.3  
2.5  
1.8  
1.2  
4.5  
3.3  
2.5  
1.8  
1.2  
4.5  
3.3  
2.5  
1.8  
1.2  
1.9  
2.1  
2.3  
2.6  
(Note 1)  
A to B  
1.9  
2.1  
2.3  
2.5  
2.8  
2.1  
2.4  
2.5  
2.7  
3.0  
2.4  
2.7  
2.8  
3.0  
3.3  
t
t
,
Output  
Enable,  
2.6  
3.8  
4.0  
4.1  
4.3  
nS  
nS  
nS  
PZH  
PZL  
3.7  
3.9  
4.1  
4.3  
4.6  
(Note 1)  
OE to B  
3.9  
4.1  
4.3  
4.5  
4.8  
4.1  
4.4  
4.5  
4.7  
5.0  
4.4  
4.7  
4.8  
5.0  
5.3  
t
t
,
Output  
Disable,  
2.6  
3.8  
4.0  
4.1  
4.3  
PHZ  
PLZ  
3.7  
3.9  
4.1  
4.3  
4.6  
(Note 1)  
OE to B  
3.9  
4.1  
4.3  
4.5  
4.8  
4.1  
4.4  
4.5  
4.7  
5.0  
4.4  
4.7  
4.8  
5.0  
5.3  
t
t
,
Output to  
Output  
Skew,  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
0.15  
OSHL  
OSLH  
(Note 1)  
Time  
1. Propagation delays defined per Figure 2.  
CAPACITANCE  
Symbol  
Parameter  
Test Conditions  
Typ (Note 2)  
Unit  
pF  
C
IN  
Control Pin Input Capacitance  
I/O Pin Input Capacitance  
Power Dissipation Capacitance  
V
CCA  
V
CCA  
V
CCA  
= V  
= 3.3 V, V = 0 V or V  
3.5  
5.0  
5.0  
CCB  
CCB  
CCB  
I
CCA/B  
CCA/B  
C
I/O  
C
PD  
= V  
= V  
= 3.3 V, V = 0 V or V  
I
pF  
= 3.3 V, V = 0 V or V  
I
, f = 10 MHz  
pF  
CCA  
2. Typical values are at T = +25°C.  
A
3. C is defined as the value of the IC's equivalent capacitance from which the operating current can be calculated from:  
PD  
I
^ C x V x f where I = I  
+ I  
CCB  
.
CC(operating)  
PD  
CC  
IN  
CC  
CCA  
http://onsemi.com  
4
 
NLSV1T240  
V
CC  
V
CCO  
x 2  
OPEN  
GND  
R
L
Pulse  
Generator  
DUT  
C
L
R
L
Figure 2. AC (Propagation Delay) Test Circuit  
Test  
, t  
Switch  
t
OPEN  
PLH PHL  
t , t  
PLZ PZL  
V
CCO  
x 2  
t , t  
PHZ PZH  
GND  
C = 15 pF or equivalent (includes probe and jig capacitance)  
L
R = 2 kW or equivalent  
L
Z
of pulse generator = 50 W  
OUT  
V
IH  
Input (A)  
Vm  
Vm  
0 V  
t
t
PHL  
PLH  
V
OH  
Output (B)  
Vm  
Vm  
V
OL  
Waveform 1 - Propagation Delays  
= t = 2.0 ns, 10% to 90%; f = 1 MHz; t = 500 ns  
t
R
F
W
V
IH  
OE  
Vm  
Vm  
n
0 V  
t
t
PHZ  
PZH  
V
OH  
V
Y
Output (B)  
Vm  
Vm  
0 V  
V  
t
t
PLZ  
PZL  
CC  
Output (B)  
V
X
V
OL  
Waveform 2 - Output Enable and Disable Times  
= t = 2.0 ns, 10% to 90%; f = 1 MHz; t = 500 ns  
t
R
F
W
Figure 3. AC (Propagation Delay) Test Circuit Waveforms  
V
CC  
3.0 V – 4.5 V  
2.3 V - 2.7 V  
1.65 V - 1.95 V  
1.4 V - 1.6 V  
0.9 V - 1.3 V  
Symbol  
V
V
V
/2  
/2  
V
V
/2  
/2  
V
V
/2  
/2  
V
V
/2  
/2  
V
V
/2  
/2  
mA  
mB  
CCA  
CCA  
CCA  
CCA  
CCA  
V
CCB  
CCB  
CCB  
CCB  
CCB  
V
V
x 0.1  
x 0.9  
V
x 0.1  
x 0.9  
V
x 0.1  
x 0.9  
V
x 0.1  
x 0.9  
V
x 0.1  
x 0.9  
X
Y
OL  
OL  
OL  
OL  
OL  
V
V
OH  
V
OH  
V
OH  
V
OH  
V
OH  
http://onsemi.com  
5
NLSV1T240  
PACKAGE DIMENSIONS  
UDFN6 1.2 x 1.0, 0.4P  
CASE 517AA-01  
ISSUE C  
EDGE OF PACKAGE  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER  
ASME Y14.5M, 1994.  
2. CONTROLLING DIMENSION: MILLIMETERS.  
3. DIMENSION b APPLIES TO PLATED TERMINAL  
AND IS MEASURED BETWEEN 0.25 AND  
0.30 mm FROM TERMINAL.  
A
B
D
L1  
4. COPLANARITY APPLIES TO THE EXPOSED  
PAD AS WELL AS THE TERMINALS.  
PIN ONE  
REFERENCE  
E
DETAIL A  
Bottom View  
(Optional)  
MILLIMETERS  
2X  
DIM MIN  
0.45  
A1 0.00  
MAX  
0.55  
0.05  
A
0.10  
C
MOLD CMPD  
EXPOSED Cu  
TOP VIEW  
A3  
b
0.127 REF  
0.25  
2X  
0.15  
0.10  
C
C
D
E
e
1.20 BSC  
1.00 BSC  
0.40 BSC  
A3  
L
0.30  
0.40  
0.15  
0.50  
(A3)  
L1 0.00  
L2 0.40  
0.10  
0.08  
A1  
DETAIL B  
Side View  
(Optional)  
A
MOUNTING FOOTPRINT*  
SEATING  
PLANE  
10X  
C
6X  
0.42  
SIDE VIEW  
6X  
0.22  
C
A1  
5X L  
3
1
L2  
6X b  
0.40  
PITCH  
1.07  
6
4
0.10  
0.05  
C
A B  
e
DIMENSIONS: MILLIMETERS  
C
NOTE 3  
*For additional information on our Pb-Free strategy and soldering  
details, please download the ON Semiconductor Soldering and  
Mounting Techniques Reference Manual, SOLDERRM/D.  
BOTTOM VIEW  
ON Semiconductor and  
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice  
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All  
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights  
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications  
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should  
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,  
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal  
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
LITERATURE FULFILLMENT:  
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P.O. Box 5163, Denver, Colorado 80217 USA  
N. American Technical Support: 800-282-9855 Toll Free  
ꢁUSA/Canada  
Europe, Middle East and Africa Technical Support:  
ON Semiconductor Website: www.onsemi.com  
Order Literature: http://www.onsemi.com/orderlit  
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada ꢁPhone: 421 33 790 2910  
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada  
Email: orderlit@onsemi.com  
For additional information, please contact your local  
Sales Representative  
Japan Customer Focus Center  
ꢁPhone: 81-3-5773-3850  
NLSV1T240/D  

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Bus Driver
ONSEMI

NLSV1T34AMUTCG

1-Bit Dual-Supply Non-Inverting Level Translator
ONSEMI

NLSV1T34AMX1TCG

1-Bit Dual-Supply Non-Inverting Level Translator
ONSEMI

NLSV1T34DFT2G

1-Bit Dual-Supply Non-Inverting Level Translator
ONSEMI

NLSV1T34MUTBG

1-Bit Dual-Supply Non-Inverting Level Translator
ONSEMI

NLSV1T34MUTCG

1-Bit Dual-Supply Non-Inverting Level Translator
ONSEMI

NLSV1T34_12

1-Bit Dual-Supply Non-Inverting Level Translator
ONSEMI