NTMFS4834N [ONSEMI]
Power MOSFET 30 V, 130 A, Single N−Channel, SO−8FL; 功率MOSFET的30 V , 130 A单N沟道, SO- 8FL型号: | NTMFS4834N |
厂家: | ONSEMI |
描述: | Power MOSFET 30 V, 130 A, Single N−Channel, SO−8FL |
文件: | 总6页 (文件大小:131K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NTMFS4834N
Power MOSFET
30 V, 130 A, Single N−Channel, SO−8FL
Features
• Low R
to Minimize Conduction Losses
DS(on)
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Devices*
http://onsemi.com
V
R
DS(ON)
MAX
I MAX
D
(BR)DSS
Applications
3.0 mW @ 10 V
4.0 mW @ 4.5 V
• Refer to Application Note AND8195/D
• CPU Power Delivery
• DC−DC Converters
30 V
130 A
D (5,6)
• Low Side Switching
MAXIMUM RATINGS (T = 25°C unless otherwise stated)
J
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Symbol
Value
Unit
V
G (4)
V
DSS
30
20
21
V
GS
V
T = 25°C
Continuous Drain
Current R
I
D
A
A
S (1,2,3)
N−CHANNEL MOSFET
q
JA
T = 85°C
A
15
(Note 1)
Power Dissipation
(Note 1)
T = 25°C
A
P
D
2.31
W
A
R
q
JA
T = 25°C
A
13
9.5
0.9
Continuous Drain
Current R
ID
MARKING
DIAGRAM
q
JA
T = 85°C
A
Steady
State
(Note 2)
Power Dissipation
(Note 2)
D
T = 25°C
A
P
I
W
A
D
S
S
S
G
D
D
1
R
q
JA
4834N
AYWWG
G
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
T
T
T
= 25°C
= 85°C
= 25°C
130
93
Continuous Drain
Current R
C
C
C
D
q
JC
(Note 1)
Power Dissipation
(Note 1)
D
P
D
86.2
W
A
R
q
JC
A
Y
= Assembly Location
= Year
= Work Week
Pulsed Drain
Current
T = 25°C,
t = 10 ms
I
260
A
p
DM
WW
G
Operating Junction and Storage
Temperature
T , T
−55 to
+150
°C
J
STG
= Pb−Free Package
(Note: Microdot may be in either location)
Source Current (Body Diode)
Drain to Source DV/DT
I
71
6
A
S
dV/dt
EAS
V/ns
mJ
Single Pulse Drain−to−Source Avalanche
512
Energy (T = 25°C, V = 30 V, V = 10 V,
J
DD
GS
ORDERING INFORMATION
I = 32 A , L = 1.0 mH, R = 25 W)
L
pk
G
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
T
260
°C
†
L
Device
Package
Shipping
NTMFS4834NT1G SO−8FL
(Pb−Free)
1500 Tape / Reel
5000 Tape / Reel
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
NTMFS4834NT3G SO−8FL
(Pb−Free)
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2010
1
Publication Order Number:
May, 2010 − Rev. 5
NTMFS4834N/D
NTMFS4834N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Symbol
Value
1.45
54
Unit
Junction−to−Case (Drain)
R
q
JC
R
q
JA
R
q
JA
Junction−to−Ambient – Steady State (Note 3)
Junction−to−Ambient – Steady State (Note )
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
°C/W
138.7
4. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
30
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
21
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
= 0 V,
T = 25 °C
1
DSS
GS
DS
J
V
= 24 V
mA
T = 125°C
J
10
100
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
I
V
= 0 V, V
=
20 V
nA
GSS
DS
GS
V
V
= V , I = 250 mA
1.5
2.5
3.0
4.0
V
GS(TH)
GS
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
J
6.1
2.6
2.5
3.5
3.4
35.2
mV/°C
GS(TH)
R
DS(on)
V
GS
= 10 V to
11.5 V
I
D
I
D
I
D
I
D
= 30 A
= 15 A
= 30 A
= 15 A
mW
V
GS
= 4.5 V
Forward Transconductance
g
FS
V
= 15 V, I = 15 A
S
DS
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
4500
960
500
32
ISS
Output Capacitance
C
OSS
C
RSS
V
GS
= 0 V, f = 1 MHz, V = 12 V
pF
DS
Reverse Transfer Capacitance
Total Gate Charge
Q
48
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
Q
5.4
12
G(TH)
V
GS
= 4.5 V, V = 15 V; I = 30 A
nC
nC
DS
D
Q
GS
Q
11
GD
Q
V
GS
= 11.5 V, V = 15 V;
74
G(TOT)
DS
I
= 30 A
D
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
t
20
34
22
23
11
23
37
15
d(ON)
t
r
V
GS
= 4.5 V, V = 15 V, I = 15 A,
DS D
ns
ns
R
= 3.0 W
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
Turn−On Delay Time
Rise Time
t
d(ON)
t
r
V
= 11.5 V, V = 15 V,
DS
GS
D
I
= 15 A, R = 3.0 W
G
Turn−Off Delay Time
Fall Time
t
d(OFF)
t
f
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
2
NTMFS4834N
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.77
0.70
34
1.2
SD
J
V
S
= 0 V,
GS
V
I
= 30 A
T = 125°C
J
Reverse Recovery Time
Charge Time
t
RR
t
18
ns
a
V
= 0 V, dIS/dt = 100 A/ms,
GS
I
S
= 30 A
Discharge Time
t
16
b
Reverse Recovery Charge
PACKAGE PARASITIC VALUES
Source Inductance
Drain Inductance
Q
25.9
nC
RR
L
0.65
0.005
1.84
1.4
nH
nH
nH
W
S
D
G
L
L
T = 25°C
A
Gate Inductance
Gate Resistance
R
G
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
3
NTMFS4834N
TYPICAL PERFORMANCE CURVES
200
200
180
160
140
120
100
80
V
GS
= 5 to 6 V
V
DS
≥ 10 V
180
160
140
120
100
80
4.2 V
4.0 V
T = 25°C
J
3.8 V
3.6 V
3.4 V
60
60
T = 25°C
J
40
40
T = 125°C
J
3.2 V
3.0 V
20
20
T = −55°C
J
0
0
0
1
2
3
4
5
0
1
2
3
4
5
6
V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
V , GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.007
0.006
0.005
30
I
= 30 A
D
T = 25°C
J
T = 25°C
J
25
20
15
10
V
= 4.5 V
GS
0.004
0.003
0.002
V
GS
= 11.5 V
5
0
0.001
0
2
4
6
8
10
12
10 15
20 25 30 35
40 45
50 55 60
V , GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
I , DRAIN CURRENT (AMPS)
D
Figure 3. On−Resistance vs. Gate−to−Source
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
2.0
100,000
10,000
1,000
V
GS
= 0 V
I
V
= 30 A
D
= 10 V
GS
T = 150°C
J
1.5
1.0
T = 125°C
J
100
10
0.5
0
−50 −25
0
25
50
75
100 125 150
2
4
8
12
16
20
24
28
30
T , JUNCTION TEMPERATURE (°C)
J
V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
Figure 5. On−Resistance Variation with
Figure 6. Drain−to−Source Leakage Current
Temperature
vs. Voltage
http://onsemi.com
4
NTMFS4834N
TYPICAL PERFORMANCE CURVES
6500
6000
5500
12
20
18
16
14
12
10
8
Q
T = 25°C
T
J
C
iss
10
5000
4500
4000
3500
3000
2500
2000
1500
1000
V
V
DS
GS
8
C
iss
6
C
rss
4
Q
Q
5
gd
gs
6
C
oss
4
2
0
I
= 30 A
T = 25°C
D
2
0
500
0
J
15 10
5
V
0
5
DS
10
15
20
25
30
0
10 15 20 25 30 35 40 45 50 55 60 65 70 75
V
GS
Q , TOTAL GATE CHARGE (nC)
G
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Gate−To−Source and Drain−To−Source
Figure 7. Capacitance Variation
Voltage vs. Total Charge
30
25
20
1000
V
= 15 V
= 15 A
= 11.5 V
V
= 0 V
DS
GS
I
D
T = 25°C
J
V
GS
100
t
d(off)
15
10
t
r
t
f
t
d(on)
10
1
5
0
1
10
100
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
R , GATE RESISTANCE (W)
G
V , SOURCE−TO−DRAIN VOLTAGE (VOLTS)
SD
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
560
520
480
440
400
360
320
280
240
200
160
120
80
I
= 32 A
D
10 ms
100 ms
1 ms
V
= 20 V
GS
10 ms
dc
SINGLE PULSE
= 25°C
T
C
1
R
LIMIT
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
40
0
25
0.1
0.1
1
10
100
50
75
100
125
150
V , DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
T , STARTING JUNCTION TEMPERATURE (°C)
J
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
5
NTMFS4834N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA−01
ISSUE D
2 X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
MIN
0.90
0.00
0.33
0.23
NOM
1.00
−−−
0.41
0.28
MAX
1.10
0.05
0.51
0.33
4 X
q
E1
2
c
D
5.15 BSC
4.90
−−−
6.15 BSC
5.80
−−−
1.27 BSC
0.61
−−−
0.61
0.17
D1
D2
E
E1
E2
e
G
K
L
L1
M
4.50
3.50
5.10
4.22
c
A1
5.50
3.45
6.10
4.30
1
2
3
4
0.51
0.51
0.51
0.05
3.00
0
0.71
−−−
0.71
0.20
3.80
TOP VIEW
C
3 X
e
SEATING
PLANE
0.10
0.10
C
C
3.40
−−−
DETAIL A
q
12
A
_
_
SOLDERING FOOTPRINT*
SIDE VIEW
DETAIL A
3X
4X
1.270
0.750
4X
1.000
b
8X
STYLE 1:
0.10
C
c
A
B
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
e/2
0.05
L
0.965
1
4
5. DRAIN
6. DRAIN
K
0.29X05
0.475
1.330
2X
0.495
E2
4.530
PIN 5
(EXPOSED PAD)
M
3.200
L1
D2
BOTTOM VIEW
G
2X
1.530
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
NTMFS4834N/D
相关型号:
©2020 ICPDF网 联系我们和版权申明