NTMT061N60S5F [ONSEMI]
Power MOSFET, N-Channel, SUPERFET® V, FRFET®, 600 V, 61 mΩ, 41 A, Power88;
| 型号： | NTMT061N60S5F |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET, N-Channel, SUPERFET® V, FRFET®, 600 V, 61 mΩ, 41 A, Power88 |
| 文件： | 总9页 (文件大小：393K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET - Power, Single
N-Channel, SUPERFET) V,
FRFET), TDFN4
600 V, 61 mW, 41 A
V
R
MAX
I MAX
D
DSS
DS(ON)
600 V
61 mW @ 10 V
41 A
D
NTMT061N60S5F
Description
The SUPERFET V MOSFET FRFET series, optimized reverse
recovery performance of body diode, can remove additional component
and improve system reliability for soft switching applications such as
PSFB and LLC. The Power88 package which is an ultra−slim SMD
package offers excellent switching performance by providing kelvin
source configuration and lower parasitic source inductance.
Features
G
S1: Driver Source
S2: Power Source
S1 S2
POWER MOSFET
G
• 650 V @ T = 150°C / Typ. R
= 48.8 mW
J
DS(on)
S1
S2
• 100% Avalanche Tested / MSL1 Qualified
S2
• Kelvin Source Configuration and Low Parasitic Source Inductance
• Pb−Free, Halogen Free/BFR Free and are RoHS Compliant
Applications
• Computing / Display Power Supplies
TDFN4 8x8 2P
CASE 520AB
• Telecom / Server Power Supplies
• Lighting / Charger/ Adapter / Industrial Power Supplies
ABSOLUTE MAXIMUM RATINGS (T = 25°C, Unless otherwise noted)
MARKING DIAGRAM
J
Parameter
Drain−to−Source Voltage
Symbol
Value
600
30
Unit
V
V
DSS
V
GSS
NTMT061
N60S5F
Gate−to−Source Voltage
DC
V
AWLYWW
AC (f > 1 Hz)
30
Continuous Drain Current
T
= 25°C
= 100°C
= 25°C
= 25°C
= 25°C
I
41
A
C
D
NTMT061N60S5F = Specific Device Code
T
C
25
A
WL
Y
= Assembly Location
= Wafer Lot
= Year
Power Dissipation
T
C
T
C
T
C
P
255
146
146
W
A
D
Pulsed Drain Current (Note 1)
I
DM
WW
= Work Week
Pulsed Source Current
(Body Diode) (Note 1)
I
A
SM
Operating Junction and Storage Temperature T , T
−55 to
+150
°C
J
STG
Range
ORDERING INFORMATION
Source Current (Body Diode)
I
41
A
S
Device
Package
Shipping
3000 / Tape &
Reel
Single Pulse Avalanche
Energy
I = 6.7 A,
G
E
AS
376
mJ
L
NTMT061N60S5F
TDFN4
R
= 25 W
Avalanche Current
I
6.7
2.55
120
70
A
AS
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Repetitive Avalanche Energy (Note 1)
MOSFET dv/dt
E
mJ
AR
dv/dt
V/ns
Peak Diode Recovery dv/dt (Note 2)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 seconds)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. I ≤ 20.5 A, di/dt ≤ 200 A/ms, V ≤ 400 V, starting T = 25°C.
SD
DD
J
© Semiconductor Components Industries, LLC, 2021
1
Publication Order Number:
October, 2022 − Rev. 2
NTMT061N60S5F/D
NTMT061N60S5F
THERMAL CHARACTERISTICS
Parameter
Symbol
Value
0.49
45
Unit
Thermal Resistance, Junction−to−Case, Max.
Thermal Resistance, Junction−to−Ambient, Max.
R
°C/W
q
JC
R
q
JA
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
V
V
I
= 0 V, I = 1 mA, T = 25_C
600
−
−
−
V
(BR)DSS
GS
D
J
Drain−to−Source Breakdown Voltage
Temperature Coefficient
DV
/
= 10 mA, Referenced to 25_C
−
630
mV/_C
(BR)DSS
D
DT
J
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
ON CHARACTERISTICS
I
V
GS
= 0 V, V = 600 V, T = 25_C
−
−
−
−
10
mA
DSS
GSS
DS
J
I
V
=
30 V, V = 0 V
100
nA
GS
DS
Drain−to−Source On Resistance
Gate Threshold Voltage
R
V
V
= 10 V, I = 20.5 A, T = 25_C
−
3.2
−
48.8
−
61
4.8
−
mW
V
DS(on)
GS
D
J
V
= V , I = 4.6 mA, T = 25_C
GS(th)
GS
DS
D
J
Forward Trans−conductance
g
FS
V
DS
= 20 V, I = 20.5 A
39
S
D
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
C
V
= 400 V, V = 0 V, f = 250 kHz
−
−
−
4175
63
−
−
−
pF
ISS
DS
GS
Output Capacitance
C
OSS
Time Related Output Capacitance
C
I
= Constant, V = 0 V to 400 V,
963
OSS(tr.)
D
DS
= 0 V
V
GS
Energy Related Output Capacitance
Total Gate Charge
C
V
= 0 V to 400 V, V = 0 V
−
−
−
−
−
103
76
23
23
6
−
−
−
−
−
OSS(er.)
DS
GS
Q
V
= 400 V, I = 20.5 A, V = 10 V
nC
G(tot)
DD
D
GS
Gate−to−Source Charge
Gate−to−Drain Charge
Gate Resistance
Q
GS
Q
GD
R
f = 1 MHz
W
G
SWITCHING CHARACTERISTICS
Turn-On Delay Time
Rise Time
t
V
= 0/10 V, V = 400 V,
−
−
−
−
42
15
−
−
−
−
ns
d(on)
GS
D
DD
I
= 20.5 A, R = 4.7 W
G
t
r
Turn-Off Delay Time
Fall Time
t
108
2.8
d(off)
t
f
SOURCE-TO−DRAIN DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
V
GS
= 0 V, I = 20.5 A, T = 25_C
−
−
−
−
1.2
−
V
SD
RR
SD
J
t
V
= 0 V, I = 20.5 A,
124
717
ns
nC
GS
SD
dI/dt = 100 A/ms, V = 400 V
DD
Q
−
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
NTMT061N60S5F
TYPICAL CHARACTERISTICS
1000
7.0 V
V
GS
= 10 V
T
C
= 25°C
75
50
V
DS
= 20 V
100
6.0 V
T
C
= 25°C
4.5 V
10
1
25
0
5.5 V
5.0 V
T
= 150°C
T = −55°C
C
C
0
5
10
15
20
3
0
0
4
5
6
7
V
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
DS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.12
0.10
0.08
0.06
0.04
1000
100
10
V
= 0 V
T
= 25°C
GS
C
T
= 25°C
C
V
= 10 V
= 20 V
GS
V
GS
1
0.02
0
T
= 150°C
T = −55°C
C
C
0.1
0
20
40
60
80
100
0.2
0.4
, DIODE FORWARD VOLTAGE (V)
SD
0.6
0.8
1.0
1.2
I , DRAIN CURRENT (A)
V
D
Figure 3. On−Resistance Variation vs. Drain
Figure 4. Diode Forward Voltage vs. Source
Current
Current and Gate Voltage
6
10
10
V
= 0 V
f = 250 kHz
C
C
C
= C + C (C = shorted)
GS GD DS
GS
V
DS
= 130 V
ISS
I
D
= 20.5 A
= C + C
5
OSS
RSS
DS
GD
10
= C
GD
8
6
4
C
ISS
4
V
= 400 V
DS
10
3
10
C
C
OSS
2
10
RSS
1
10
2
0
0
10
−1
10
0
100
200
300
400
500
600
20
40
60
80
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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3
NTMT061N60S5F
TYPICAL CHARACTERISTICS
1.2
1.1
1.0
3.0
V
= 0 V
= 10 mA
GS
V
= 10 V
= 20.5 A
GS
I
D
I
D
2.5
2.0
1.5
1.0
0.9
0.8
0.5
0
−75 −50 −25
0
25 50 75 100 125 150 175
−75 −50 −25
0
25 50
75 100 125 150 175
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation vs.
Temperature
Figure 8. On−Resistance Variation vs.
Temperature
45
40
35
30
25
20
15
10
1000
100
10
10 ms
100 ms
1 ms
10 ms
Operation in this Area
is Limited by R
DS(on)
1
DC
T
C
= 25°C
T = 150°C
Single Pulse
5
0
J
0.1
1
10
100
1000
25
50
75
100
125
150
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
T , CASE TEMPERATURE (°C)
C
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case
Temperature
16
12
8
4
0
0
100
200
300
400
500
600
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. EOSS vs. Drain−to−Source Voltage
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4
NTMT061N60S5F
TYPICAL CHARACTERISTICS
1
D = 0.5
D = 0.2
0.1
D = 0.1
D = 0.05
D = 0.02
Notes:
(t) = 0.49°C/W Max
0.01
Z
q
JC
D = 0.01
Duty Cycle, D = t /t
1
2
T
JM
= P
x Z (t) + T
q
DM JC C
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t, RECTANGULAR PULSE DURATION (s)
Figure 12. Transient Thermal Impedance
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5
NTMT061N60S5F
V
GS
R
Q
g
L
V
DD
Q
Q
gs
gd
V
GS
DUT
I
G
= Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
R
L
V
DS
GS
90%
90%
10%
90%
V
DS
V
DD
V
GS
R
G
10%
V
DUT
V
GS
t
r
t
f
t
t
d(off)
d(on)
t
on
t
off
Figure 14. Resistive Switching Test Circuit & Waveforms
L
2
1
2
EAS
+
@ LIAS
V
DS
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
V
GS
V
DS
(t)
t
p
Time
t
p
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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6
NTMT061N60S5F
+
DUT
V
SD
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
− dv/dt controlled by R
G
− I controlled by pulse period
SD
Gate Pulse Width
D +
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET and FRFET are a registered trademarks of Semiconductor Components Industries, LLC or its subsidiaries in the United States and/or other
countries.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TDFN4 8x8, 2P
CASE 520AB
ISSUE O
DATE 24 APR 2019
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
XXXXXXXX
XXXXXXXX
AWLYWW
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON73688G
TDFN4 8x8, 2P
PAGE 1 OF 1
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