NVBG089N65S3F [ONSEMI]
Single N-Channel Power MOSFET SUPERFET® III, FRFET®, 650 V , 37 A, 89 mΩ, D2PAK 7 lead;
| 型号： | NVBG089N65S3F |
| 厂家： | 
ONSEMI |
| 描述： | Single N-Channel Power MOSFET SUPERFET® III, FRFET®, 650 V , 37 A, 89 mΩ, D2PAK 7 lead |
| 文件： | 总10页 (文件大小：221K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
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MOSFET - Power, Single
N-Channel, D2PAK-7L
650 V, 89 mW, 37 A
V
R
MAX
I MAX
D
(BR)DSS
DS(ON)
650 V
89 mW @ 10 V
37 A
Drain (TAB)
NVBG089N65S3F
Description
Gate (Pin 1)
®
SUPERFET III MOSFET is onsemi’s brand−new high voltage
super−junction (SJ) MOSFET family that is utilizing charge balance
technology for outstanding low on−resistance and lower gate charge
performance. This advanced technology is tailored to minimize
conduction loss, provide superior switching performance, and
withstand extreme dv/dt rate.
Driver Source (Pin 2)
Power Source (Pins 3, 4, 5, 6, 7)
N−CHANNEL MOSFET
Consequently, SUPERFET III MOSFET is very suitable for the
various power system for miniaturization and higher efficiency.
®
SUPERFET III FRFET MOSFET’s optimized reverse recovery
performance of body diode can remove additional component and
improve system reliability.
In addition, the D2PAK 7 lead package offers Kelvin sense. This
allows higher switching speeds and gives designers the ability to
reduce the overall application footprint.
D2PAK−7L
CASE 418BJ
Features
• 700 V @ T = 150°C
J
• Typ. R
= 70 mW
MARKING DIAGRAM
DS(on)
• Ultra Low Gate Charge (Typ. Q = 74 nC)
g
• Low Effective Output Capacitance (Typ. C
• 100% Avalanche Tested
= 668 pF)
VBG089
N65S3F
AYWWZZ
oss(eff.)
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
VBG089N65S3F = Specific Device Code
A
Y
= Assembly Location
= Year
Typical Applications
• Automotive On Board Charger
• Automotive DC/DC Converter for BEV
WW = Work Week
ZZ
= Lot Traceability
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2022
1
Publication Order Number:
May, 2022 − Rev. 0
NVBG089N65S3F/D
NVBG089N65S3F
Table 1. ABSOLUTE MAXIMUM RATINGS (T = 25°C unless otherwise stated)
C
Symbol
V
Parameter
Value
650
Unit
V
Drain−to−Source Voltage
Gate−to−Source Voltage
DSS
V
GS
− DC
30
V
− AC (f > 1 Hz)
30
I
D
Drain Current
− Continuous (T = 25°C)
37
A
C
− Continuous (T = 100°C)
24.3
92
C
I
Drain Current
− Pulsed (Note 1)
A
mJ
A
DM
E
Single Pulse Avalanche Energy (Note 2)
Avalanche Current
480
AS
AS
I
4.7
E
Repeated Avalanche Energy (Note 1)
MOSFET dv/dt
2.92
100
mJ
V/ns
AR
dv/dt
Peak Diode Recovery dv/dt (Note 3)
Power Dissipation
50
P
TC = 25°C
291
W
W/°C
°C
D
− Derate Above 25°C
2.33
−55 to 150
300
T , T
J
Operating Junction and Storage Temperature Range
stg
T
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 Seconds
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse*width limited by maximum junction temperature.
2. I = 4.7 A, R = 25 W, starting T = 25°C.
AS
G
J
3. I ≤ 18.5 A, di/dt ≤ 200 A/ms, V ≤ 400 V, starting T = 25°C.
SD
DD
C
Table 2. THERMAL RESISTANCE RATINGS
Symbol
Parameter
Max
0.43
40
Unit
Thermal Resistance, Junction−to−Case, Max.
°C/W
R
q
JC
JA
R
Thermal Resistance, Junction−to−Ambient, Max.
q
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2
NVBG089N65S3F
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BV
Drain−to−Source Breakdown Voltage
V
= 0 V, I = 1 mA, T = 25°C
650
700
−
−
−
−
−
V
V
DSS
GS
D
J
V
GS
= 0 V, I = 10 mA, T = 150°C
D J
DBV
/DT
Breakdown Voltage Temperature Coefficient
Zero Gate Voltage Drain Current
I = 10 mA, Referenced to 25°C
D
0.63
−
−
V/°C
mA
mA
nA
DSS
J
I
V
DS
= 650 V, V = 0 V
−
10
−
DSS
GS
V
DS
= 520 V, T = 125°C
−
11
−
C
I
Gate−to−Body Leakage Current
V
GS
=
30 V, V = 0 V
−
100
GSS
DS
ON CHARACTERISTICS
V
Gate Threshold Voltage
V
= V , I = 0.97 mA
3
−
−
−
5
89
−
V
mW
S
GS(th)
DS(on)
GS
DS
D
R
Static Drain−to−Source On Resistance
Forward Transconductance
V
= 10 V, I = 18.5 A
70
21
GS
DS
D
g
FS
V
= 20 V, I = 18.5 A
D
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
DS
= 400 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
3598
64
−
−
−
−
−
−
−
−
pF
pF
pF
pF
nC
nC
nC
W
iss
GS
C
Output Capacitance
oss
C
Effective Output Capacitance
Energy Related Output Capacitance
Total Gate Charge at 10 V
Gate−to−Source Gate Charge
Gate−to−Drain “Miller” Charge
Equivalent Series Resistance
V
DS
= 0 to 400 V, V = 0 V
668
114
74
oss(eff.)
GS
C
V
DS
= 0 to 400 V, V = 0 V
GS
oss(er.)
Q
V
DS
V
= 400 V, I = 18.5 A,
GS
g(total)
D
= 10 V (Note 4)
Q
Q
12
gs
29
gd
ESR
F = 1 MHz
1.3
SWITCHING CHARACTERISTICS, V = 10 V
GS
t
Turn-On Delay Time
Rise Time
V
= 400 V, I = 18.5 A,
−
−
−
−
34
26
81
5
−
−
−
−
ns
ns
ns
ns
d(on)
DD
D
V
= 10 V, R = 4.7 W
GS
G
t
r
(Note 4)
t
Turn-Off Delay Time
Fall Time
d(off)
t
f
SOURCE−DRAIN DIODE CHARACTERISTICS
I
Maximum Continuous Source−to−Drain Diode Forward Current
Maximum Pulsed Source−to−Drain Diode Forward Current
−
−
−
−
−
−
−
37
92
1.3
−
A
A
S
I
SM
V
SD
Source−to−Drain Diode Forward Voltage
Reverse−Recovery Time
V
= 0 V, I = 18.5 A
−
V
GS
SD
t
V
GS
= 0 V, I = 18.5 A,
dI /dt = 100 A/ms
103
414
ns
nC
rr
SD
F
Q
Reverse−Recovery Charge
−
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
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3
NVBG089N65S3F
TYPICAL CHARACTERISTICS
100
100
V
GS
= 10 V
T
C
= 25°C
V
DS
= 20 V
8.0 V
7.0 V
6.5 V
10
1
6.0 V
T
C
= 25°C
5.5 V
10
T
= 150°C
T
C
= −55°C
C
0.1
1
0.2
2
20
2
3
4
5
6
7
8
V
DS
, DRAIN−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
100
10
0.20
0.15
V
GS
= 0 V
T
C
= 25°C
V
= 10 V
GS
0.10
0.05
0
T
C
= 25°C
V
GS
= 20 V
1
T = 150°C
C
T
= −55°C
C
0.1
10
20
30
40
50
60
70
80
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
I , DRAIN CURRENT (A)
D
V
SD
, DIODE FORWARD VOLTAGE (V)
Figure 3. On−Resistance Variation vs. Drain
Figure 4. Diode Forward Voltage vs. Source
Current
Current and Gate Voltage
100K
10K
1K
10
8
V
DS
= 130 V
I
D
= 18.5 A
C
iss
V
DS
= 400 V
6
C
oss
100
10
4
C
rss
2
0
1
V
GS
= 0 V
f = 1 MHz
0.1
0.1
1
10
100
1000
0
20
40
60
80
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
G
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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4
NVBG089N65S3F
TYPICAL CHARACTERISTICS
1.2
1.1
1.0
2.5
V
= 0 V
= 10 mA
GS
I
V
= 18.5 A
D
I
D
= 10 V
GS
2.0
1.5
1.0
0.9
0.8
0.5
0
−75
−25
25
75
125
175
−75
−25
25
75
125
175
T , JUNCTION TEMPERATURE (°C)
J
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation vs.
Temperature
Figure 8. On−Resistance Variation vs.
Temperature
100
40
35
30
25
20
15
10 ms
100 ms
10
Operation in this Area
1 ms
is Limited by R
DS(on)
10 ms
DC
1
10
5
T
= 25°C
C
T = 150°C
J
Single Pulse
0.1
0
1
10
100
1000
25
50
75
100
125
150
V
DS
, DRAIN−SOURCE VOLTAGE (V)
T , CASE TEMPERATURE (°C)
C
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case
Temperature
20.0
17.5
15.0
12.5
10.0
7.5
5.0
2.5
0
0
100
200
300
400
500
600
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. EOSS vs. Drain−to−Source Voltage
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5
NVBG089N65S3F
TYPICAL CHARACTERISTICS
10
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.1
Notes:
(t) = r(t) x R
P
DM
0.01
Z
q
q
JC
JC
0.01
R
= 0.43°C/W
q
Single Pulse
JC
Peak T = P
x Z
(t) + T
JC C
t
q
J
DM
1
Duty Cycle, D = t /t
t
1
2
2
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Transient Thermal Response
DEVICE ORDERING INFORMATION
Device
†
Package
Shipping
NVBG089N65S3F
D2PAK−7L
800 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
NVBG089N65S3F
V
GS
R
Q
g
L
V
DS
Q
Q
gs
gd
V
GS
DUT
I
G
= Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
R
L
V
DS
GS
90%
90%
10%
90%
V
DS
V
DD
V
GS
R
G
10%
V
DUT
V
GS
t
t
d(off)
t
r
t
f
d(on)
t
on
t
off
Figure 14. Resistive Switching Test Circuit & Waveforms
L
2
1
2
EAS
+
@ LIAS
V
DS
BV
DSS
I
D
I
AS
R
G
V
DD
I (t)
D
DUT
V
DD
V
GS
V
DS
(t)
t
p
Time
t
p
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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7
NVBG089N65S3F
+
DUT
V
DS
−
I
SD
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
− dv/dt controlled by R
G
− I controlled by pulse period
SD
Gate Pulse Width
D +
Gate Pulse Period
V
GS
10 V
(Driver)
I
, Body Diode Forward Current
FM
I
di/dt
SD
(DUT)
I
RM
Body Diode Reverse Current
Body Diode Recovery dv/dt
V
DS
V
DD
V
SD
(DUT)
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET and FRFET are registered trademarks of Semiconductor Components Industries, LLC.
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8
NVBG089N65S3F
PACKAGE DIMENSIONS
D2PAK7 (TO−263−7L HV)
CASE 418BJ
ISSUE B
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9
NVBG089N65S3F
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