NVBLS0D5N04CTXG [ONSEMI]

Power MOSFET, 40 V, 300 A, 0.57 mΩ, Single N-Channel;
NVBLS0D5N04CTXG
型号: NVBLS0D5N04CTXG
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET, 40 V, 300 A, 0.57 mΩ, Single N-Channel

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MOSFET - Power, Single  
N-Channel, TOLL  
40 V, 0.57 mW, 300 A  
NVBLS0D5N04C  
Features  
Low R  
to Minimize Conduction Losses  
Low Q and Capacitance to Minimize Driver Losses  
DS(on)  
www.onsemi.com  
G
AECQ101 Qualified and PPAP Capable  
Small Footprint (TOLL) for Compact Design  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(ON)  
40 V  
0.57 mW @ 10 V  
300 A  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
Parameter  
DraintoSource Voltage  
Symbol  
Value  
40  
Unit  
V
D (9)  
V
DSS  
GatetoSource Voltage  
V
+20/16  
300  
V
GS  
Continuous Drain  
Current R  
T
= 25°C  
= 100°C  
= 25°C  
I
A
C
D
q
JC  
G (1)  
T
C
300  
(Notes 1, 3)  
Steady  
State  
Power Dissipation  
T
C
P
198.4  
97.4  
65  
W
A
D
R
(Note 1)  
q
JC  
T
C
= 100°C  
S (2 8)  
Continuous Drain  
Current R  
T = 25°C  
A
I
D
NCHANNEL MOSFET  
q
JA  
T = 100°C  
A
46  
(Notes 1, 2, 3)  
Steady  
State  
Power Dissipation  
T = 25°C  
A
P
4.3  
W
D
R
(Notes 1, 2)  
q
JA  
T = 100°C  
A
2.1  
Pulsed Drain Current  
T = 25°C, t = 10 ms  
I
DM  
4700  
A
A
p
Operating Junction and Storage Temperature  
Range  
T , T  
55 to  
+175  
°C  
J
stg  
Source Current (Body Diode)  
I
170  
A
S
HPSOF8L  
CASE 100CU  
Single Pulse DraintoSource Avalanche  
E
AS  
1512  
mJ  
Energy (I  
= 55 A, L = 1 mH)  
L(pk)  
Lead Temperature for Soldering Purposes  
(1/8from case for 10 s)  
T
L
260  
°C  
ORDERING INFORMATION  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
Device  
Package  
Shipping  
NVBLS0D5N04CTXG HPSOF8L 2000 / Tape  
(PbFree) & Reel  
THERMAL RESISTANCE MAXIMUM RATINGS  
†For information on tape and reel specifications,  
including part orientation and tape sizes, please  
refer to our Tape and Reel Packaging Specification  
Brochure, BRD8011/D.  
Parameter  
Symbol  
Value  
0.77  
35  
Unit  
JunctiontoCase Steady State  
JunctiontoAmbient Steady State (Note 2)  
R
°C/W  
q
JC  
R
q
JA  
1. The entire application environment impacts the thermal resistance values  
shown, they are not constants and are only valid for the particular conditions  
noted. Current is limited by bondwire configuration.  
2
2. Surfacemounted on FR4 board using a 650 mm , 2 oz. Cu pad.  
3. Maximum current for pulses as long as 1 second is higher but is dependent  
on pulse duration and duty cycle.  
© Semiconductor Components Industries, LLC, 2019  
1
Publication Order Number:  
June, 2020 Rev. 0  
NVBLS0D5N04C/D  
 
NVBLS0D5N04C  
Table 1. ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
Parameter  
OFF CHARACTERISTICS  
Symbol  
Test Conditions  
Min  
Typ  
Max  
Units  
DraintoSource Breakdown Voltage  
V
I
D
= 250 mA, V = 0 V  
40  
V
(BR)DSS  
GS  
DraintoSource Breakdown Voltage  
Temperature Coefficient  
V
/T  
J
21.3  
mV/°C  
(BR)DSS  
V
DS  
= 40 V, V = 0 V  
T = 25°C  
1
Zero Gate Voltage Drain Current  
I
mA  
mA  
nA  
GS  
J
DSS  
T = 175°C  
J
1
GatetoSource Leakage Current  
ON CHARACTERISTICS (Note 4)  
Gate Threshold Voltage  
I
V
DS  
= 0 V, V = +20/16 V  
100  
GSS  
GS  
V
GS(th)  
V
GS  
= V , I = 475 mA  
2
2.8  
7.4  
0.5  
4
V
DS  
D
Threshold Temperature Coefficient  
DraintoSource On Resistance  
V
/T  
mV/°C  
mW  
GS(th)  
J
R
V
GS  
= 10 V, I = 50 A  
0.57  
DS(on)  
D
CHARGES, CAPACITANCES & GATE RESISTANCE  
Input Capacitance  
C
V
GS  
= 0 V, V = 25 V, f = 1 MHz  
12600  
6705  
227  
1.8  
pF  
pF  
pF  
W
iss  
DS  
Output Capacitance  
C
oss  
Reverse Transfer Capacitance  
Gate Resistance  
C
rss  
R
V
GS  
= 0.5 V, f = 1 MHz  
g
Total Gate Charge  
Q
V
GS  
= 10 V, V = 20 V, I = 50 A  
185  
22  
nC  
nC  
nC  
nC  
V
G(tot)  
DS  
D
Threshold Gate Charge  
GatetoSource Gate Charge  
GatetoDrain “Miller” Charge  
Plateau Voltage  
Q
V
GS  
= 0 to 2 V  
G(th)  
Q
V
DD  
= 32 V, I = 50 A  
48  
gs  
gd  
D
Q
38  
V
4.2  
GP  
SWITCHING CHARACTERISTICS (Note 5)  
TurnOn Delay Time  
t
V
= 10 V, V = 20 V,  
40  
84  
ns  
ns  
ns  
ns  
d(on)  
GS  
D
DD  
I
= 50 A, R  
= 6 W  
GEN  
TurnOn Rise Time  
t
r
TurnOff Delay Time  
t
164  
81  
d(off)  
TurnOff Fall Time  
t
f
DRAINSOURCE DIODE CHARACTERISTICS  
SourcetoDrain Diode Voltage  
Reverse Recovery Time  
Charge Time  
I
= 50 A, V = 0 V  
0.76  
108  
62  
1.2  
V
V
SD  
GS  
SD  
t
ns  
ns  
ns  
nC  
V
= 0 V, dI /d = 100 A/ms,  
S t  
rr  
GS  
I
S
= 50 A  
t
a
b
Discharge Time  
t
46  
Reverse Recovery Charge  
Q
288  
rr  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
4. Pulse Test: pulse width 300 ms, duty cycle 2%.  
5. Switching characteristics are independent of operating junction temperatures  
www.onsemi.com  
2
 
NVBLS0D5N04C  
TYPICAL CHARACTERISTICS  
1200  
900  
1200  
10 V to 8 V  
V
GS  
= 7.0 V  
V
DS  
= 5 V  
900  
600  
V
= 6.0 V  
= 5.0 V  
GS  
GS  
600  
T = 25°C  
J
300  
0
300  
0
V
T = 175°C  
J
T = 55°C  
J
0
0.5  
1.0  
1.5  
2.0  
2
3
4
5
6
7
8
V
DS  
, DRAINTOSOURCE VOLTAGE (V)  
V
GS  
, GATETOSOURCE VOLTAGE (V)  
Figure 1. OnRegion Characteristics  
Figure 2. Transfer Characteristics  
30  
24  
18  
12  
1.5  
1.2  
0.9  
0.6  
I
D
= 50 A  
T = 25°C  
J
V
= 6 V  
GS  
V
GS  
= 10 V  
T = 25°C  
J
6
0
0.3  
0
T = 175°C  
J
3
4
5
6
7
8
9
10  
0
50  
100  
150  
200  
250  
300  
V
GS  
, GATETOSOURCE VOLTAGE (V)  
I , DRAIN CURRENT (A)  
D
Figure 3. OnResistance vs. GatetoSource  
Figure 4. OnResistance vs. Drain Current and  
Voltage  
Gate Voltage  
1.8  
1.7  
1000  
100  
10  
T = 175°C  
J
V
= 10 V  
= 50 A  
GS  
I
D
T = 150°C  
J
1.6  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
T = 125°C  
J
T = 85°C  
J
1
0.1  
T = 25°C  
J
0.9  
0.8  
0.7  
0.01  
V
GS  
= 0 V  
0.001  
75 50 25  
0
25 50 75 100 125 150 175 200  
5
10  
15  
20  
25  
30  
35  
40  
T , JUNCTION TEMPERATURE (°C)  
J
V
, DRAINTOSOURCE VOLTAGE (V)  
DS  
Figure 5. OnResistance Variation with  
Figure 6. DraintoSource Leakage Current  
Temperature  
vs. Voltage  
www.onsemi.com  
3
NVBLS0D5N04C  
TYPICAL CHARACTERISTICS  
10  
100K  
10K  
1K  
Q
G(tot)  
C
ISS  
8
6
4
C
OSS  
RSS  
C
Q
Q
GD  
GS  
100  
V
= 0 V  
T = 25°C  
D
GS  
J
2
0
10  
1
f = 1 MHz  
T = 25°C  
J
I
= 50 A  
V
DS  
= 32 V  
0
40  
80  
120  
160  
200  
0.1  
1
10  
40  
Q , TOTAL GATE CHARGE (nC)  
G
V
DS  
, DRAINTOSOURCE VOLTAGE (V)  
Figure 7. Capacitance Variation  
Figure 8. GatetoSource Voltage vs. Total  
Charge  
1000  
300  
30  
3
V
V
= 10 V  
= 20 V  
= 50 A  
V
GS  
= 0 V  
GS  
DS  
I
D
t
d(off)  
100  
10  
0.3  
t
r
T = 175°C  
J
t
f
t
d(on)  
0.03  
T = 25°C  
T = 55°C  
J
J
0.003  
1
10  
R , GATE RESISTANCE (W)  
100  
0
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
V
SD  
, BODY DIODE FORWARD VOLTAGE (V)  
G
Figure 9. Resistive Switching Time Variation  
vs. Gate Resistance  
Figure 10. Diode Forward Voltage vs. Current  
400  
100  
6000  
1000  
10 ms  
T
= 25°C  
J(initial)  
100 ms  
100  
10  
Operation in this  
area may be limit-  
ed by package  
T
= 150°C  
J(initial)  
10  
1
1 ms  
10 ms  
100 ms  
Operation in this  
area may be limit-  
1
ed by R  
DS(on)  
0.1  
0.1  
1
10  
100  
0.001 0.01 0.1  
1
10  
100  
1K  
10K  
V , DRAINTOSOURCE VOLTAGE (V)  
DS  
t , TIME IN AVALANCHE (mS)  
AV  
Figure 11. Forward Biased Safe Operating  
Area  
Figure 12. Maximum Drain Current vs. Time in  
Avalanche  
www.onsemi.com  
4
NVBLS0D5N04C  
TYPICAL CHARACTERISTICS  
200  
160  
120  
80  
40  
0
T = 25°C  
J
0
1
10  
20  
30  
40  
50  
I , DRAINTOSOURCE CURRENT (A)  
D
Figure 13. GFS vs. ID  
Duty Cycle = 0.5  
0.2  
0.1  
0.05  
0.1  
0.02  
0.01  
0.01  
Single Pulse  
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t, RECTANGULAR PULSE DURATION (s)  
Figure 14. Transient Thermal Impedance  
www.onsemi.com  
5
MECHANICAL CASE OUTLINE  
PACKAGE DIMENSIONS  
HPSOF8L 11.68x9.80  
CASE 100CU  
ISSUE C  
DATE 22 MAY 2023  
GENERIC  
MARKING DIAGRAM*  
AYWWZZ  
XXXXXXXX  
XXXXXXXX  
A
Y
= Assembly Location  
= Year  
*This information is generic. Please refer to  
device data sheet for actual part marking.  
PbFree indicator, “G” or microdot “G”, may  
or may not be present. Some products may  
not follow the Generic Marking.  
WW = Work Week  
ZZ  
XXXX = Specific Device Code  
= Assembly Lot Code  
Electronic versions are uncontrolled except when accessed directly from the Document Repository.  
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.  
DOCUMENT NUMBER:  
DESCRIPTION:  
98AON13813G  
HPSOF8L 11.68x9.80  
PAGE 1 OF 1  
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