NVCR4LS1D3N08M7A [ONSEMI]
Power MOSFET, N-Channel, 80 V, 1.27 mΩ, Bare Die;
| 型号： | NVCR4LS1D3N08M7A |
| 厂家： | 
ONSEMI |
| 描述： | Power MOSFET, N-Channel, 80 V, 1.27 mΩ, Bare Die |
| 文件： | 总7页 (文件大小：198K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
www.onsemi.com
MOSFET – Power, N-Channel
80 V, 1.27 mW
NVCR4LS1D3N08M7A
Features
• Typical R
• Typical Q
= 1.0 mꢀ at V = 10 V
GS
DS(on)
= 172 nC at V = 10 V
g(tot)
GS
• AEC−Q101 Qualified and PPAP Capable
• RoHS Compliant
ORDERING INFORMATION
Device
Package
NVCR4LS1D3N08M7A
Wafer
Sawn on Foil
DIMENSION (mm)
Die Size
6604 x 3683
RECOMMENDED STORAGE CONDITIONS
Die Size (Sawn)
Source Attach Area
Gate Attach Area
Die Thickness
6584 30 x 3663 30
6399.3 x 3452.6
343.1 x 477.5
Temperature
RH
22 to 28°C
40 to 66%
101.6 19.1
Gate and Source: AlSiCu
Drain: Ti−NiV−Ag (back side of die)
Passivation: Polyimide
Wafer Diameter: 8 inch
Wafer sawn on UV Tape
Bad dice identified in inking
Gross Die Counts: 1001
The Chip is 100% Probed to Meet the Conditions and Limits
Specified at T = 25°C.
J
Symbol
BV
Parameter
Condition
I = 250 ꢁ A, V = 0 V
D
Min
80
−
Typ
−
Max
−
Unit
V
Drain to Source Breakdown Voltage
Drain to Source Leakage Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Bare Die Drain to Source On Resistance
Source to Drain Diode Voltage
DSS
GS
I
V
DS
V
GS
V
GS
= 80 V, V = 0 V
−
1
ꢁ A
nA
V
DSS
GS
I
=
20 V, V = 0 V
−
−
100
4.0
1.27
1.2
−
GSS
DS
V
GS(th)
= V , I = 250 ꢁ A
2.0
−
−
DS
D
*R
I
D
= 5 A, V = 10 V
1.0
−
mꢀ
DS(on)
GS
*V
SD
I
= 5 A, V = 0 V
−
V
SD
GS
E
AS
Single Pulse Drain−to−Source
Avalanche Energy
L = 0.3 mH, I = 70 A
735
−
mJ
AS
*Accurate R
, V test at die level are not feasible for this thin die as limited by the test contact precision attainable in a die form. The max
specification are defined from the historical performance of the die in package but are not guaranteed by test in production. The
performance depends on the Source wire/ribbon bonding layout.
DS(on) SD
R
, V
DS(on) SD
die R
DS(on)
© Semiconductor Components Industries, LLC, 2019
1
Publication Order Number:
NVCR4LS1D3N08M7A/D
October, 2022 − Rev. 0
NVCR4LS1D3N08M7A
MOSFET MAXIMUM RATINGS in Reference to the FDBL86361−F085 electrical data in TOLL
(T = 25°C unless otherwise noted)
J
Symbol
Parameter
Ratings
80
Unit
V
V
DSS
Drain to Source Voltage
Gate to Source Voltage
Continuous Drain Current R
V
GS
20
V
I
D
(V = 10) (Note 1)
GS
A
ꢂ JC
T
C
T
C
= 25°C
371
262
= 100°C
E
Single Pulse Avalanche Energy (Note 2)
819
429
mJ
W
AS
P
Power Dissipation R
D
ꢂ
JC
Derate Above 25°C
2.86
W/°C
°C
T , T
Operating and Storage Temperature
−55 to +175
0.35
J
STG
R
Thermal Resistance, Junction to Case
°C/W
°C/W
ꢂ
JC
R
Maximum Thermal Resistance, Junction to Ambient (Note 3)
43
ꢂ
JA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Current is limited by silicon.
2. Starting T = 25°C, L = 0.4 mH, I = 64 A, V = 40 V during inductor charging and V = 0 V during time in avalanche.
J
AS
DD
DD
3. R
is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder
ꢂ
JA
mounting surface of the drain pins. R
presented here is based on mounting on a 1 in pad of 2oz copper.
is guaranteed by design, while R
is determined by the board design. The maximum rating
ꢂ
ꢂ
JC
JA
2
ELECTRICAL CHARACTERISTICS in Reference to the FDBL86361−F085 electrical data in TOLL
(T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
OFF CHARACTERISTICS
BV
Drain to Source Breakdown Voltage
Drain to Source Leakage Current
I
= 250 ꢁ A, V = 0 V
80
−
−
−
V
DSS
D
GS
I
V
V
= 80 V,
= 0 V
T = 25°C
J
−
1
ꢁ
A
DSS
DS
GS
I
Gate to Source Leakage Current
V
GS
=
20 V
−
−
100
nA
GSS
ON CHARACTERISTICS
V
R
Gate to Source Threshold Voltage
Drain to Source on Resistance
V
I
= V , I = 250 ꢁ A
2.0
−
3.0
1.1
2.4
4.0
1.4
3.1
V
GS(th)
GS
DS
D
= 80 A,
= 10 V
T = 25°C
J
mꢀ
ꢀ
DS(on)
D
V
GS
T = 175°C (Note 4)
−
m
J
DYNAMIC CHARACTERISTICS
C
Input Capacitance
V
= 40 V, V = 0 V, f = 1 MHz
−
−
−
−
−
−
−
−
12800
1925
139
2.7
−
−
−
−
−
−
−
−
pF
iss
DS
GS
C
Output Capacitance
pF
pF
ꢀ
oss
C
Reverse Transfer Capacitance
Gate Resistance
rss
R
f = 1 MHz
g
Q
Total Gate Charge
V
GS
V
GS
V
DD
= 0 to 10 V, V = 64 V, I = 80 A
172
23
nC
nC
nC
nC
g(ToT)
DD
D
Q
Threshold Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
= 0 to 2 V, V = 64 V, I = 80 A
DD D
g(th)
Q
= 64 V, I = 80 A
51
gs
D
Q
34
gd
SWITCHING CHARACTERISTICS
t
Turn−On Delay
Rise Time
V
DD
V
GS
= 40 V, I = 80 A,
−
−
−
−
42
73
87
48
−
−
−
−
ns
ns
ns
ns
d(on)
D
= 10 V, R
= 6 ꢀ
GEN
t
r
t
Turn−Off Delay
Fall Time
d(off)
t
f
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2
NVCR4LS1D3N08M7A
ELECTRICAL CHARACTERISTICS in Reference to the FDBL86361−F085 electrical data in TOLL
(T = 25°C unless otherwise noted)
J
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
DRAIN−SOURCE DIODE CHARACTERISTIC
V
Source to Drain Diode Voltage
I
I
= 80 A, V = 0 V
−
−
−
−
−
−
1.25
1.2
−
V
V
SD
SD
GS
= 40 A, V = 0 V
SD
GS
t
Reverse Recovery Time
I = 80 A, dI /dt = 100 A/ꢁ s,
F
V
117
205
ns
nC
rr
SD
= 64 V
DD
Q
Reverse Recovery Charge
−
rr
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at T = 175°C. Product is not tested to this condition in production.
J
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3
NVCR4LS1D3N08M7A
TYPICAL CHARACTERISTICS
1.2
1.0
0.8
0.6
0.4
0.2
0.0
400
300
V
= 10 V
GS
Current limited
by package
Current limited
by silicon
200
100
0
0
25
50
75
100
125
150
175
25
50
75
100
125
150
175
200
T , Case Temperature [5C]
C
T , Case Temperature [5C]
C
Figure 1. Normalized Power Dissipation
vs. Case Temperature
Figure 2. Maximum Continuous Drain
Current vs. Case Temperature
2
1
DUTY CYCLE − DESCENDING ORDER
D = 0.50
0.20
0.10
0.05
0.02
P
DM
0.01
0.1
t
1
t
2
NOTES:
Duty factor: D = t /t
SINGLE PULSE
1
2
Peak T = P
× Z
ꢂ
(t) × R
(t) + T
JC C
ꢂ
J
DM
JC
0.01
−5
−4
−3
−2
−1
0
1
10
10
10
10
10
10
10
t, Rectangular Pulse Duration (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
10000
1000
100
V
GS
= 10 V
T
25°C
C =
For temperatures
above 25°C derate peak
current as follows:
175 * T
C
Ǹ
I + I ƪ ƫ
SINGLE PULSE
2
150
10
−5
−4
−3
−2
−1
0
1
10
10
10
10
10
10
10
t, Rectangular Pulse Duration (s)
Figure 4. Peak Current Capability
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4
NVCR4LS1D3N08M7A
TYPICAL CHARACTERISTICS (CONTINUED)
2000
1000
2000
1000
If R = 0
t
= (L)(I ) / (1.3 × Rated BV
V
)
AV
AS
DSS − DD
If R ≠ 0
t
= (L/R)ln[(I × R) / (1.3 × Rated BV
V
) + 1]
AV
AS
DSS − DD
100
10
1
100
10
1
Operation in this
area may be
100 us
1 ms
Starting T
25°C
limited by r
J =
DS(on)
Starting T
150°C
J =
SINGLE PULSE
10 ms
100 ms
T
T
max rated
25°C
J =
C =
0.1
0.1
1
10
100
500
0.001 0.01
0.1
1
10
100
1000 10000
V
DS
, Drain to Source Voltage [V]
t , Time in Avalanche [ms]
AV
Refer to ON Semiconductor Application Notes AN7514 and AN7515.
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching
Capability
300
240
180
300
100
Pulse duration = 80 ꢁs
Duty cycle = 0.5% MAX
V
0 V
GS =
V
DD =
5 V
10
1
T
175°C
J =
T
J =
25°C
T
J =
25°C
120
60
0.1
0.01
T
J =
175°C
T
J =
−55°C
0
0.001
2
3
4
5
6
7
0.0
0.2
V
0.4
0.6
0.8
1.0
1.2
V
, Gate to Source Voltage [V]
, Body Diode Forward Voltage [V]
GS
SD
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
250
200
150
250
200
150
V
GS
5 V
15 V Top
10 V
8 V
7 V
6 V
V
GS
15 V Top
10 V
8 V
7 V
6 V
5 V
5.5 V
5 V Bottom
5.5 V
5 V Bottom
100
50
100
50
80 ꢁs Pulse Width
T
J =
25°C
80 ꢁs Pulse Width
T
J =
175°C
0
0
0
1
2
3
4
5
0
1
2
3
4
5
V
DS
, Drain to Source Voltage [V]
V
DS
, Drain to Source Voltage [V]
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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NVCR4LS1D3N08M7A
TYPICAL CHARACTERISTICS (CONTINUED)
20
16
2.4
I
80 A
Pulse duration = 80 ꢁs
Duty cycle = 0.5% MAX
Pulse duration = 80 ꢁs
Duty cycle = 0.5% MAX
D =
2.0
1.6
1.2
12
8
T
175°C
J =
T
J =
25°C
I
80 A
D =
4
0.8
0.4
V
10 V
GS =
0
4
6
8
10
−80
−40
0
40
80
120
160
200
V
GS
, Gate to Source Voltage [V]
T , Junction Temperature [5C]
J
Figure 11. RDSON vs. Gate Voltage
Figure 12. Normalized RDSON vs. Junction
Temperature
1.5
1.2
0.9
0.6
0.3
0.0
1.10
1.05
I
5 mA
V
D =
V
D =
GS = DS
I
250 ꢁA
1.00
0.95
0.90
−80
−40
0
40
80
120
−80
−40
0
40
80
120
160
200
160
200
T , Junction Temperature [5C]
J
T , Junction Temperature [5C]
J
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10
100000
10000
1000
I
80 A
D =
V
40 V
32 V
DD =
DD =
8
C
iss
V
DD =
48 V
V
6
4
C
oss
rss
100
10
2
0
C
f = 1 MHz
0 V
V
GS =
0.1
1
10
100
0
20
40
60
80
100 120 140 160 180
Q , Gate Charge [nC]
g
V
DS
, Drain to Source Voltage [V]
Figure 15. Capacitance vs. Drain to Source
Voltage
Figure 16. Gate Charge vs. Gate to Source
Voltage
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