NVD5117PLT4G-VF01 [ONSEMI]
单 P 沟道,功率 MOSFET,-60V,-61A,16mΩ;型号: | NVD5117PLT4G-VF01 |
厂家: | ONSEMI |
描述: | 单 P 沟道,功率 MOSFET,-60V,-61A,16mΩ |
文件: | 总6页 (文件大小:81K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
NVD5117PL
Power MOSFET
−60 V, 16 mW, −61 A, Single P−Channel
Features
• Low R
to Minimize Conduction Losses
• High Current Capability
DS(on)
www.onsemi.com
• Avalanche Energy Specified
• AEC−Q101 Qualified
V
R
I
D
(BR)DSS
DS(on)
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
16 mW @ −10 V
22 mW @ −4.5 V
−60 V
−61 A
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
S
Parameter
Drain−to−Source Voltage
Symbol
Value
−60
"20
−61
−43
118
59
Unit
V
V
DSS
G
Gate−to−Source Voltage
Continuous Drain Cur-
V
V
GS
P−Channel
T
= 25°C
= 100°C
= 25°C
I
A
C
D
rent R
(Note 1)
q
JC
T
C
Steady
State
D
Power Dissipation R
(Note 1)
T
C
P
W
A
q
D
JC
T
C
= 100°C
4
Continuous Drain Cur-
rent R (Notes 1 & 2)
T = 25°C
I
−11
−8
A
D
q
JA
2
1
T = 100°C
A
Steady
State
3
Power Dissipation R
(Notes 1 & 2)
T = 25°C
A
P
4.1
W
q
D
JA
DPAK
CASE 369C
STYLE 2
T = 100°C
A
2.1
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
−419
60
A
A
A
p
Current Limited by
Package (Note 3)
T = 25°C
A
I
Dmaxpkg
MARKING DIAGRAMS
& PIN ASSIGNMENT
Operating Junction and Storage Temperature
Source Current (Body Diode)
T , T
−55 to
175
°C
J
stg
4
Drain
I
S
−118
240
A
Single Pulse Drain−to−Source Avalanche
E
AS
mJ
Energy (T = 25°C, V = 50 V, V = 10 V,
J
DD
GS
I
= 40 A, L = 0.3 mH, R = 25 W)
L(pk)
G
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
2
Drain
Gate Source
1
3
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
Y
= Year
THERMAL RESISTANCE MAXIMUM RATINGS
WW
= Work Week
5117L = Device Code
= Pb−Free Package
Parameter
Symbol
Value
Unit
G
Junction−to−Case − Steady State (Drain)
R
1.3
37
°C/W
q
q
JC
Junction−to−Ambient − Steady State (Note 2)
R
JA
ORDERING INFORMATION
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
†
Device
Package
Shipping
2
NVD5117PLT4G
DPAK
(Pb−Free)
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2017
1
Publication Order Number:
January, 2017 − Rev. 1
NVD5117PL/D
NVD5117PL
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
V
= 0 V, I = −250 mA
−60
V
(BR)DSS
GS
D
I
T = 25°C
J
−1.0
−100
"100
mA
DSS
V
GS
= 0 V,
V
= −60 V
DS
T = 125°C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
DS
= 0 V, V = "20 V
nA
GSS
GS
V
V
V
= V , I = −250 mA
−1.5
−2.5
16
V
GS(TH)
GS
DS
D
Drain−to−Source On Resistance
R
V
GS
= −10 V, I = −29 A
12
16
30
mW
DS(on)
D
= −4.5 V, I = −29 A
22
GS
D
Froward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
g
FS
V
= −15 V, I = −15 A
S
DS
D
C
V
= 0 V, f = 1.0 MHz,
4800
480
320
49
pF
iss
GS
V
DS
= −25 V
Output Capacitance
C
oss
Reverse Transfer Capacitance
Total Gate Charge
C
rss
Q
V
= −4.5 V
= −10 V
nC
G(TOT)
GS
V
I
= −48 V,
DS
= −29 A
D
V
85
GS
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
Q
3
G(TH)
Q
13
GS
GD
GP
V
GS
= −4.5 V, V = −48 V,
DS
I
D
= −29 A
Q
V
28
3.2
V
SWITCHING CHARACTERISTICS (Notes 4)
Turn−On Delay Time
Rise Time
t
22
195
50
ns
d(on)
t
r
V
V
= −4.5 V, V = −48 V,
DS
GS
I
D
= −29 A, R = 2.5 W
G
Turn−Off Delay Time
Fall Time
t
d(off)
t
f
132
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
= 0 V,
= −29 A
T = 25°C
−0.86
−0.74
36
−1.0
V
SD
GS
J
I
S
T = 125°C
J
Reverse Recovery Time
Charge Time
t
ns
RR
t
t
19
a
V
GS
= 0 V, dl /dt = 100 A/ms,
s
I = −29 A
s
Discharge Time
17
b
Reverse Recovery Charge
Q
44
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
www.onsemi.com
2
NVD5117PL
TYPICAL CHARACTERISTICS
120
120
100
80
60
40
20
0
T = 25°C
−4.5 V
V
GS
= −10 V
J
V
DS
≥ −10 V
−4.2 V
100
80
60
40
20
0
−4 V
−3.8 V
−3.6 V
−3.4 V
−3.2 V
−3 V
T = 25°C
J
T = 125°C
J
T = −55°C
J
0
1
2
3
4
5
2
3
4
5
6
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
−V , GATE−TO−SOURCE VOLTAGE (V)
GS
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.024
0.022
0.020
0.018
0.016
0.014
0.012
0.010
0.065
0.055
0.045
0.035
0.025
0.015
0.005
I
= −29 A
T = 25°C
D
J
T = 25°C
J
V
GS
= −4.5 V
V
= −10 V
GS
3
4
5
6
7
8
9
10
10 20 30 40 50 60 70 80 90 100 110 120
−V , GATE−TO−SOURCE VOLTAGE (V)
GS
−I , DRAIN CURRENT (A)
D
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
2.00
1.80
1.60
1.40
1.20
1.00
0.80
0.60
100000
10000
1000
V
= 0 V
GS
V
I
= −10 V
= −29 A
GS
D
T = 150°C
J
T = 125°C
J
100
−50 −25
0
25
50
75
100 125 150 175
5
10 15 20 25 30 35 40 45 50 55 60
T , JUNCTION TEMPERATURE (°C)
J
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVD5117PL
TYPICAL CHARACTERISTICS
6000
5500
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
10
Q
V
= 0 V
T
GS
T = 25°C
J
8
6
4
2
0
C
iss
Q
Q
gd
gs
V
I
= −48 V
= −29 A
DS
C
D
oss
T = 25°C
C
J
rss
0
0
10
20
30
40
50
60
0
10
20
30
40
50
60
70
80
90
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
Q , TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source vs. Total Charge
1000.0
100.0
10.0
120
100
80
60
40
20
0
V
= 0 V
GS
T = 25°C
J
t
d(off)
t
r
t
f
t
d(on)
V
= −48 V
= −29 A
= −10 V
DD
I
D
V
GS
1.0
1
10
R , GATE RESISTANCE (W)
100
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
−V , SOURCE−TO−DRAIN VOLTAGE (V)
G
SD
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
100
10
250
200
150
100
50
10 ms
I
D
= −40 A
V
= −10 V
GS
100 ms
1 ms
10 ms
Single Pulse
= 25°C
T
C
dc
1
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
0
0.1
1
10
100
25
50
75
100
125
150
175
−V , DRAIN−TO−SOURCE VOLTAGE (V)
DS
T , STARTING JUNCTION TEMPERATURE (°C)
J
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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4
NVD5117PL
TYPICAL CHARACTERISTICS
10
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.01
0.05
0.02
0.01
Single Pulse
0.00001
0.000001
0.0001
PULSE TIME (sec)
0.001
0.01
0.1
Figure 13. Thermal Response
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5
NVD5117PL
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
A
D
E
C
A
b3
B
c2
4
2
L3
L4
Z
DETAIL A
H
1
3
7. OPTIONAL MOLD FEATURE.
INCHES
DIM MIN MAX
0.086 0.094
A1 0.000 0.005
0.025 0.035
MILLIMETERS
NOTE 7
MIN
2.18
0.00
0.63
0.72
4.57
0.46
0.46
5.97
6.35
2.29 BSC
9.40 10.41
1.40 1.78
2.90 REF
0.51 BSC
0.89 1.27
MAX
2.38
0.13
0.89
1.14
5.46
0.61
0.61
6.22
6.73
c
b2
e
BOTTOM VIEW
A
SIDE VIEW
b
b
b2 0.028 0.045
b3 0.180 0.215
M
0.005 (0.13)
C
TOP VIEW
c
0.018 0.024
c2 0.018 0.024
Z
Z
D
E
e
0.235 0.245
0.250 0.265
0.090 BSC
H
GAUGE
PLANE
SEATING
PLANE
H
L
L1
L2
0.370 0.410
0.055 0.070
0.114 REF
L2
C
0.020 BSC
L3 0.035 0.050
L
BOTTOM VIEW
A1
L4
Z
−−− 0.040
0.155 −−−
−−−
3.93
1.01
−−−
L1
ALTERNATE
CONSTRUCTIONS
DETAIL A
ROTATED 905 CW
SOLDERING FOOTPRINT*
6.20
0.244
3.00
0.118
2.58
0.102
5.80
0.228
1.60
0.063
6.17
0.243
mm
inches
ǒ
Ǔ
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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