NVMFS4C302NT1G [ONSEMI]
Single N−Channel Logic Level Power MOSFET 30 V, 241 A, 1.15 mΩ;
| 型号： | NVMFS4C302NT1G |
| 厂家： | 
ONSEMI |
| 描述： | Single N−Channel Logic Level Power MOSFET 30 V, 241 A, 1.15 mΩ 脉冲 光电二极管 晶体管 |
| 文件： | 总7页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
NVMFS4C302N
Power MOSFET
30 V, 1.15 mW, 241 A, Single N−Channel
Logic Level, SO−8FL
Features
• Small Footprint (5x6 mm) for Compact Design
www.onsemi.com
• Low R
to Minimize Conduction Losses
DS(on)
• Low Q and Capacitance to Minimize Driver Losses
G
V
R
MAX
I MAX
D
(BR)DSS
DS(on)
• NVMFS4C302NWF − Wettable Flanks Option for Enhanced Optical
Inspection
1.15 mW @ 10 V
1.7 mW @ 4.5 V
30 V
241 A
• AEC−Q101 Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
D (5,6)
Compliant
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
J
Parameter
Drain−to−Source Voltage
Symbol
Value
30
Unit
V
G (4)
V
DSS
Gate−to−Source Voltage
V
"20
241
V
GS
S (1,2,3)
N−CHANNEL MOSFET
Continuous Drain Cur-
T
T
= 25°C
= 25°C
I
A
C
D
rent R
3)
(Notes 1, 2,
q
JC
Steady
State
MARKING
DIAGRAM
Power Dissipation
(Notes 1, 2)
P
115
43
W
A
C
D
R
q
JC
D
Continuous Drain Cur-
T = 25°C
A
I
D
rent R
3)
(Notes 1, 2,
q
JA
S
S
S
G
D
D
1
Steady
State
4C02xx
AYWZZ
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
Power Dissipation
(Notes 1, 2)
T = 25°C
A
P
3.75
900
W
D
R
q
JA
D
Pulsed Drain Current
T = 25°C, t = 10 ms
I
DM
A
A
p
4C02N = Specific Device Code for
NVMFS4C302N
4C02WF= Specific Device Code of
NVMFS4C302NWF
Operating Junction and Storage Temperature
T , T
J
−55 to
175
°C
stg
Source Current (Body Diode)
I
153
186
A
S
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceabililty
Single Pulse Drain−to−Source Avalanche
E
mJ
AS
Energy (I
= 61 A)
L(pk)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
260
°C
L
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
ORDERING INFORMATION
†
Device
Package
Shipping
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
NVMFS4C302NT1G
SO−8 FL
(Pb−Free) Tape & Reel
1500 /
Parameter
Symbol
Value
Unit
Junction−to−Case − Steady State (Note 2)
Junction−to−Ambient − Steady State (Note 2)
R
1.3
40
°C/W
q
q
JC
NVMFS4C302NWFT1G
SO−8 FL
1500 /
R
JA
(Pb−Free) Tape & Reel
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm , 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
2
© Semiconductor Components Industries, LLC, 2016
1
Publication Order Number:
December, 2017 − Rev. 0
NVMFS4C302N/D
NVMFS4C302N
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)
J
Parameter
OFF CHARACTERISTICS
Symbol
Test Condition
Min
Typ
Max
Unit
Drain−to−Source Breakdown Voltage
V
V
GS
= 0 V, I = 250 mA
30
V
(BR)DSS
D
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
/
24
(BR)DSS
mV/°C
T
J
Zero Gate Voltage Drain Current
I
V
V
= 0 V,
= 24 V
T = 25 °C
1.0
100
100
DSS
GS
DS
J
mA
T = 125°C
J
Gate−to−Source Leakage Current
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
I
V
= 0 V, V = 20 V
nA
GSS
DS
GS
GS
V
V
= V , I = 250 mA
1.3
2.2
V
GS(TH)
DS
D
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
V
/T
5.8
0.95
1.35
135
1.0
mV/°C
GS(TH)
J
R
V
= 10 V
I
I
= 30 A
= 30 A
1.15
1.7
DS(on)
GS
D
mW
V
GS
= 4.5 V
D
Forward Transconductance
Gate Resistance
g
FS
V
= 3 V, I = 30 A
S
DS
D
R
T = 25 °C
A
W
G
CHARGES AND CAPACITANCES
Input Capacitance
C
5780
2320
70
ISS
Output Capacitance
C
V
GS
= 0 V, f = 1 MHz, V = 15 V
pF
OSS
RSS
DS
Reverse Transfer Capacitance
Total Gate Charge
C
Q
37
G(TOT)
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
Q
9.0
16
G(TH)
V
GS
= 4.5 V, V = 15 V; I = 30 A
nC
nC
DS
D
Q
GS
GD
Q
7.0
82
Q
V
= 10 V, V = 15 V,
G(TOT)
GS DS
I
= 30 A
D
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
t
13
18
54
9.0
d(ON)
Rise Time
t
r
V
GS
= 10 V, V = 15 V, I = 15 A,
DS
D
ns
V
R
= 3.0 W
G
Turn−Off Delay Time
t
d(OFF)
Fall Time
t
f
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
T = 25°C
0.75
0.6
56
1.1
SD
J
V
= 0 V,
= 10 A
GS
I
S
T = 125°C
J
Reverse Recovery Time
Charge Time
t
RR
t
29
ns
a
V
= 0 V, dI /dt = 100 A/ms,
S
GS
I
S
= 30 A
Discharge Time
t
b
27
Reverse Recovery Charge
Q
69
nC
RR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
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2
NVMFS4C302N
TYPICAL CHARACTERISTICS
450
400
350
300
250
200
150
100
450
10 V
6 V
4.5 V
T = 25°C
V
DS
= 3 V
J
400
350
300
250
200
150
100
4.0 V
3.7 V
3.5 V
3.3 V
3.1 V
2.9 V
T = 125°C
J
T = 25°C
J
2.7 V
2.5 V
50
0
50
0
T = −55°C
J
0
0.5
1
1.5
2
2.5
3
1.5
2.0
2.5
3.0
3.5
4.0
4.5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
2.35
2.15
1.95
1.75
1.55
1.35
1.15
2.35
2.15
1.95
1.75
1.55
1.35
T = 25°C
J
T = 25°C
D
J
I
= 30 A
V
= 4.5 V
= 10 V
GS
1.15
0.95
0.75
V
GS
0.95
0.75
3
4
5
6
7
8
9
10
0
50 100 150 200 250 300 350 400 450
I , DRAIN CURRENT (A)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
D
Figure 3. On−Resistance vs. VGS
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.8
1.7
1.6
1000000
100000
10000
1000
V
GS
= 0 V
V
I
= 10 V
= 30 A
GS
T = 175°C
D
J
1.5
1.4
1.3
1.2
1.1
T = 150°C
J
T = 125°C
J
T = 100°C
J
1.0
0.9
0.8
0.7
T = 85°C
J
100
10
−50 −25
0
25
50
75
100 125 150 175
0
5
10
15
20
25
30
T , JUNCTION TEMPERATURE (°C)
J
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVMFS4C302N
TYPICAL CHARACTERISTICS
11
10
9
10000
1000
Q
T
C
C
iss
8
oss
7
6
5
C
rss
Q
gd
4
3
2
1
0
Q
gs
100
10
V
= 0 V
V = 15 V
DS
GS
T = 25°C
I
D
= 30 A
J
f = 1 MHz
T = 25°C
J
0
5
10
15
20
25
30
0
10
20
30
40
50
60
70
80
90
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q , TOTAL GATE CHARGE (nC)
g
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
1000
100
V
GS
= 0 V
t
d(off)
V
V
= 10 V
= 15 V
= 15 A
GS
DD
I
D
100
10
1
t
f
t
r
T = 175°C
J
t
d(on)
10
1
T = 150°C
J
T = 25°C
J
T = −55°C
J
0.1
0.2
0.3 0.4
0.5
0.6 0.7
0.8 0.9 1.0 1.1
1
10
100
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
R , GATE RESISTANCE (W)
G
Figure 10. Diode Forward Voltage vs. Current
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
100
10
100 ms
V
< 10 V
GS
1 ms
Single Pulse
= 25°C
T
C
10 ms
1
R
Limit
DS(on)
Thermal Limit
Package Limit
dc
0.1
0.01
0.1
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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4
NVMFS4C302N
TYPICAL CHARACTERISTICS
100
10
R
Steady State = 40°C/W
q
JA
Duty Cycle = 50%
20%
10%
5%
2%
1
1%
0.1
0.01
Single Pulse
0.001
0.000001 0.00001
0.0001
0.001
0.01
PULSE TIME (sec)
0.1
1
10
100
1000
Figure 12. Thermal Response
1000
100
10
T = 25°C
J
T = 100°C
J
1
1.0E−6
10E−6
100E−6
1.0E−3
10E−3
TIME IN AVALANCHE (S)
Figure 13. Maximum Drain Current vs. Time in
Avalanche
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N
1
SCALE 2:1
2 X
DATE 25 JUN 2018
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
0.20
C
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
D
A
2
B
E
2 X
D1
MILLIMETERS
0.20
C
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
MIN
0.90
0.00
0.33
0.23
5.00
4.70
3.80
6.00
5.70
3.45
NOM
1.00
−−−
0.41
0.28
5.15
4.90
4.00
6.15
MAX
1.10
0.05
0.51
0.33
5.30
5.10
4.20
6.30
6.10
3.85
4 X
q
E1
2
c
A1
5.90
3.65
1
2
3
4
1.27 BSC
0.575
1.35
0.575
0.125 REF
3.40
0.51
1.20
0.51
0.71
1.50
0.71
TOP VIEW
C
SEATING
DETAIL A
PLANE
0.10
0.10
C
C
3.00
0
3.80
q
−−−
12
A
_
_
GENERIC
SIDE VIEW
MARKING DIAGRAM*
DETAIL A
1
8X b
A B
XXXXXX
AYWZZ
0.10
0.05
C
c
e/2
e
L
1
4
XXXXXX = Specific Device Code
A
Y
= Assembly Location
= Year
K
RECOMMENDED
SOLDERING FOOTPRINT*
W
ZZ
= Work Week
= Lot Traceability
E2
2X
PIN 5
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
(EXPOSED PAD)
L1
0.495
4.560
2X
1.530
D2
G
2X
BOTTOM VIEW
0.475
3.200
1.330
4.530
STYLE 1:
STYLE 2:
PIN 1. ANODE
2. ANODE
2X
0.905
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
1
3. ANODE
4. NO CONNECT
5. CATHODE
0.965
5. DRAIN
4X
1.000
1.270
PITCH
DIMENSIONS: MILLIMETERS
4X
0.750
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DOCUMENT NUMBER:
DESCRIPTION:
98AON14036D
DFN5 5x6, 1.27P (SO−8FL)
PAGE 1 OF 1
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