P3P8203A [ONSEMI]
General Purpose Peak EMI Reduction IC;
| 型号： | P3P8203A |
| 厂家： | 
ONSEMI |
| 描述： | General Purpose Peak EMI Reduction IC |
| 文件： | 总6页 (文件大小：116K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
P3P8203A
General Purpose Peak EMI
Reduction Device
Functional Description
P3P8203A is a versatile, 3.3 V LVCMOS Peak EMI reduction
device.
P3P8203A accepts an input clock either from a Fundamental
Crystal or from an external reference and locks on to it delivering a 1x
modulated clock.
P3P8203A has an SSEXTR pin to select different deviations
depending upon the value of an external resistor connected between
SSEXTR and GND.
P3P8203A operates with 3.3 V 0.3 V supply and is available in an
8 Pin, WDFN (2 mm X 2 mm) Package, over a temperature range of
0°C to +70°C.
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MARKING
DIAGRAM
1
WDFN8
CASE 511AQ
GJ MG
G
1
GJ = Specific Device Code
M
= Date Code
G
= Pb−Free Device
(*Note: Microdot may be in either location)
Features
• 1x, LVCMOS Peak EMI Reduction
• Supports non-continuous input clock applications
• Input / output frequency range: 18 MHz − 36 MHz
• Analog Deviation Selection
PIN CONFIGURATION
V
DD
XIN/CLKIN
XOUT
NC
1
2
3
4
8
7
6
5
• Supply Voltage: 3.3 V 0.3 V
• 8 pin, WDFN (2 mm X 2 mm) package
• Operating Temperature range: 0°C to +70°C
SSEXTR
NC
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
ModOUT
GND
Application
• P3P8203A is targeted for use in a broad range of note book and
desktop PCs and consumer electronic applications.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
VDD
XIN/CLKIN
Digital
Frequency
Modulation
Crystal
Oscillator
ModOUT
XOUT
Analog Deviation
Control
SSEXTR
GND
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2012
1
Publication Order Number:
August, 2012 − Rev. 0
P3P8203A/D
P3P8203A
Table 1. PIN DESCRIPTION
Pin #
Pin Name
XIN/CLKIN
XOUT
Type
Description
Crystal connection or External reference clock input.
1
2
3
4
5
6
7
8
Input
Output Crystal connection. If using an external reference, this pin should be left open.
NC
No connection
Power Ground
GND
ModOUT
NC
Output Buffered Modulated Clock output.
No connection
SSEXTR
VDD
Input
Analog Deviation Selection through external resistor to GND.
Power Supply Voltage
Table 2. OPERATING CONDITIONS
Symbol
Description
Min
3.0
0
Max
3.6
70
15
7
Unit
V
V
DD
Supply Voltage
T
Operating Temperature (Ambient Temperature)
Load Capacitance
°C
pF
pF
A
C
L
C
Input Capacitance
IN
Table 3. ABSOLUTE MAXIMUM RATING
Symbol
Description
Rating
Unit
V
V
V
Voltage on any input pin with respect to Ground
Storage temperature
−0.5 to +4.6
DD, IN
T
−65 to +125
°C
°C
°C
KV
STG
T
Max. Soldering Temperature (10 sec)
Junction Temperature
260
150
2
s
T
J
T
DV
Static Discharge Voltage (As per JEDEC STD22−A114−B)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may
affect device reliability.
Table 4. ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Supply Voltage
Test Conditions
Min
Typ
Max
3.6
Unit
V
V
DD
3.0
3.3
V
Input LOW Voltage
Input HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
0.35 *
DD
V
IL
V
V
IH
0.65 *
DD
V
V
V
V
V
I
= 8 mA
0.25 *
OL
OH
CC
OL
V
DD
V
I
= -8 mA
0.75 *
OH
V
DD
I
I
Static Supply Current
CLKIN pulled LOW
1
5
6
8
mA
mA
Dynamic Supply Current
Unloaded output
18 MHz
24 MHz
36 MHz
DD
C
Load Capacitance
Output Impedance
15
pF
L
Z
0
24
W
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2
P3P8203A
Table 5. SWITCHING CHARACTERISTICS
Parameter
Test Conditions
Min
18
Typ
Max
36
Unit
Input Clock Frequency
MHz
ModOUT
18
36
Output Rise Time (Notes 1 and 2)
Output fall Time (Notes 1 and 2)
Output Duty Cycle (Notes 1 and 2)
Measured between 20% to 80%
Measured between 80% to 20%
1.0
1.0
50
1.6
1.6
55
nS
nS
%
Measured at 50%
(with Input Duty Cycle of 50%)
45
Cycle-to-Cycle Jitter (Note 2)
Unloaded output with SSEXTR pin OPEN
100
20
pS
%
Part-Part Frequency Deviation Variation
1. All parameters are measured with 15pF load on ModOUT.
2. Parameter is guaranteed by design and characterization. Not tested in production.
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3
P3P8203A
SWITCHING WAVEFORMS
80%
20%
80%
20%
OUTPUT
t
3
t
4
Figure 2. Output Rise/Fall Time
t
1
t
2
50%
50%
OUTPUT
Figure 3. Duty Cycle Timing
R
Rx
C
Crystal
C
L
L
Figure 4. Typical Crystal Interface Circuit
C = 2*(C − C ),
L
P
S
Where C = Load capacitance of crystal specified in a Crystal Datasheet
P
C
= Stray capacitance due to CIN, PCB, Trace etc
S
C =Load capacitance to be used
L
Rx is used to reduce power dissipation in the Crystal
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4
P3P8203A
0.060
0.055
0.050
0.045
0.040
0.035
0.030
5
5.5
6
6.5
7
RESISTANCE (kW)
Figure 5. Deviation vs. SSEXTR (@ 27 MHz)
(NOTE: Parameter is guaranteed by design and characterization. Not tested in production.)
VDDIN
R
C1
0.1 mF
C2
2.2 mF
C
is the load capacitance for proper
XTAL operation
L
8
VDD
1
Rs
XIN/C LKIN
C
L
ModOUT Cloc k
Y1
ModOUT
5
2
C
XOUT
L
SSEXTR
7
Analog D eviation C ontrol
R1
P3P8203A
3, 6
NC
4
GND
Note: Refer Pin Description table for Functionality details
Figure 6. Typical Application Circuit
Rs = Trace Impedance of PCB − Output Impedance of Device (Z0)
ORDERING INFORMATION
†
Ordering Code
P3P8203AMTTBG
Marking
Temperature
Package Type
Shipping
GJ
0°C to +70°C
8−pin (2 mm x 2 mm) WDFN
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb−Free.
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5
P3P8203A
PACKAGE DIMENSIONS
WDFN8 2x2, 0.5P
CASE 511AQ
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30mm FROM TERMINAL.
D
A
B
L
L
L1
PIN ONE
DETAIL A
MILLIMETERS
REFERENCE
2X
E
OPTIONAL
DIM
A
MIN
0.70
0.00
MAX
0.80
0.05
CONSTRUCTIONS
0.10
C
A1
A3
b
0.20 REF
0.20
0.30
0.10
C
2X
D
2.00 BSC
EXPOSED Cu
MOLD CMPD
TOP VIEW
E
2.00 BSC
0.50 BSC
e
L
0.50
---
0.60
0.15
A3
DETAIL B
L1
0.05
C
C
DETAIL B
OPTIONAL
A
8X
CONSTRUCTION
RECOMMENDED
0.05
SOLDERING FOOTPRINT*
A1
SEATING
PLANE
C
7X
SIDE VIEW
0.78
PACKAGE
OUTLINE
DETAIL A
1
8X L
4
2.30
0.88
1
0.50
PITCH
8
5
8X
0.35
8X b
e/2
e
0.10
C
A
B
DIMENSIONS: MILLIMETERS
NOTE 3
0.05
C
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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PUBLICATION ORDERING INFORMATION
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USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
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Email: orderlit@onsemi.com
For additional information, please contact your local
Sales Representative
P3P8203A/D
相关型号：
P3PSL450AHG-08CR
Peak Emi Reduction IC, Low Voltage, Timing-Safe™, WDFN8 2x2, 0.5P, 3000-REEL
ONSEMI
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