STK541UC60C-E [ONSEMI]

智能功率模块 (IPM),600V,10A;
STK541UC60C-E
型号: STK541UC60C-E
厂家: ONSEMI    ONSEMI
描述:

智能功率模块 (IPM),600V,10A

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www.onsemi.com  
onsemi andꢀꢀꢀꢀꢀꢀꢀand other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or  
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STK541UC60C-E  
Intelligent Power Module (IPM)  
600 V, 10 A  
Overview  
www.onsemi.com  
This “Inverter IPM” is highly integrated device containing all High  
Voltage (HV) control from HV-DC to 3-phase outputs in a single SIP  
module (Single-In line Package). Output stage uses IGBT / FRD  
technology and implements Under Voltage Protection (UVP) and Over  
Current Protection (OCP) with a Fault Detection output flag. Internal  
Boost diodes are provided for high side gate boost drive.  
Function  
Single control power supply due to Internal bootstrap circuit for high  
side pre-driver circuit  
All control input and status output are at low voltage levels directly  
compatible with microcontrollers  
Built-in cross conduction prevention  
Certification  
UL Recognized (File Number : E339285)  
Specifications  
Absolute Maximum Ratings at Tc = 25C  
Parameter  
Symbol  
Conditions  
P to N, surge < 500 V  
Ratings  
Unit  
V
Supply voltage  
V
V
*1  
450  
600  
CC  
CE  
Collector-emitter voltage  
Output current  
P to U,V,W or U,V,W to N  
V
P, N, U,V,W terminal current  
±10  
A
Io  
P, N, U,V,W terminal current at Tc = 100C  
P, N, U,V,W terminal current for a Pulse width of 1ms  
±5  
A
Output peak current  
Pre-driver voltage  
Iop  
±20  
A
VD1, 2, 3, 4 VB1 to U, VB2 to V, VB3 to W, V  
to V  
*2  
20  
V
DD  
SS  
Input signal voltage  
VIN  
VFAULT  
Pd  
HIN1, 2, 3, LIN1, 2, 3  
FAULT terminal  
IGBT per channel  
IGBT,FRD  
0.3 to 7  
V
FAULT terminal voltage  
Maximum power dissipation  
Junction temperature  
Storage temperature  
Operating substrate temperature  
Tightening torque  
0.3 to V  
22  
V
DD  
W
Tj  
150  
C  
C  
C  
Nm  
VRMS  
Tstg  
Tc  
40 to +125  
40 to +100  
0.9  
IPM case temperature  
Case mounting screws  
50 Hz sine wave AC 1 minute  
*3  
*4  
Isolation Voltage  
Vis  
2000  
Reference voltage is “V ” terminal voltage unless otherwise specified.  
SS  
*1 : Surge voltage developed by the switching operation due to the wiring inductance between “P” and “N” terminal.  
*2 : VD1 = VB1 to U, VD2 = VB2 to V, VD3 = VB3 to W, VD4 = V  
to V  
terminal voltage.  
DD  
SS  
*3 : Flatness of the heat-sink should be less than 0.15 mm.  
*4 : Test conditions : AC 2500 V, 1 second.  
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,  
damage may occur and reliability may be affected.  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 12 of this data sheet.  
© Semiconductor Components Industries, LLC, 2016  
December 2016 - Rev. 2  
1
Publication Order Number :  
STK541UC60C-E/D  
STK541UC60C-E  
Electrical Characteristics at Tc 25C, VD1, VD2, VD3, VD4 = 15 V  
Test  
Parameter  
Symbol  
Conditions  
min  
typ  
max  
Unit  
circuit  
Power output section  
Collector-emitter cut-off current  
Bootstrap diode reverse current  
I
V
= 600 V  
CE  
mA  
mA  
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1  
0.1  
2.3  
2.6  
-
CE  
IR(BD)  
Fig.1  
Fig.2  
VR(BD)  
-
Ic = 10 A  
Upper side  
1.4  
1.7  
1.3  
1.5  
1.3  
1.6  
1.2  
1.4  
-
Collector to emitter  
saturation voltage  
Tj = 25C  
Lower side *1  
Upper side  
V
V
(SAT)  
V
CE  
Ic = 5 A  
Tj = 100C  
Lower side *1  
Upper side  
-
IF = 10 A  
2.2  
2.5  
-
Tj = 25C  
Lower side *1  
Upper side  
Diode forward voltage  
Fig.3  
Fig.4  
V
F
IF = 5 A  
Tj = 100C  
Lower side *1  
-
Junction to case  
θj-c(T)  
θj-c(D)  
IGBT  
FRD  
5.5  
6.5  
C/W  
thermal resistance  
-
Control (Pre-driver) section  
VD1, 2, 3 = 15 V  
VD4 = 15 V  
-
-
0.08  
1.6  
-
0.4  
4.0  
-
Pre-driver power dissipation  
ID  
mA  
High level Input voltage  
Low level Input voltage  
Vin H  
Vin L  
2.5  
-
V
V
HIN1, HIN2, HIN3,  
-
0.8  
-
LIN1, LIN2, LIN3 to V  
SS  
Input threshold voltage hysteresis Vinth(hys)  
0.5  
76  
97  
-
0.8  
118  
150  
2
V
Logic 0 input leakage current  
Logic 1 input leakage current  
FAULT terminal sink current  
FAULT clear time  
IIN+  
VIN = +3.3 V  
VIN = 0 V  
160  
203  
-
A  
A  
mA  
ms  
IIN-  
IoSD  
FAULT : ON/VFAULT = 0.1 V  
Fault output latch time  
FLTCLR  
VCCUP VSUP  
6
9
12  
V
and V undervoltage  
S
CC  
positive going threshold  
and V undervoltage  
10.5  
10.3  
0.14  
11.1  
10.9  
0.2  
11.7  
11.5  
-
V
V
V
V
VCCUN VSUN  
CC  
negative going threshold  
and V undervoltage  
S
V
VCCUVH  
VSUVH-  
ISD  
CC  
S
hysteresis  
Over current protection level  
PW = 100 μs  
Fig.5  
10  
-
17  
A
V
Output level for current monitor  
ISO  
Io = 10 A  
0.30  
0.33  
0.36  
Reference voltage is “V ” terminal voltage unless otherwise specified.  
SS  
*1 : The lower side’s V (SAT) and VF include a loss by the shunt resistance  
CE  
Electrical Characteristics at Tc 25C, VD1, VD2, VD3, VD4 = 15 V, V  
= 300 V, L = 3.9 mH  
CC  
Test  
Parameter  
Symbol  
Conditions  
min  
typ  
max  
Unit  
circuit  
Fig.6  
Fig.6  
Switching Character  
tON  
0.3  
0.6  
1.0  
1.3  
Switching time  
Io = 10 A  
Io = 5 A  
s  
tOFF  
-
-
-
-
-
-
-
-
-
1.8  
Turn-on switching loss  
J  
J  
J  
J  
J  
J  
Eon  
Eoff  
Etot  
240  
220  
460  
300  
260  
560  
17  
-
-
-
-
-
-
-
-
Turn-off switching loss  
Total switching loss  
Turn-on switching loss  
Eon  
Turn-off switching loss  
Eoff  
Io = 5 A, Tc = 100C  
Fig.6  
Total switching loss  
Etot  
Diode reverse recovery energy  
Diode reverse recovery time  
Reverse bias safe operating area  
Short circuit safe operating area  
Erec  
trr  
J  
IF = 5 A, P = 400 V,  
Tc = 100C  
ns  
62  
RBSOA  
SCSOA  
Io = 20 A, V  
= 450 V  
Full square  
-
CE  
= 400 V, Tc = 100C  
V
s  
4
-
CE  
Reference voltage is “V ” terminal voltage unless otherwise specified.  
SS  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be  
indicated by the Electrical Characteristics if operated under different conditions.  
www.onsemi.com  
2
STK541UC60C-E  
Notes  
1. The pre-drive power supply low voltage protection has approximately 0.2 V of hysteresis and operates as follows.  
Upper side : The gate is turned off and will return to regular operation when recovering to the normal voltage, but the latch will  
continue till the input signal will turn ‘high’.  
Lower side : The gate is turned off and will automatically reset when recovering to normal voltage. It does not depend on input  
signal voltage.  
2. The pre-drive low voltage protection is the feature to protect devices when the pre-driver supply voltage falls due to an operating  
malfunction.  
www.onsemi.com  
3
STK541UC60C-E  
Equivalent Block Diagram  
VB1(8)  
U(9)  
VB2(5)  
V(6)  
VB3(2)  
W(3)  
P(11)  
U.V.  
U.V.  
U.V.  
Shunt Resistor  
N (13)  
Level  
Shifter  
Level  
Level  
Shifter  
Shifter  
HIN1(14)  
HIN2(15)  
HIN3(16)  
LIN1(17)  
LIN2(18)  
LIN3(19)  
FAULT(20)  
Logic  
Logic  
Logic  
Latch Time About 9ms  
( Automatic Reset )  
ISO(21)  
Latch  
Over-Current  
VDD-Under Voltage  
VDD(22)  
VSS(23)  
www.onsemi.com  
4
STK541UC60C-E  
Module Pin-Out Description  
Pin  
Name  
Description  
1
2
Without Pin  
VB3  
High Side Floating Supply Voltage 3  
Output 3 - High Side Floating Supply Offset Voltage  
Without Pin  
3
W,VS3  
4
5
VB2  
High Side Floating Supply voltage 2  
Output 2 - High Side Floating Supply Offset Voltage  
Without Pin  
6
V,VS2  
7
8
VB1  
High Side Floating Supply voltage 1  
Output 1 - High Side Floating Supply Offset Voltage  
Without Pin  
9
U,VS1  
10  
11  
12  
13  
P
Positive Bus Input Voltage  
Without Pin  
N
Negative Bus Input Voltage  
14 HIN1  
15 HIN2  
16 HIN3  
17 LIN1  
18 LIN2  
19 LIN3  
20 FAULT  
21 ISO  
Logic Input High Side Gate Driver - Phase U  
Logic Input High Side Gate Driver - Phase V  
Logic Input High Side Gate Driver - Phase W  
Logic Input Low Side Gate Driver - Phase U  
Logic Input Low Side Gate Driver - Phase V  
Logic Input Low Side Gate Driver - Phase W  
Fault output  
Current monitor output  
22 VDD  
23 VSS  
+15 V Main Supply  
Negative Main Supply  
www.onsemi.com  
5
STK541UC60C-E  
Test Circuit  
The tested phase U+ shows the upper side of the U phase and Ushows the lower side of the U phase.  
I  
/ IR(BD)  
CE  
ICE  
VD1=15V  
VD2=15V  
VD3=15V  
VD4=15V  
U+  
11  
9
V+  
11  
6
W+  
11  
3
U-  
9
V-  
6
W-  
3
M
N
13  
13  
13  
VCE  
U(BD)  
8
V(BD)  
5
W(BD)  
M
N
2
23  
23  
23  
Fig.1  
V (SAT) (test by pulse)  
CE  
VD1=15V  
VD2=15V  
VD3=15V  
VD4=15V  
U+  
11  
9
V+  
11  
6
W+  
11  
3
U-  
9
V-  
6
W-  
3
M
N
Ic  
13  
17  
13  
18  
13  
19  
VCE(SAT)  
m
14  
15  
16  
Fig.2  
V (test by pulse)  
F
U+  
V+  
11  
6
W+  
11  
3
U-  
9
V-  
6
W-  
3
VF  
IF  
M
N
11  
9
13  
13  
13  
Fig.3  
ID  
VD1  
8
VD2  
5
VD3  
2
VD4  
22  
ID  
M
N
VD*  
9
6
3
23  
Fig.4  
www.onsemi.com  
6
STK541UC60C-E  
ISD  
VD1=15V  
Input signal  
(0 to 5 V)  
VD2=15V  
VD3=15V  
Io  
VD4=15V  
Io  
ISD  
Input signal  
100 μs  
Fig.5  
Switching time (The circuit is a representative example of the lower side U phase.)  
VD1=15V  
Input signal  
(0 to 5 V)  
VD2=15V  
VCC  
CS  
90%  
VD3=15V  
Io  
VD4=15V  
Io  
10%  
Input signal  
tON  
tOFF  
Fig.6  
www.onsemi.com  
7
STK541UC60C-E  
Input / Output Timing Chart  
VBS undervoltage protection reset signal  
OFF  
HIN1,2,3  
ON  
LIN1,2,3  
VDD  
VDD undervoltage protection reset voltage  
*2  
VBS undervoltage protection reset voltage  
*3  
VB1,2,3  
*4  
-------------------------------------------------------ISD operation current level----------------------------------------------------  
N terminal  
(BUS line)  
Current  
FAULT terminal  
Voltage  
(at pulled-up)  
ON  
*1  
*1  
Upper  
U, V, W  
OFF  
Lower  
U ,V, W  
Automatically reset after protection  
(typ.9ms)  
Fig.7  
Notes  
*1 : Diagram shows the prevention of shoot-through via control logic. More deadtime to account for switching delay needs to be added  
externally.  
*2 : If lower V  
drops all gate output signals will go low and cut off all of 6 IGBT outputs. part. When V rises the operation will resume  
DD  
DD  
immediately.  
*3 : When the upper side gate voltage at VB1, VB2 and VB3 drops only the corresponding upper side output is turned off. The outputs  
return to normal operation immediately after the upper side gat voltage rises.  
*4 : In case of over current detection all IGBT’s are turned off and the FAULT output is asserted. Normal operation resumes in 6 to 12 ms  
after the over current condition is removed.  
www.onsemi.com  
8
STK541UC60C-E  
Logic level table  
P(11)  
INPUT  
OUTPUT  
Upper  
IGBT  
Upper Lower  
HIN  
LIN  
OCP  
U,V,W  
FAULT  
IGBT  
OFF  
ON  
IGBT  
HIN1,2,3  
(14,15,16)  
H
L
L
OFF  
OFF  
ON  
N
P
OFF  
OFF  
IC  
Driver  
U,V,W  
(9,6,3)  
H
OFF  
High  
Impedance  
LIN1,2,3  
(17,18,19)  
L
H
X
L
H
X
OFF  
OFF  
ON  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
OFF  
ON  
High  
Impedance  
Lower  
IGBT  
High  
Impedance  
N(13)  
Fig. 8  
Sample Application Circuit  
STK541UC60C-E  
2 3  
5 6  
8 9  
11  
13 14 15 16 17 18 19 20 21 22 23  
CB  
CB  
CB  
CS  
CD  
V
=15V  
Control Logic  
DD  
V
CC  
CI  
Fig. 9  
Recommended Operating Conditions at Ta = 25C  
Item  
Supply voltage  
Symbol  
Conditions  
min  
typ  
max  
Unit  
V
V
P to N  
VB1 to U,VB2 to V,VB3 to W  
0
12.5  
13.5  
1
280  
450  
17.5  
16.5  
20  
CC  
VD1,2,3  
VD4  
fPWM  
DT  
15  
15  
-
Pre-driver supply voltage  
V
V
to V  
*1  
DD  
SS  
PWM frequency  
kHz  
μs  
Dead time  
Turn-off to turn-on  
ON and OFF  
2
-
-
Allowable input pulse width  
Tightening torque  
PWIN  
1
-
-
μs  
‘M3’ type screw  
0.6  
-
0.9  
Nm  
*1 : Pre-drive power supply (VD4 = 15 ±1.5 V) must have the capacity of Io = 20 mA (DC), 0.5A (Peak).  
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended  
Operating Ranges limits may affect device reliability.  
www.onsemi.com  
9
STK541UC60C-E  
Usage Precaution  
1. This IPM includes bootstrap diode and resistors. Therefore, by adding a capacitor “CB”, a high side drive voltage is generated; each  
phase requires an individual bootstrap capacitor. The recommended value of CB is in the range of 1 to 47 μF, however this value  
needs to be verified prior to production. If selecting the capacitance more than 47 μF (±20%), connect a resistor (about 20 ) in series  
between each 3-phase upper side power supply terminals (VB1, 2, 3) and each bootstrap capacitor.  
When not using the bootstrap circuit, each upper side pre-drive power supply requires an external independent power supply.  
2. It is essential that wiring length between terminals in the snubber circuit be kept as short as possible to reduce the effect of surge  
voltages. Recommended value of “CS” is in the range of 0.1 to 10 μF.  
3. ISO” (pin 21) is terminal for current monitor. High current may flow into that course when short-circuiting the “ISO” terminal and “V  
SS  
terminal. Please do not connect them.  
4. FAULT” (pin 20) is open DRAIN output terminal (Active Low). Pull up resistor is recommended more than 6.8 k.  
5. Pull up resistor of 100 kis provided internally at the signal input terminals.  
6. The over-current protection feature is not intended to protect in exceptional fault condition. An external fuse is recommended for  
safety.  
7. When input pulse width is less than 1.0 μs, an output may not react to the pulse (Both ON signal and OFF signal).  
This data shows the example of the application circuit, does not guarantee a design as the mass production set.  
The characteristic of PWM switching frequency  
Fig. 10 Maximum sinusoidal phase current as function of switching frequency  
at Tc = 100C, V = 400 V  
CC  
www.onsemi.com  
10  
STK541UC60C-E  
CB capacitor value calculation for bootstrap circuit  
Calculate conditions  
Parameter  
Symbol  
VBS  
Value  
15  
Unit  
V
Upper side power supply  
Total gate charge of output power IGBT at 15 V  
Upper limit power supply low voltage protection  
Upper side power dissipation  
QG  
89  
12  
400  
-
nC  
V
UVLO  
IDMAX  
TONMAX  
μA  
s
ON time required for CB voltage to fall from 15V to UVLO  
Capacitance calculation formula  
Thus, the following formula are true  
VBS CB QG IDMAX TONMAX = UVLO CB  
therefore,  
CB = (QG + IDMAX TONMAX) / (VBS UVLO)  
The relationship between TONMAX and CB becomes as follows. CB is recommended to be approximately 3 times the value calculated  
above. The recommended value of CB is in the range of 1 to 47 μF, however, this value needs to be verified prior to production.  
CB vs Tonmax  
100  
10  
1
0.1  
0.01  
0.1  
1
10  
100  
1000  
Tonmax [ms]  
Fig. 11 Tonmax - CB characteristic  
www.onsemi.com  
11  
STK541UC60C-E  
PACKAGE DIMENSIONS  
unit : mm  
The tolerances of length are +/0.5 mm unless otherwise specified.  
missing pin : 1, 4, 7, 10, 12  
note2  
note3  
4DB00  
23  
1
note1  
note 1 : Mark for No.1 pin identification.  
note 2 : The form of a character in this  
drawing differs from that of IPM.  
note 3 : This indicates the lot code.  
The form of a character in this  
drawing differs from that of IPM.  
ORDERING INFORMATION  
Device  
Package  
Shipping (Qty / Packing)  
8 / Tube  
SIP23 56x21.8  
(Pb-Free)  
STK541UC60C-E  
ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries  
in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other  
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use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is  
responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or  
standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON  
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12  

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STK5431SL

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STK5434

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STK5441

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STK544UC62K-E

Intelligent Power Module (IPM), 600 V, 10 A
ONSEMI

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3-Output Series Regulator for VTR Use
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STK5486

STK5486
ETC