PI6C20800VEX [PERICOM]
PLL Based Clock Driver, PI6 Series, 16 True Output(s), 0 Inverted Output(s), PDSO48, 0.300 INCH, GREEN, MO-118AA, SSOP-48;
| 型号： | PI6C20800VEX |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | PLL Based Clock Driver, PI6 Series, 16 True Output(s), 0 Inverted Output(s), PDSO48, 0.300 INCH, GREEN, MO-118AA, SSOP-48 时钟驱动器 PC |
| 文件： | 总10页 (文件大小：397K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
Features
Description
• Eight Pairs of Differential Clocks
PI6C20800 is a high-speed, low-noise differential clock buffer
designed to be a companion to PI6C410B. The device distributes
the differential SRC clock from PI6C410B to eight differential
pairs of clock outputs either with or without PLL. The input
SRC clock can be divided by 2 when SRC_DIV# is LOW. The
clock outputs are controlled by input selection of SRC_STOP#,
PWRDWN# and SMBus, SCLK and SDA. When input of either
SRC_STOP# or PWRDWN# is LOW, the output clocks are
Tristated. When PWRDWN# is LOW, the SDA and SCLK inputs
must be Tristated.
• Low skew < 50ps
• Low Cycle-to-cycle jitter < 50ps
• Output Enable for all outputs
• Outputs Tristate control via SMBus
• Power Management Control
• Programmable PLL Bandwidth
• PLL or Fanout operation
• 3.3V Operation
• Packaging (Pb-Free & Green):
— 48-Pin SSOP (V)
— 48-Pin TSSOP (A)
Block Diagram
Pin Configuration
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
SRC_DIV#
VDD
VDD_A
VSS_A
IREF
LOCK
OE_7
1
2
VSS
SRC
3
OE_INV
4
OE [0:7]
SRC_STOP#
PWRDWN#
Output
Control
SRC#
OE_0
OE_3
OUT0
OUT0#
VSS
5
OUT0
OUT0
OE_4
6
#
#
#
#
OUT7
OUT7#
OE_INV
VDD
OUT6
OUT6#
OE_6
7
OUT0
OUT1
8
SCLK
SDA
SMBus
Controller
9
OUT2
OUT2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
VDD
PLL/BYPASS#
SRC_DIV#
OUT3
OUT3
OUT1
OUT1#
OE_1
OE_2
OUT2
OUT2#
VSS
OUT4
OUT4#
SRC
SRC#
OE_5
OUT5
OUT5#
VSS
OUT5
OUT5#
OUT6
OUT6#
DIV
VDD
PLL_BW#
PLL
OUT7
OUT7#
VDD
OUT4
OUT4#
PLL_BW#
SRC_STOP
PWRDWN#
VSS
OUT3
OUT3#
PLL/BYPASS#
SCLK
SDA
LOCK
PS8746C
02/01/06
1
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
Pin Descriptions
Pin Name
Type
Input
Input
Input
Pin #
1
Descriptions
3.3V LVTTL input for selecting input frequency divide by 2,
active LOW.
SRC_DIV#
SRC & SRC#
OE [0:7]
4, 5
0.7V Differential SRC input from PI6C410 clock synthesizer
6, 7, 14, 15, 35, 36,
43, 44
3.3V LVTTL input for enabling outputs, active HIGH.
3.3V LVTTL input for inverting the OE, SRC_STOP# and
PWRDWN# pins.
When 0 = same stage
OE_INV
Input
40
When 1 = OE[0:7], SRC_STOP#, PWRDWN# inverted.
8, 9, 12, 13, 16 17,
OUT[0:7] & OUT[0:7]# Output 20, 21, 29, 30, 33, 34, 0.7V Differential outputs
37, 38, 41, 42
PLL/BYPASS#
SCLK
Input
Input
I/O
22
23
24
46
27
28
26
3.3V LVTTL input for selecting fan-out of PLL operation.
SMBus compatible SCLOCK input
SDA
SMBus compatible SDATA
I
Input
Input
Input
Input
External resistor connection to set the differential output current
3.3V LVTTL input for SRC stop, active LOW
3.3V LVTTL input for selecting the PLL bandwidth
3.3V LVTTL input for Power Down operation, active LOW
REF
SRC_STOP#
PLL_BW#
PWRDWN#
3.3V LVTTL output, transition high when PLL lock is achieved
(Latched output)
LOCK
Output
45
V
V
V
V
Power
Ground
Ground
Power
2, 11, 19, 31, 39
3.3V Power Supply for Outputs
Ground for Outputs
DD
3, 10, 18, 25, 32
SS
47
48
Ground for PLL
SS_A
DD_A
3.3V Power Supply for PLL
Serial Data Interface (SMBus)
PI6C20800 is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit
address and read/write bit as shown below.
Address assignment
A6
A5
A4
A3
A2
A1
A0
R/W
1
1
0
1
1
1
0
0/1
(1)
Data Protocol
1 bit
7 bits
1
1
8 bits
1
8 bits
1
8 bits
1
8 bits
Data
1
1 bit
Byte
Count
= N
Start
bit
Slave
Addr
Register
offset
Data
Byte 0
Stop
bit
R/W Ack
Ack
Ack
Ack Byte N Ack
- 1
Note:
1. Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0.
PS8746C
02/01/06
2
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
Data Byte 0: Control Register
Bit
Descriptions
Type
Power Up Condition
Output(s) Affected
Pin
SRC_DIV#
0
0 = Divide by 2
1 = Normal
RW
1 = x1
OUT[0:7], OUT[0:7]#
OUT[0:7], OUT[0:7]#
OUT[0:7], OUT[0:7]#
NA
PLL/BYPASS#
0 = Fanout
1 = PLL
1
2
RW
RW
1 = PLL
1 = Low
NA
NA
PLL Bandwidth
0 = HIGH Bandwidth,
1 = LOW Bandwidth
3
4
5
TBD
TBD
TBD
NA
NA
NA
SRC_STOP#
6
7
0 = Driven when stopped
1 = Tristate
RW
RW
0 = Driven when stopped
0 = Driven when stopped
OUT[0:7], OUT[0:7]#
OUT[0:7], OUT[0:7]#
PWRDWN#
0 = Driven when stopped
1 = Tristate
NA
Data Byte 1: Control Register
Bit
Descriptions
Type
RW
RW
RW
RW
RW
RW
RW
RW
Power Up Condition
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
1 = Enabled
Output(s) Affected
OUT0, OUT0#
OUT1, OUT1#
OUT2, OUT2#
OUT3, OUT3#
OUT4, OUT4#
OUT5, OUT5#
OUT6, OUT6#
OUT7, OUT7#
Pin
NA
NA
NA
NA
NA
NA
NA
NA
0
1
2
OUTPUTS enable
1 = Enabled
3
4
0 = Disabled
5
6
7
PS8746C
02/01/06
3
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
Data Byte 2: Control Register
Bit
Descriptions
Type
RW
RW
RW
RW
RW
RW
RW
RW
Power Up Condition
0 = Free running
0 = Free running
0 = Free running
0 = Free running
0 = Free running
0 = Free running
0 = Free running
0 = Free running
Output(s) Affected
Pin
NA
NA
NA
NA
NA
NA
NA
NA
0
OUT0, OUT0#
OUT1, OUT1#
OUT2, OUT2#
OUT3, OUT3#
OUT4, OUT4#
OUT5, OUT5#
OUT6, OUT6#
OUT7, OUT7#
1
2
Allow control of OUTPUTS with
assertion of SRC_STOP#
0 = Free running
3
4
1 = Stopped with SRC_Stop#
5
6
7
Data Byte 3: Control Register
Bit
Descriptions
Type
RW
RW
RW
RW
RW
RW
RW
RW
Power Up Condition
Output(s) Affected
Pin
0
1
2
3
TBD
4
5
6
7
Data Byte 4: Pericom ID Register
Bit
Descriptions
Type
R
Power Up Condition
Output(s) Affected
Pin
NA
NA
NA
NA
NA
NA
NA
NA
0
0
0
0
0
0
1
0
0
NA
NA
NA
NA
NA
NA
NA
NA
1
R
2
R
3
R
Pericom ID
4
R
5
R
6
R
7
R
PS8746C
02/01/06
4
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
Functionality
PWRDWN#
OUT
OUT#
Normal
LOW
SRC_Stop#
OUT
OUT#
1
0
Normal
1
0
Normal
Normal
I
× 2 or Float
I
× 6 or Float
REF
LOW
REF
Power Down (PWRDWN# assertion)
PWRDWN#
OUT
OUT#
Figure 1. Power down sequence
Power Down (PWRDWN# De-assertion)
Tstable
<1ms
PWRDWN#
OUT
OUT#
Tdrive_PwrDwn#
<300us, >200mV
Figure 2. Power down de-assert sequence
PS8746C
02/01/06
5
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
Current-mode output buffer characteristics of OUT[0:7], OUT[0:7]#
VDD
(3.3V ± 5%)
Slope ~ 1/Rs
RO
IOUT
ROS
Iout
VOUT = 0.85V max
0V
0.85V
Figure 9. Simplified diagram of current-mode output buffer
Differential Clock Buffer characteristics
Symbol
Minimum
3000Ω
Maximum
N/A
R
O
R
unspecified
N/A
unspecified
850mV
OS
V
OUT
Current Accuracy
Symbol
Conditions
V = 3.30 ±5%
DD
Configuration
Load
Min.
Max.
R
= 475Ω 1%
= 2.32mA
Nominal test load for given
configuration
-12%
+12%
REF
I
OUT
I
I
I
REF
NOMINAL
NOMINAL
Note:
1. INOMINAL refers to the expected current based on the configuration of the device.
Differential Clock Output Current
Board Target Trace/Term Z
Reference R, Iref = V /(3xRr)
Output Current
= 6 x I
V
@ Z
DD
OH
100Ω
R
REF
= 475Ω 1%,
= 2.32mA
I
0.7V @ 50
OH
REF
(100Ω differential ≈ 15% coupling ratio)
I
REF
PS8746C
02/01/06
6
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
(1)
Absolute Maximum Ratings (Over operating free-air temperature range)
Symbol Parameters
Min.
-0.5
-0.5
Max.
4.6
Units
V
3.3V Core Supply Voltage
3.3V I/O Supply Voltage
Input HIGH Voltage
Input LOW Voltage
Storage Temperature
ESD Protection
DD_A
V
4.6
DD
V
V
4.6
IH
V
-0.5
-65
IL
Ts
150
°C
V
V
2000
ESD
Note:
1. Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
DC Electrical Characteristics (V = 3.3±5%, V
= 3.3±5%)
DD
DD_A
Symbol
Parameters
Condition
Min.
3.135
3.135
2.0
Max.
Units
V
3.3V Core Supply Voltage
3.3V I/O Supply Voltage
3.3V Input HIGH Voltage
3.3V Input LOW Voltage
Input Leakage Current
3.3V Output HIGH Voltage
3.3V Output LOW Voltage
3.465
3.465
DD_A
V
DD
V
V
V
V
+ 0.3
DD
IH
DD
V
V
– 0.3
SS
0.8
IL
I
0 < V < V
DD
-5
+5
μA
V
IK
IN
V
I
= -1mA
OH
2.4
12.2
1.5
OH
V
I
= 1mA
OL
0.4
OL
I
I
= 6 x I
,
OH
REF
I
Output HIGH Current
mA
OH
= 2.32mA
REF
15.6
5
C
Logic Input Pin Capacitance
Output Pin Capacitance
Pin Inductance
IN
pF
C
6
OUT
L
PIN
7
nH
I
Power Supply Current
Power Down Current
Power Down Current
Ambient Temperature
V
= 3.465V, F
= 200MHz
CPU
250
60
12
70
DD
DD
I
Driven outputs
Tristate outputs
mA
°C
SS
SS
I
T
0
A
PS8746C
02/01/06
7
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
(1,2,3)
AC Switching Characteristics
(V = 3.3±5%, V
= 3.3±5%)
DD
DD_A
Symbol
Parameters
Min
Max.
Units Notes
T
rise
/ T
Rise and Fall Time (measured between 0.175V to 0.525V)
175
700
2
fall
ps
ΔT
ΔT
/
rise
Rise and Fall Time Variation
125
2
fall
T
Output-to-Output Skew
Voltage HIGH
50
ps
3
2
skew
V
660
850
1150
HIGH
V
Max. Voltage
OVS
UDS
LOW
V
Min. Voltage
-300
-150
250
mV
V
Voltage LOW
+150
550
140
55
2
2
2
3
V
Absolute crossing poing voltages
cross
ΔV
Total Variation of V
Duty Cycle
over all edges
cross
cross
T
45
%
ps
DC
Jitter, Cycle-to-cycle (PLL Mode, Measurement for differential
waveform)
T
50
jcyc-cyc
Jitter, Cycle-to-cycle (BYPASS mode as additive jitter)
Notes:
1. Test configuration is RS = 33.2Ω, Rp = 49.9Ω, and 2pF.
2. Measurement taken from Single Ended waveform.
3. Measurement taken from Differential waveform.
Configuration Test Load Board Termination
Rs
33Ω
5%
OUT
TLA
TLB
Rs
33Ω
5%
PI6C20800
OUT#
2pF
5%
2pF
5%
Rp
49.9Ω
1%
Rp
49.9Ω
1%
475Ω
1%
PS8746C
02/01/06
8
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
Packaging Mechanical: 48-Pin SSOP (V)
48
.395
.420
10.03
10.67
.291
.299
7.39
7.59
Gauge Plane
.010
0.25
.02
.04
0.51
1.01
1
.620
.630
15.75
16.00
0.381
0.635
.015
.025
x 45˚
.008
0.20
Nom.
.110 2.79 Max
.008 0.20
.0135 0.34
.025 BSC
0.635
.008 0.20
.016 0.40
0-8˚
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
Packaging Mechanical: 48-Pin TSSOP (A)
48
.236
.244
6.0
6.2
1
.488 12.4
.496 12.6
.047
1.20 Max
SEATING PLANE
0.09
0.20
.004
.008
0.45 .018
0.75 .030
.002
.006
0.05
0.15
.007
.010
.0197
BSC
.319
BSC
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
0.50
0.17
0.27
8.1
PS8746C
02/01/06
9
PI6C20800
1:8 Clock Driver for Intel
PCI Express Chipsets
(1,2)
Ordering Information
Ordering Code
PI6C20800VE
PI6C20800AE
Notes:
Package Code
Package Description
VE
AE
48-pin, 300-mil wide, SSOP, Pb-Free and Green
48-pin, 240-mil wide, TSSOP, Pb-Free and Green
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
2. E = Pb-free and Green
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
PS8746C
02/01/06
10
相关型号：
PI6C21900SZDE
PLL Based Clock Driver, 6C Series, 19 True Output(s), 0 Inverted Output(s), GREEN, MO-220I/VNND, TQFN-72
PERICOM
PI6C21900SZDEX
PLL Based Clock Driver, 6C Series, 19 True Output(s), 0 Inverted Output(s), GREEN, MO-220I/VNND, TQFN-72
PERICOM
PI6C21900ZDE
PLL Based Clock Driver, 6C Series, 19 True Output(s), 0 Inverted Output(s), GREEN, MO-220I/VNND, TQFN-72
PERICOM
PI6C21900ZDEX
PLL Based Clock Driver, 6C Series, 19 True Output(s), 0 Inverted Output(s), GREEN, MO-220I/VNND, TQFN-72
PERICOM
©2020 ICPDF网 联系我们和版权申明