ISL54004IRTZ [RENESAS]
Integrated Audio Amplifier Systems; TQFN20; Temp Range: -40° to 85°C;
| 型号： | ISL54004IRTZ |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Integrated Audio Amplifier Systems; TQFN20; Temp Range: -40° to 85°C 放大器 商用集成电路 |
| 文件： | 总13页 (文件大小：595K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL54004
Integrated Audio Amplifier Systems
FN6513
Rev 2.00
October 30, 2007
, 2007
The Intersil ISL54004 device is an integrated audio power
amplifier system that combines a mono BTL amplifier and
stereo headphone amplifiers in a single device. It can operate
from a single +2.7V to +5V power supply and is offered in a
20 Ld 4x4 TQFN package. Targeted applications include
handheld equipment such as cell-phones, MP3 players, and
games/toys.
Features
• Class AB 94mW Headphone Amplifiers and 941mW Mono
BTL Speaker Amplifier
• THD+N at 1kHz, 800mW into 8 BTL. . . . . . . . . . . . . . 0.4%
• THD+N at 1kHz, 15mW into 32 Headphone . . . . . . 0.07%
• THD+N at 1kHz, 50mW into 32 Headphone . . . . . . . 0.3%
• Single Supply Operation. . . . . . . . . . . . . . . . . +2.7V to +5.5V
• Headphone Sense Input and Low Power Shutdown
• Thermal Shutdown Protection
The ISL54004 part contains one class AB BTL type power
amplifier for driving an 8 mono speaker and two class AB
headphone amplifiers for driving 16 or 32 headphone
speakers.
The BTL when using a 5V supply is capable of delivering
800mW (typ) with 0.4% THD+N and 941mW (typ) with 1%
THD+N of continuous average power into an 8BTL speaker
load.
• “Click and Pop” Suppression Circuitry
• Selectable Gain Settings
• TTL Logic-Compatible
Each headphone amplifier when using a 5V supply is capable
of delivering 50mW (typ) with 0.3% THD+N and 94mW (typ)
with 1% THD+N of continuous average power into a 32
headphone speaker.
• Available in 20 Ld 4x4 TQFN
• Pb-Free (RoHS Compliant)
Applications
When in Mono mode the part automatically mixes the left and
right audio inputs and sends the combined signal to the BTL
driver. In Headphone Mode, the active right channel input is
sent to the right headphone speaker and the active left
channel is sent to the left headphone speaker.
• Battery-powered, Handheld, and Portable Equipment
- Cellular/mobile Phones
- PDA’s, MP3 Players, DVD Players, Cameras
- Laptops, Notebooks, Palmtops
- Handheld Games and Toys
The ISL54004 has a four-level programmable gain stage to
boost the audio signal. The part requires no external gain
setting resistors.
• Desktop Computers
Simplified Block Diagram
The ISL54004 part features headphone sense input circuitry
that detects when a headphone jack has been inserted and
automatically switches the audio inputs from the mono BTL
output driver to the headphone drivers. The part also has a
logic control pin that can override the headphone sense
input circuitry.
V
DD
R
L
GAIN
ROUTER/
SWITCHER
The part also features low power shutdown, thermal
overload protection and click and pop suppression. The click
and pop circuitry prevents click and pops at the speakers
when transitioning in and out of shutdown.
CLICK
AND
POP
BIAS
SD
THERMAL
SHUTDOWN
GS0
GS1
HO
LOGIC
CONTROL
ISL54004
FN6513 Rev 2.00
October 30, 2007
Page 1 of 13
ISL54004
Pinout
Pin Descriptions
ISL54004
(20 LD 4X4 TQFN)
TOP VIEW
PIN
NAME
VDD
GND
INL
FUNCTION
3, 6, 12
System Power Supply
4, 9, 20
Ground Connection
11
17
5
Left Channel Audio Input 1
Right Channel Audio Input 1
Headphone Right Ouput
Headphone Left Ouput
20 19
18
17
16
INR
SPK-
HO
SD
1
2
3
4
5
15
14
13
12
11
HpR
HpL
SPK+
VDD
GND
HpR
7
NC
2
SPK+ Positive Speaker Output
SPK- Negative Speaker Output
1
VDD
INL
14
SD
Shutdown, High to disable amplifiers, Low
for normal operation.
8
HD
Headphone Detection, Internally pulled up to
6
7
8
9
10
V
Low in Mono Mode, High in
DD,
Headphone Mode if HO = Low
15
HO
Headphone Override, High in Mono Mode,
Low in Headphone Mode if HD = High
Ordering Information
16, 18
10
GS_
REF
Gain Select
TEMP.
Common-mode Bias Voltage, By-pass with a
1µF capacitor to GND.
PART
NUMBER
PART
MARKING
RANGE
(°C)
PKG.
DWG. #
PACKAGE
13, 19
NC
No Connect
ISL54004IRTZ* 540 04IRTZ -40 to +85 20 Ld 4x4 TQFN L20.4x4A
(Note)
Tape and Reel
(Pb-free)
ISL54004 Truth Table
SD GS1 GS0 HD HO
SPK+/SPK-
HpR
HpL
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
1
0
0
0
0
0
0
0
0
0
0
0
0
X
0
0
0
0
0
0
1
1
1
1
1
1
X
0
0
0
1
1
1
0
0
0
1
1
1
X
0
1
1
0
1
1
0
1
1
0
1
1
X
X
0
1
X
0
1
X
0
1
X
0
1
Disabled
IN + IN
Disabled Disabled
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach materials
and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which
is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
-
IN
-
-
IN
-
R
L
-
R
L
IN + IN
R
L
1.2 x (IN + IN )
-
-
R
L
-
1.2 x IN 1.2 x IN
R L
1.2 x (IN + IN )
-
-
R
L
2 x (IN + IN )
-
-
R
L
-
2 x IN
2 x IN
R
R
L
2 x (IN + IN )
-
-
R
L
4 x (IN + IN )
-
4 x IN
-
-
4 x IN
-
R
L
-
L
4 x (IN + IN )
R
L
FN6513 Rev 2.00
October 30, 2007
Page 2 of 13
ISL54004
Absolute Maximum Ratings
Thermal Information
VDD to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
Input Voltages
Thermal Resistance (Typical, Note 1, 2)
20 Ld 4x4 TQFN Package . . . . . . . . . .
(°C/W)
45
(°C/W)
6.5
JA
JC
InR, InL, SD, HD, HO, GSO, GS1. . . . . . . -0.3V to (VDD + 0.3V)
Output Voltages
SPK+, SPK-, HpL, HpR . . . . . . . . . . . . . . -0.3V to (VDD + 0.3V)
Continuous Current (VDD, SPK_, Hp_, GND) . . . . . . . . . . . 750mA
ESD Rating
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >200kV
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >1kV
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
JA
Tech Brief TB379.
2. For , the “case temp” location is the center of the exposed metal pad on the package underside.
JC
Electrical Specifications - 5V Supply
Test Conditions: V
= +5V, GND = 0V, V
= 2.4V, V
INL
= 0.8V, SD = GSO = GS1 = V ,
INL
DD
INH
C
= 1µF, R is terminated between SPK+ and SPK- for BTL driver and between Hp_ and
REF
L
GND for SE drivers, Unless Otherwise Specified (Note 3).
TEMP MIN
MAX
PARAMETER
GENERAL
TEST CONDITIONS
(°C) (Notes 4, 5) TYP (Notes 4, 5) UNITS
Power Supply Range, V
Full
25
2.7
-
5.5
12
-
V
DD
Quiescent Supply Current, I
HO = V
coupled to GND (0.1µF)
or V
, HD = V , R = NoneInputs AC
INL
-
-
-
-
4.6
5.5
28
31
mA
mA
mA
mA
DD
SD
INL
INH
L
Full
25
Shutdown Supply Current, I
SD = V
INH
, HO = V
or V
, HD = V , R = 8
INH INL
50
-
INL
L
BTLand R = 32SEInputs AC coupled to GND
(0.1µF)
L
Full
Input Resistance, R
INS = 0V or V
25
25
-
100
150
10
1
-
k
°C
°C
ms
dB
IN
DD
Thermal Shutdown, T
INS = MIX = 0V or V
-
-
-
SD
Thermal Shutdown Hysteresis
DD
25
-
-
SD to Full Operation, t
Gain Selection Range
Full
25
-
SD(ON)
Input referred minimum gain
GS0 = GS1 = V = 32
SE Amplifiers
-0.4
0
0.6
R
HD = V
HO = V
INL,
Input referred maximum gain
GS0 = GS1 = V = 32
L
INH
INL
25
25
25
11.4
5.2
12
6
12.6
6.6
dB
dB
dB
R
INH,
Input referred minimum gain
GS0 = GS1 = V = 8
L
BTL Amplifier
R
HD = V
HO = V
INL,
Input referred maximum gain
GS0 = GS1 = V = 8
L
INH
INH
17.2
18
18.6
R
INH,
L
BTL AMPLIFIER DRIVER, HD = V
HO = V
INH,
UNLESS OTHERWISE SPECIFIED
INH,
Output Offset Voltage, V
Measured between SPK+ and SPK-, Inputs AC
coupled to GND (0.1µF)
25
Full
25
-
-
-
-
38
49
49
47
-
-
-
-
mV
mV
dB
OS
Power Supply Rejection Ratio, PSRR
V
= 200MV
,
F
F
= 217Hz
= 1kHz
RIPPLE
P-P
RIPPLE
HD = V , RL = 8Inputs AC
coupled to GND (0.1µF)
INL
25
dB
RIPPLE
Output Power, P
OUT
R
R
= 8, THD+N = 1%, f = 1kHz
25
25
-
-
941
-
-
mW
W
L
= 8, THD+N = 10%, f = 1kHz
1.23
L
FN6513 Rev 2.00
October 30, 2007
Page 3 of 13
ISL54004
Electrical Specifications - 5V Supply
Test Conditions: V
= +5V, GND = 0V, V
= 2.4V, V
= 0.8V, SD = GSO = GS1 = V
,
INL
DD
INH
INL
C
= 1µF, R is terminated between SPK+ and SPK- for BTL driver and between Hp_ and
REF
L
GND for SE drivers, Unless Otherwise Specified (Note 3). (Continued)
TEMP MIN
MAX
PARAMETER
TEST CONDITIONS
(°C) (Notes 4, 5) TYP (Notes 4, 5) UNITS
Total Harmonic Distortion + Noise,
THD+N
R
R
R
R
= 8, P
= 8, P
= 8, V
= 8 P
= 800mW, f = 1kHz
25
25
25
25
25
25
-
0.4
0.7
7.7
85
-
-
-
-
-
-
%
%
L
L
L
L
OUT
= 800mW, f = 20Hz to 20kHz
-
OUT
Max Output Voltage Swing, V
Signal to Noise Ratio, SNR
= 5V , f = 1kHz
P-P
7.2
V
P-P
OUT
SIGNAL
= 900mW, f = 1kHz
-
-
-
dB
mV
OUT
Output Noise, N
Crosstalk
A - Weight filter, BW = 22Hz to 22kHz
140
80
OUT
RMS
R
= 8P = 800mW, f = 1kHz, Signal coupled
dB
L
OUT
R
to L , L
CH CH
to R
CH
from the input of active amplifier to the output of an
CH
adjacent amplifier with its input AC coupled to GND.
Off-Isolation
SD = V
P
= 800mW, f = 10kHz, Signal
25
-
130
-
dB
DD, OUT
coupled from input to output of a disabled amplifier.
SINGLE ENDED AMPLIFIER DRIVERS, HD = V HO = V UNLESS OTHERWISE SPECIFIED
INH,
INL,
Power Supply Rejection Ratio, PSRR
V
= 200MV
,
F
F
= 217Hz
= 1kHz
25
25
-
-
48
47
-
-
dB
dB
RIPPLE
P-P
RIPPLE
RIPPLE
HD = 0V, R = 32Input AC
coupled to GND (0.1µF)
L
Output Power, P
OUT
R
R
R
R
R
R
R
R
R
R
= 16, THD+N = 1%, f = 1kHz
25
25
25
25
25
25
25
25
25
25
-
170
94
-
-
-
-
-
-
-
-
-
-
mW
mW
mW
mW
%
L
L
L
L
L
L
L
L
L
L
= 32, THD+N = 1%, f = 1kHz
= 16, THD+N = 10%, f = 1kHz
= 32, THD+N = 10%, f = 1kHz
-
-
215
116
0.07
0.09
0.3
-
Total Harmonic Distortion + Noise,
THD+N
= 32, P
= 32, P
= 32, P
= 32, P
= 32, V
= 32, P
= 15mW, f = 1kHz
-
OUT
= 15mW, f = 20Hz to 20kHz
= 50mW, f = 1kHz
-
%
OUT
-
-
%
OUT
= 50mW, f = 20Hz to 20kHz
0.4
%
OUT
Max Output Voltage Swing, V
Crosstalk
= 5V , f = 1kHz
P-P
3.6
-
4.7
V
OUT
SIGNAL
P-P
= 15mW, f = 1kHz
75
dB
OUT
R
to L , L
CH CH
to R
CH
CH
Off-Isolation
SD = V
R
= 32W, P
= 15mW, f = 10kHz
25
25
25
-
-
-
120
83
-
-
-
dB
dB
dB
DD,
L
OUT
Signal to Noise Ratio, SNR
Channel Gain Matching
R
R
= 32, P
= 50mW, f = 1kHz
L
L
OUT
= 32, VINR = VINL = 1.3V
(Connect to the
(Connect to the
±0.2
RMS
R
to L
CH
same source)
CH
Channel Phase Matching
to L
R
= 32, VINR = VINL = 1.3V
25
-
1.3
-
°
L
RMS
R
same source)
CH
CH
LOGIC INPUT
Input Leakage Current, I , I
,
V
= 5V, SD = 0V, INS = 0V, GSx = 0V, HD = 0V,
25
Full
25
-3
-
1.9
1.9
0.02
0.02
-
3
-
µA
µA
µA
µA
V
SD HD
DD
HO = 0V
I
I
GSx, HO
Input Leakage Current, I , I
,
V
= 5V, SD = V , INS = V , GSx = V
DD DD
,
DD
-1
-
1
SD GSx
DD
I
, I
HD HO
HD = V , HO = V
DD DD
Full
Full
Full
-
V
V
2.4
-
-
INH
INL
-
0.8
V
FN6513 Rev 2.00
October 30, 2007
Page 4 of 13
ISL54004
Electrical Specifications - 3.6V Supply Test Conditions: V = +3.6V, GND = 0V, V
= 1.4V. V
INL
= 0.4V, SD = GSO = GS1 = V ,
INL
DD
INH
C
= 1µF, R is terminated between SPK+ and SPK- for BTL driver and between Hp_ and
REF
GND for SE drivers, Unless Otherwise Specified (Note 3)
L
TEMP MIN
(°C) (Notes 4, 5)
MAX
(Notes 4, 5) UNITS
PARAMETER
GENERAL
Quiescent Supply Current, I
TEST CONDITIONS
TYP
HO = V
or V
, HD = V , RL = NoneInput AC
INH INL
25
Full
25
-
-
-
-
2.7
3
12
-
mA
mA
mA
mA
DD
INL
coupled to GND (0.1µF)
Shutdown Supply Current, I
SD = V
, HO = V
INH
or V
, HD = V , R = 8
INH INL
13
15
50
-
SD
INL
L
BTLand R = 32SEInput AC coupled to GND
L
Full
(0.1µF)
BTL AMPLIFIER DRIVER, HD = V
HO = V
UNLESS OTHERWISE SPECIFIED
INH,
INH,
Output Offset Voltage, V
Measured between SPK+ and SPK-, Input AC
coupled to GND (0.1µF)
25
Full
25
-
-
-
-
25
40
49
47
-
-
-
-
mV
mV
dB
OS
Power Supply Rejection Ratio, PSRR
V
= 200mV
F
F
= 217Hz
= 1kHz
RIPPLE
P-P
RIPPLE
HD = 0V, R = 8Input AC
coupled to GND (0.1µF)
L
25
dB
RIPPLE
Output Power, P
OUT
R
R
R
R
R
= 8, THD+N = 1%, f = 1kHz
= 8, THD+N =10%, f = 1kHz
25
25
25
25
25
-
-
-
-
-
310
528
0.4
0.4
5.8
-
-
-
-
-
mW
mW
%
L
L
L
L
L
Total Harmonic Distortion + Noise,
THD+N
= 8, P
= 8, P
= 8, V
= 200mW, f = 1kHz
OUT
= 200mW, f = 20Hz to 20kHz
%
OUT
Max Output Voltage Swing, V
OUT
= 3.6V , f = 1kHz
P-P
V
P-P
SIGNAL
SINGLE ENDED AMPLIFIER DRIVERS, HD = V
HO = V UNLESS OTHERWISE SPECIFIED
INL,
INH,
Power Supply Rejection Ratio, PSRR
V
= 200MV
,
F
= 217Hz
= 1kHz
25
25
-
-
48
47
-
-
dB
dB
RIPPLE
P-P
RIPPLE
RIPPLE
HD = 0V, R = 32Input AC
coupled to GND (0.1µF)
L
F
Output Power, P
OUT
R
R
R
R
R
R
R
= 16, THD+N =1%, f = 1kHz
= 32, THD+N =1%, f = 1kHz
25
25
25
25
25
25
25
-
-
-
-
-
-
-
80
47
-
-
-
-
-
-
-
mW
mW
mW
mW
%
L
L
L
L
L
L
L
= 16, THD+N = 10%, f = 1kHz
= 32, THD+N = 10%, f =1kHz
107
58
Total Harmonic Distortion + Noise,
THD+N
= 32, P
= 32, P
= 32, V
= 15mW, f = 1kHz
0.15
0.15
3.2
OUT
= 15mW, f = 20Hz to 20kHz
%
OUT
Max Output Voltage Swing, V
= 3.6V , f = 1kHz
P-P
V
P-P
OUT
SIGNAL
LOGIC INPUT
Input Leakage Current, I , I
,
,
V
V
= 3.6V, SD = 0V, GSx = 0V, HD = 0V , HO = 0V,
25
Full
25
-
1.9
1.9
0.02
0.02
-
-
µA
µA
µA
µA
V
SD GSx
DD
I
, I
HD HO
-
-
Input Leakage Current, I , I
SD GSx
= 3.6V, SD = V , GSx = V , HD = V
DD DD
,
-
-
-
-
DD
DD
I
, I
HO = V
HD HO
DD
Full
Full
Full
V
V
1.4
-
-
INH
INL
-
0.4
V
NOTES:
3. V = input voltage to perform proper function.
IN
4. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
5. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested
FN6513 Rev 2.00
October 30, 2007
Page 5 of 13
ISL54004
ISL54004 Typical Application Circuit and Block Diagram
0.1µF
V
DD
SPK+
SPK-
HpR
0.22µF
0.22µF
IN
IN
R
L
BTL
RIGHT AUDIO
LEFT AUDIO
100k
GAIN
ROUTER/
SWITCHER
SE
SE
HD
HpL
HEADPHONE JACK
V
DD
10k
BIAS
CLICK
AND
POP
THERMAL
PROTECTION
C
REF
REF
SD
1µF
HO
MICRO
CONTROLLER
LOGIC CONTROL
GSO
GS1
GND
signal to the BTL driver. In Headphone Mode the right channel
input is sent to the right headphone speaker and the left
channel is sent to the left headphone speaker.
Detailed Description
The Intersil ISL54004 device is an integrated audio power
amplifier system designed to provide quality audio, while
requiring minimal external components. Low 0.4% THD+N
ensures clean, low distortion amplification of the audio
signals. It is designed to operate from a single +2.7V to +5V
power supply. It is offered in a 20 Ld 4x4 TQFN package.
Targeted applications include battery powered equipment
such as cell-phones, MP3 players, and games/toys.
The ISL54004 features headphone sense input circuitry that
detects when a headphone jack has been inserted and
automatically switches the audio inputs from the mono BTL
output driver to the headphone drivers. It also has a logic
control pin (HO) that can override the sense input circuitry.
The ISL54004 has a four-level programmable gain stage to
boost the audio signal. The part requires no external gain
setting resistors. When GSO = GS1 = Low a driver will have a
gain of 1V/V (0dB). When GSO = High, GS1 = Low a driver
will have a gain of 1.2V/V (1.5dB). When GSO = Low,
GS1 = High a driver will have a gain of 2V/V (6dB). When
GSO = High, GS1 = High a driver will have a gain of 4V/V
(12dB). When the speaker is connected across the SPK+
terminal and SPK- terminal of the mono BTL driver you get an
additional gain of 2V/V (6dB) due to the BTL configuration.
The overall gain will be 2 times the values discussed above.
For example with GS1 = GS0 = High the overall gain will be
2 x 4 = 8V/V (18dB).
The ISL54004 part contains one class AB BTL type power
amplifier for driving an 8mono speaker and two class AB
single-ended (SE) type amplifiers for driving 16 or 32
headphones.
The BTL when using a 5V supply is capable of delivering
800mW (typ) with 0.4% THD+N and 941mW (typ) with 1%
THD+N of continuous average power into a stereo 8BTL
speaker load. When the speaker load is connected across
the positive and negative terminals of the BTL driver the
voltage is doubled across the load and the power is
quadrupled.
Each SE amplifier when using a 5V supply is capable of
delivering 15mW (typ) with 0.07% THD+N and 50mW (typ)
with 0.3% THD+N of continuous average power into a 32
headphone speaker.
The part features low power shutdown, thermal overload
protection and click and pop suppression. The click and pop
circuitry prevents click and pops at the speakers when
transitioning in and out of shutdown.
When in Mono Mode (BTL driver active) the part automatically
mixes the left and right audio inputs and sends the combined
FN6513 Rev 2.00
October 30, 2007
Page 6 of 13
ISL54004
The “Typical Application Circuit and Block Diagram” for this
device is provided on page 6. The “Truth Table” for the device
is provided on page 2.
its differential connection, a capacitor is required at the output
of each SE drivers to remove this DC voltage from the
headphone load.
This coupling capacitor along with the resistance of the
speaker load creates a high pass filter that sets the amplifier’s
lower bandpass frequency limit. The value of this AC coupling
capacitor depends on the low frequency range required for the
application. The formula required to calculate the capacitor
value is shown in Equation 2:
DC Bias Voltage
The ISL54004 has internal DC bias circuitry which DC offsets
the incoming audio signal at V /2. When using a 5V supply,
the DC offset will be 2.5V. When using a 3.6V supply the DC
offset will be 1.8V.
DD
1
Since the signal gets biased internally at V /2 the audio
DD
--------------------------------------------------------------
(EQ. 2)
C
6.28fRspeaker
signals need to be AC coupled to the inputs of the device. The
value of the AC coupling capacitor depends on the low
frequency range required for the application. A capacitor of
0.22µF will pass a signal as low as 7.2Hz. The formula
required to calculate the capacitor value is shown in Equation
1:
For an application driving a 32 headphone with a lower
frequency requirement of 150Hz the required capacitor value is
shown in Equation 3:
1
------------------------------------------------
(EQ. 3)
C
= 33F
6.2815032
1
----------------------------------------------
(EQ. 1)
C
6.28f100k
Use the closest standard value.
The 100k is the impedance looking into the input of the
ISL54004 device.
Headphone Sense Function
With a logic “1” at the HP control pin while the HO control pin is
low will activate the headphone drivers and disable the BTL
driver.
BTL Speaker Amplifier
The ISL54004 contains one bridge-tied load (BTL) amplifier
designed to drive an 8 speaker load differentially. The output
to the BTL amplifier are SPK+ and SPK-. The speaker load
gets connected across these terminals.
The “ISL54004 Typical Application Circuit and Block Diagram”
on page 6 shows the implementation of the headphone control
function using a common headphone jack.
The HP pin gets connected to the mechanical wiper blade of
the headphone jack. Two external resistors are required for
proper operation. A 100k pull-up resistor from the HP pin to
VDD and a 10k pull-down resistor from the jack’s audio signal
pin to GND of the jack signal pin to which the wiper is
connected. See “ISL54004 Typical Application Circuit and
Block Diagram” on page 6.
A single BTL driver consists of an inverting and non-inverting
power op amps. The AC signal out of each op amp are equal in
magnitude but 180° out-of-phase, so the AC signal at SPK+
and SPK- have the same amplitude but are 180° out-of-phase.
Driving the load differentially using a BTL configuration
doubles the output voltage across the speaker load and
quadruples the power to the load. In effect you get a gain of
two due to this configuration at the load as compared to driving
the load with a single-ended amplifier with its load connected
between a single amplifier’s output and GND.
When no headphone plug is inserted into the jack the voltage
at the HP pin gets set at a low voltage level due to the 10k
resistor and 100k resistor divider network connection to V
.
DD
When a headphone is inserted into the jack the 10k resistor
The outputs of the BTL are biased at V /2. When the load
DD
gets disconnected from the HP control pin and the HP pin gets
gets connected across the + and - terminal of the BTL the mid
supply DC bias voltage at each output gets cancelled out
eliminating the need for large bulky output coupling capacitors.
pulled up to V . Since the HP pin is now high the headphone
DD
drivers are activated.
A microprocessor or a switch can be used to drive the HP pin
rather than using the headphone jack contact pin.
Headphone (Single-Ended) Amplifiers
The ISL54004 contains two single-ended (SE) headphone
amplifiers for driving the left and right channels of a 32 or
16 headphone speakers.
Note: With a logic “1” at the HO pin the BTL driver remains
active regardless of the voltage level at the HD pin. This allows
a headphone to be plugged into the headphone jack without
activating the HP drivers. Music will continue to play through
the internal 8 speaker rather than the headphones.
One SE amplifier drives the right speaker of the headphone
and other SE amplifier drives the left speaker of the
headphone. The speaker load gets connected between the
output of the amplifier and ground.
Low Power Shutdown
With a logic “1” at the SD control pin the device enters the low
power shutdown state. When in shutdown the BTL and
The audio signal at the output of each SE driver is biased at
V
/2 and unlike the BTL driver that cancels this offset due to
DD
FN6513 Rev 2.00
October 30, 2007
Page 7 of 13
ISL54004
headphone amplifiers go into an high impedance state and I
supply current is reduced to 26µA (typ).
Best thermal performance is achieved with the largest practical
copper ground plane area.
DD
In shutdown mode before the amplifiers enter the high
impedance/low current drive state, the bias voltage of V /2
remains connected at the output of the amplifiers through a
PCB Layout Considerations and Power
Supply Bypassing
DD
To maintain the highest load dissipation and widest output
voltage swing the power supply PCB traces and the traces that
connect the output of the drivers to the speaker loads should
be made as wide as possible to minimize losses due to
parasitic trace resistance.
100k resistor.
This resistor is not present during active operation of the
drivers but gets switched in when the SD pin goes high. It gets
removed when the SD pin goes low.
Leaving the DC bias voltage connected through a 100k
resistor while going into and out of shutdown reduces the
transient at the speakers to a small level preventing clicking or
popping in the speakers.
Proper supply bypassing is necessary for high power supply
rejection and low noise performance. A filter network
consisting of a 10µF capacitor in parallel with a 0.1µF capacitor
is recommended at the voltage regulator that is providing the
power to the ISL54004 IC.
Note: When the SD pin is High it overrides all other logic pins.
Local bypass capacitors of 0.1µF should be put at each V
DD
QFN Die Attach Paddle Considerations
pin of the ISL54004 device. They should be located as close
as possible to the pin, keeping the length of leads and traces
as short as possible.
The QFN package features an exposed thermal pad on its
underside. This pad lowers the package’s thermal resistance
by providing a direct heat conduction path from the die to the
PCB. Connect the exposed thermal pad to GND by using a
large copper pad and multiple vias to the GND plane. The vias
should be plugged and tented with plating and solder mask to
ensure good thermal conductivity.
A 1µF capacitor from the REF pin (pin 10) to GND is needed
for optimum PSRR and internal bias voltage stability.
Typical Performance Curves T = +25°C, Unless Otherwise Specified
A
1.0
0.9
0.8
1.0
0.9
0.8
0.7
0.6
V
= 5V
V
= 3.6V
DD
BTL
DD
BTL
0.7
0.6
R
= 8
= 200mW
L
R
= 8
= 800mW
L
P
O
P
O
0.5
0.4
0.5
0.4
0.3
0.2
0.3
0.2
0.1
20
0.1
50
100
200
500
1k
2k
5k
10k
20k
20
50
100 200
500 1k
2k
5k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 2. THD+N vs FREQUENCY
FIGURE 1. THD+N vs FREQUENCY
FN6513 Rev 2.00
October 30, 2007
Page 8 of 13
ISL54004
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
10.0
10.0
V
= 5V
V
= 3.6V
DD
BTL
= 8
DD
BTL
= 8
5.00
5.00
R
R
L
L
f = 1kHz
f = 1kHz
2.00
1.00
0.50
2.00
1.00
0.50
0.20
0.10
0.05
0.20
0.10
0.05
0.02
0.01
0.02
0.01
10m
20m
50m
100m
200m
500m
1
10m
20m
40m
70m
100m
200m
600m
OUTPUT POWER (W)
OUTPUT POWER (W)
FIGURE 3. THD+N vs OUTPUT POWER
FIGURE 4. THD+N vs OUTPUT POWER
0.40
0.30
0.20
V
= 3.6V
DD
SE
V
= 5V
DD
SE
R
= 32
L
R
= 32
L
0.20
P
= 15mW
O
P
= 15mW
0.10
0.09
0.08
O
0.07
0.06
0.10
0.05
0.04
0.05
0.04
0.03
0.02
0.03
0.02
0.01
0.01
20
50
100 200
500 1k
2k
5k
10k 20k
20
50
100 200
500 1k
2k
5k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 6. THD+N vs FREQUENCY
FIGURE 5. THD+N vs FREQUENCY
1.0
0.9
0.8
1.0
0.9
0.8
V
= 5V
V
= 5V
DD
DD
SE
L
SE
R
0.7
0.7
R
= 32
= 16
L
0.6
0.6
P
= 50mW
O
P
= 50mW
O
0.5
0.4
0.5
0.4
0.3
0.2
0.3
0.2
0.1
0.1
20
50
100 200
500 1k
2k
5k
10k 20k
20
50
100 200
500 1k
2k
5k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 7. THD+N vs FREQUENCY
FIGURE 8. THD+N vs FREQUENCY
FN6513 Rev 2.00
October 30, 2007
Page 9 of 13
ISL54004
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
1.00
1.00
V
= 3.6V
DD
SE
V
= 3.6V
DD
SE
0.50
0.50
R
= 32
L
R
= 16
L
P
= 30mW
O
P
= 60mW
O
0.20
0.10
0.05
0.20
0.10
0.05
0.02
0.01
0.02
0.01
20
50
100 200
500 1k
2k
5k
10k 20k
20
50
100 200 500
1k
2k
5k
10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 9. THD+N vs FREQUENCY
FIGURE 10. THD+N vs FREQUENCY
0.20
0.10
0.09
0.08
V
= 5V
DD
SE
0.07
0.06
R
= 32
L
f = 1kHz
0.10
0.09
0.08
0.07
0.06
0.05
0.04
V
= 5V
DD
SE
L
R
= 16
0.05
f = 1kHz
0.03
0.02
0.04
0.03
0.02
0.01
0.01
2
3
4
5
6
7
8
9 10
20
2
3
4
5
6
7
8
9 10
20
OUTPUT POWER (mW)
OUTPUT POWER (mW)
FIGURE 11. THD+N vs OUTPUT POWER
FIGURE 12. THD+N vs OUTPUT POWER
0.30
0.20
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0.10
0.09
0.08
0.07
0.06
V
= 3.6V
DD
SE
L
R
= 32
f = 1kHz
V
SE
R
= 3.6V
DD
0.05
0.04
= 16
L
f = 1kHz
0.03
0.02
0.01
2
3
4
5
6
7
8
9 10
20
2
3
4
5
6
7
8
9
10
20
OUTPUT POWER (mW)
OUTPUT POWER (mW)
FIGURE 13. THD+N vs OUTPUT POWER
FIGURE 14. THD+N vs OUTPUT POWER
FN6513 Rev 2.00
October 30, 2007
Page 10 of 13
ISL54004
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
10.0
10.0
V
SE
= 5V
V
SE
= 5V
DD
DD
5.00
5.00
R
= 32
R
= 16
L
L
2.00
1.00
0.50
2.00
1.00
0.50
f = 1kHz
f = 1kHz
0.20
0.10
0.05
0.20
0.10
0.05
0.02
0.01
0.02
0.01
10m
20m
30m
50m 70m 100m
200m
10m
20m
30m
40m
50m
70m
100m
OUTPUT POWER (W)
OUTPUT POWER (W)
FIGURE 15. THD+N vs OUTPUT POWER
FIGURE 16. THD+N vs OUTPUT POWER
10.0
5.00
10.0
V
SE
R = 16
f = 1kHz
= 3.6V
DD
V
= 3.6V
DD
SE
5.00
R
= 32
L
L
2.00
1.00
0.50
2.00
1.00
0.50
f = 1kHz
0.20
0.10
0.05
0.20
0.10
0.05
0.02
0.01
0.02
0.01
10m
20m
30m 40m 50m
70m
100m
10m 12m 15m
20m 25m
35m
45m 55m
OUTPUT POWER (W)
OUTPUT POWER (W)
FIGURE 18. THD+N vs OUTPUT POWER
FIGURE 17. THD+N vs OUTPUT POWER
-50
-55
-80
V
P
= 5V
= 15mW
-85
-90
DD
O
-60
-95
-65
-100
-105
-110
-115
-120
-125
-130
-135
-140
-145
-150
-155
-160
INxR TO HPL
INxL TO HPR
-70
-75
-80
-85
HPR AND HPL
BTL
-90
-95
-100
-105
-110
20
50 100 200
500 1k
2k
5k 10k 20k
20
50 100 200
FREQUENCY (Hz)
FIGURE 20. OFF ISOLATION vs FREQUENCY
500 1k
2k
5k 10k 20k
FREQUENCY (Hz)
FIGURE 19. CROSSTALK vs FREQUENCY
FN6513 Rev 2.00
October 30, 2007
Page 11 of 13
ISL54004
Typical Performance Curves T = +25°C, Unless Otherwise Specified (Continued)
A
-20
-22
-24
-26
-28
-30
-32
-34
-36
-38
-40
-42
-44
-46
-48
-50
-52
-54
-56
-58
-60
-62
-64
-66
-68
-70
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
V
= 5V
V
BTL
V
= 5V
DD
DD
SE
V
= 200mV
= 200MV
RIPPLE
P-P
RIPPLE
P-P
HPR
HPL
10 20
50 100 200 500 1k 2k
FREQUENCY (Hz)
5k 10k 20k
10 20
50 100 200
500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
FIGURE 21. PSRR vs FREQUENCY
FIGURE 22. PSRR vs FREQUENCY
700
600
500
400
300
200
100
0
400
350
V
BTL
R
= 5V
DD
V
= 3.6V
DD
BTL
= 8
= 8
L
R
L
300
250
200
150
100
50
0
0
100
200
300
(mW)
400
500
0
250
500
(mW)
750
1000
P
P
OUT
OUT
FIGURE 23. POWER DISSIPATION vs OUTPUT POWER
FIGURE 24. POWER DISSIPATION vs OUTPUT POWER
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
PROCESS:
Submicron CMOS
© Copyright Intersil Americas LLC 2007. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6513 Rev 2.00
October 30, 2007
Page 12 of 13
ISL54004
Thin Quad Flat No-Lead Plastic Package
(TQFN)
Thin Micro Lead FramePlastic Package
(TMLFP)
L20.4x4A
20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220WGGD-1 ISSUE I)
MILLIMETERS
SYMBOL
MIN
NOMINAL
MAX
0.80
0.05
0.80
NOTES
A
A1
A2
A3
b
0.70
0.75
-
-
-
0.02
-
0.55
9
0.20 REF
9
0.18
1.95
1.95
0.25
0.30
2.25
2.25
5, 8
D
4.00 BSC
-
D1
D2
E
3.75 BSC
9
2.10
7, 8
4.00 BSC
-
E1
E2
e
3.75 BSC
9
2.10
7, 8
0.50 BSC
-
k
0.20
0.35
-
0.60
20
5
-
-
L
0.75
8
N
2
Nd
Ne
P
3
5
3
-
-
-
0.60
12
9
-
9
Rev. 0 11/04
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensionsare providedtoassist with PCB LandPattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & are present when
Anvil singulation method is used and not present for saw
singulation.
FN6513 Rev 2.00
October 30, 2007
Page 13 of 13
相关型号：
ISL54006IR
1.23W, 2 CHANNEL, AUDIO AMPLIFIER, PQCC20, 4 X 4 MM, PLASTIC, MO-220WGGD-1, TQFN-20
RENESAS
ISL54047
Ultra Low ON-Resistance, High Off- Isolation, Single Supply, Diff SPST Analog Switch
INTERSIL
ISL54047IRUZ-T
Ultra Low ON-Resistance, High Off- Isolation, Single Supply, Diff SPST Analog Switch
INTERSIL
ISL54048IRUZ-T
Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPST Analog Switch
INTERSIL
©2020 ICPDF网 联系我们和版权申明