R2J20652ANP-G3 [RENESAS]
Integrated Driver - MOS FET (DrMOS); 集成的驱动程序 - MOS场效应管（的DrMOS ）
| 型号： | R2J20652ANP-G3 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Integrated Driver - MOS FET (DrMOS) |
| 文件： | 总17页 (文件大小：157K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary
R2J20652ANP
Integrated Driver – MOS FET (DrMOS)
REJ03G1867-0300
Rev.3.00
Feb 26, 2010
Description
The R2J20652ANP multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver
in a single QFN package. The on and off timing of the power MOS FET is optimized by the built-in driver, making this
device suitable for large-current buck converters. The chip also incorporates a high-side bootstrap switch, eliminating
the need for an external SBD for this purpose.
Features
Based on Intel 6 6 DrMOS specification pin out
Built-in power MOS FET suitable for Notebook, Desktop, Server application
Low-side MOS FET with built-in SBD for lower loss and reduced ringing
Built-in driver circuit which matches the power MOS FET
Built-in tri-state input function which can support a number of PWM controllers
VIN operating-voltage range: 27 V max
High-frequency operation (above 1 MHz) possible
Large average output current (Max. 35 A)
Achieve low power dissipation
Controllable driver: Remote on/off
Low-side MOS FET disabled function for DCM operation
Built-in bootstrapping switch
Small package: QFN40 (6 mm 6 mm 0.95 mm)
Terminal Pb-free/Halogen-free
Outline
Integrated Driver-MOS FET (DrMOS)
QFN40 package 6 mm × 6 mm
VCIN BOOT
MOS FET Driver
CGND
GH
VIN
1
10
40
11
Reg5V
DISBL#
LSDBL#
PWM
Driver
Pad
High-side
MOS Pad
VSWH
Low-side MOS Pad
31
20
30
21
GL PGND
(Bottom view)
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 1 of 16
R2J20652ANP
Preliminary
Block Diagram
Driver Chip
VCIN
Reg5V
BOOT
GH
UVL
Boot
SW
VIN
Reg5V
DISBL#
High Side
MOS FET
2 μA
Supervisor
CGND Reg5V
150 k
Level Shifter
25 k
LSDBL#
PWM
Reg5V
VSWH
Overlap
Protection.
& Logic
Input Logic
(TTL Level)
(3 state in)
Low Side
MOS FET
Reg5V
20 μA
PGND
CGND
GL
Notes: 1. Truth table for the DISBL# pin.
2. Truth table for the LSDBL# pin.
DISBL# Input
"L"
Driver Chip Status
Shutdown (GL, GH = "L")
LSDBL# Input
GL Status
"L"
"L"
"Open"
"H"
Shutdown (GL, GH = "L")
Enable (GL, GH = "Active")
"Open"
"H"
"Active"
"Active"
3. Output signal from the UVL block
For active
"H"
UVL output
Logic Level
For shutdown
"L"
VCIN
VL
VH
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 2 of 16
R2J20652ANP
Preliminary
Pin Arrangement
10
9
8
7
6
5
4
3
2
1
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
VIN
VIN
PWM
DISBL#
Reg5V
CGND
GL
VIN
CGND
VIN
VIN
VSWH
PGND
PGND
PGND
PGND
PGND
VSWH
VSWH
VSWH
VSWH
VSWH
VSWH
21 22 23 24 25 26 27 28 29 30
(Top view)
Note: All die-pads (three pads in total) should be soldered to PCB.
Pin Description
Pin Name
LSDBL#
NC
Pin No.
Description
Low-side gate disable
No connect
Remarks
1
2
3
4
When asserted "L" signal, Low-side gate disable
VCIN
Control input voltage
Bootstrap voltage pin
Control signal ground
High-side gate signal
Input voltage
Driver Vcc input
BOOT
CGND
GH
To be supplied +5 V through internal switch
Should be connected to PGND externally
Pin for Monitor
5, 37, Pad
6
VIN
8 to 14, Pad
VSWH
PGND
GL
7, 15, 29 to 35, Pad Phase output/Switch output
16 to 28
36
Power ground
Low-side gate signal
+5 V logic power supply output
Signal disable
Pin for Monitor
Reg5V
DISBL#
PWM
38
39
Disabled when DISBL# is "L"
5 V logic input
40
PWM drive logic input
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 3 of 16
R2J20652ANP
Preliminary
Absolute Maximum Ratings
(Ta = 25°C)
Item
Symbol
Pt(25)
Rating
Units
Note
Power dissipation
25
W
1
Pt(110)
8
Average output current
Input voltage
Iout
35
A
V
VIN(DC)
VIN(AC)
VSWH(DC)
VSWH(AC)
VBOOT(DC)
VBOOT(AC)
VCIN
–0.3 to +27
2
2, 4, 6
2
30
Switch node voltage
BOOT voltage
27
V
V
30
32
2, 4, 6
2
36
2, 4, 6
2
Supply voltage
PWM voltage
–0.3 to +27
V
V
Vpwm
–0.3 to +5.5 @UVL OFF
–0.3 to +0.3 @UVL ON
–0.3 to Reg5V + 0.3
2, 4
2, 5
2, 7, 8
Other I/O voltage
Vdisbl, Vlsdbl
Vreg5V
Ireg5V
Idisbl
–0.3 to VCIN + 0.3
–0.3 to +6
V
V
2
7
3
3
Reg5V voltage
Reg5V current
–20 to +0.1
0 to 1.0
mA
mA
°C
°C
DISBL# current
Operating junction temperature
Storage temperature
Tj-opr
–40 to +150
–55 to +150
Tstg
Notes: 1. Pt(25) represents a PCB temperature of 25°C, and Pt(110) represents 110C.
2. Rated voltages are relative to voltages on the CGND and PGND pins.
3. For rated current, (+) indicates inflow to the chip and (–) indicates outflow.
4. This rating is when UVL (Under Voltage Lock out) is ineffective (normal operation mode).
5. This rating is when UVL (Under Voltage Lock out) is effective (lock out mode).
6. The specification values indicated "AC" are limited within 100 ns.
7. This rating is when the external power-source is applied to Reg5V pin.
8. Reg5V + 0.3 V < 6 V
Safe Operating Area
45
40
35
30
25
20
VOUT = 1.3 V
15
VIN = 12 V
10
5
VCIN = 12 V
L = 0.45 μH
Fsw = 1 MHz
0
0
25
50
75
100
125
150
175
PCB Temperature (°C)
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 4 of 16
R2J20652ANP
Preliminary
Recommended Operating Condition
Item
Input voltage
Supply voltage
Symbol
VIN
VCIN
Rating
Units
Note
4.5 to 22
V
V
When the usage of VCIN = 4.5 V to 5.5 V,
VCIN should be connected to Reg5V
(Refer to "Pin Connection")
4.5 to 5.5
or
8 to 22
Electrical Characteristics
(Ta = 25C, VCIN = 12 V, VSWH = 0 V, unless otherwise specified)
Item
Symbol
Min
7.0
6.6
—
Typ
7.4
7.0
0.4
34
Max
7.8
7.4
—
Units
Test Conditions
Supply
VCIN start threshold
VCIN shutdown threshold
UVLO hysteresis
VH
V
VL
V
dUVL
ICIN
V
VH – VL
PWM = 1 MHz,
VCIN operating current
—
—
mA
f
Ton_pwm = 120 ns
VCIN disable current
ICIN-DISBL
—
—
2.5
mA
DISBL# = 0 V, PWM = 0 V,
LSDBL# = Open
PWM
input
PWM rising threshold
PWM falling threshold
PWM input resistance
Tri-state shutdown window
Shutdown hold-off time
Output voltage
VH-PWM
VL-PWM
RIN-PWM
VIN-SD
3.0
0.9
3.4
1.2
20
3.8
1.5
40
V
V
10
k
V
PWM = 1 V
VL-PWM
—
—
VH-PWM
—
1
tHOLD-OFF
Vreg
*
100
5.2
0
ns
V
5 V
4.95
–10
–10
0.9
5.45
10
regulator
Line regulation
Vreg-line
mV
mV
V
VCIN = 12 V to 16 V
Ireg = 0 to 10 mA
Load regulation
Vreg-load
VDISBL
0
10
DISBL#
input
Disable threshold
1.2
2.4
20
1.5
2.9
40
Enable threshold
VENBL
1.9
V
Input current
IDISBL
10
A
V
DISBL# = 1 V
LSDBL# = 1 V
LSDBL#
input
Low-side activation threshold
Low-side disable threshold
Input current
VLSDBLH
VLSDBLL
ILSDBL
1.9
2.4
1.2
–28
2.9
1.5
–14
0.9
V
–56
A
Note: 1. Reference values for design. Not 100% tested in production.
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 5 of 16
R2J20652ANP
Preliminary
Typical Application
(1) Desktop/Server Application
+12 V
VCIN
BOOT
DISBL#
Reg5V
VIN
VSWH
R2J20652ANP
PWM
PGND
GL
CGND LSDBL# GH
VCIN
BOOT
+5 V
DISBL#
Reg5V
VIN
VSWH
R2J20652ANP
PWM
PGND
GL
CGND LSDBL# GH
PWM1
PWM2
+1.3 V
PWM
Control
PWM3
Circuit
PWM4
VCIN
BOOT
DISBL#
Reg5V
VIN
Power GND
Signal GND
VSWH
R2J20652ANP
PWM
PGND
GL
CGND LSDBL# GH
VCIN
BOOT
DISBL#
Reg5V
VIN
VSWH
R2J20652ANP
PWM
PGND
GL
CGND LSDBL# GH
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 6 of 16
R2J20652ANP
Preliminary
Typical Application (cont.)
(2) Notebook Application
+19 V
+5 V
VCIN
BOOT
DISBL#
Reg5V
VIN
VSWH
R2J20652ANP
PWM
PGND
GL
CGND LSDBL# GH
VCIN
BOOT
DISBL#
Reg5V
VIN
VSWH
R2J20652ANP
PWM
PGND
GL
CGND LSDBL# GH
PWM1
PWM2
+1.1 V
PWM
Control
PWM3
Circuit
VCIN
BOOT
DISBL#
Reg5V
VIN
Power GND
Signal GND
VSWH
R2J20652ANP
PWM
PGND
GL
CGND LSDBL# GH
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 7 of 16
R2J20652ANP
Preliminary
Pin Connection
(1) Typical Desktop/Server Application
0.1 μF
1.0 μF
CGND
Low Side Disable Signal INPUT
VIN
12 V
CGND
10
9
8
7
6
5
4
3
2
1
10 μF × 4
11
PWM 40
PWM INPUT
12
DSBL# 39
Reg5V 38
CGND 37
GL 36
VSWH 35
34
VIN
PAD
CGND
PAD
13
DSBL# INPUT
PGND
1.0 μF
14 VIN
15 VSWH
R2J20652ANP
16 PGND
17
18
19
20
VSWH
PAD
33
32
31
21 22 23 24 25 26 27 28 29 30
0.45 μH
Power GND Signal GND
PGND
Vout
PGND
(2) Typical Notebook Application
0.1 μF
Low Side Disable Signal INPUT
VIN
19 V
CGND
10
9
8
7
6
5
4
3
2
1
10 μF × 4
11
PWM 40
PWM INPUT
12
DSBL# 39
Reg5V 38
CGND 37
GL 36
VSWH 35
34
VIN
PAD
CGND
PAD
13
PGND
14 VIN
5.0 V
External
1.0 μF
15 VSWH
R2J20652ANP
Power Supply
16 PGND
17
18
19
20
VSWH
PAD
DSBL# INPUT
33
32
31
21 22 23 24 25 26 27 28 29 30
0.45 μH
Power GND Signal GND
PGND
Vout
PGND
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 8 of 16
R2J20652ANP
Preliminary
Test Circuit
IIN
A
A
Vinput
Vcont
VIN
V
ICIN
VCIN
V
VCIN
BOOT
VIN
DISBL#
R2J20652ANP
Reg5V
VSWH
LSDBL#
Electric
load
PWM
5 V pulse
IO
PGND
CGND
GH
GL
Note: PIN = IIN × VIN + ICIN × VCIN
POUT = IO × VO
Average Output Voltage
VO
Averaging
circuit
V
Efficiency = POUT / PIN
PLOSS(DrMOS) = PIN – POUT
Ta = 27°C
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 9 of 16
R2J20652ANP
Preliminary
Typical Data
Power Loss vs. Output Current
VIN = 12 V
VCIN = Reg5V = 5 V
VOUT = 1.3 V
Power Loss vs. Input Voltage
9
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
VCIN = Reg5V = 5 V
VOUT = 1.3 V
PWM = 600 kHz
L = 0.45 μH
IOUT = 25 A
8
7
6
5
4
3
2
1
0
f
f
PWM = 600 kHz
L = 0.45 μH
0
5
10
15
20
25
30
35
4
6
8
10 12 14 16 18 20 22
Input Voltage (V)
Output Current (A)
Power Loss vs. Output Voltage
Power Loss vs. Switching Frequency
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
VIN = 12 V
VCIN = Reg5V = 5 V
PWM = 600 kHz
L = 0.45 μH
IOUT = 25 A
VIN = 12 V
VCIN = Reg5V = 5 V
VOUT = 1.3 V
L = 0.45 μH
f
IOUT = 25 A
0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4
250
500
750
1000
1250
Output Voltage (V)
Switching Frequency (kHz)
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 10 of 16
R2J20652ANP
Preliminary
Power Loss vs. Output Inductance
VIN = 12 V
VCIN = Reg5V = 5 V
VOUT = 1.3 V
Power Loss vs. VCIN
1.5
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
VIN = 12 V
VOUT = 1.3 V
PWM = 600 kHz
L = 0.45 μH
IOUT = 25 A
1.4
1.3
1.2
1.1
1.0
0.9
0.8
f
f
PWM = 600 kHz
IOUT = 25 A
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
4.5
5.0
5.5
6.0
Output Inductance (μH)
VCIN = Reg5V (V)
Average ICIN vs. Switching Frequency
50
VIN = 12 V
VCIN = Reg5V = 5 V
VOUT = 1.3 V
L = 0.45 μH
40
30
20
10
0
IOUT = 0 A
250
500
750
1000
1250
Switching Frequency (kHz)
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 11 of 16
R2J20652ANP
Preliminary
Description of Operation
The DrMOS multi-chip module incorporates a high-side MOS FET, low-side MOS FET, and MOS-FET driver in a
single QFN package. Since the parasitic inductance between each chip is extremely small, the module is highly suitable
for use in buck converters to be operated at high frequencies. The control timing between the high-side MOS FET, low-
side MOS FET, and driver is optimized so that high efficiency can be obtained at low output-voltage.
VCIN & DISBL#
The VCIN pin is connected to the UVL (under-voltage lockout) module, so that the built-in 5 V regulator is disabled as
long as VCIN is 7.4 V or less. On cancellation of UVL, the built-in 5 V regulator remains enabled until the UVL input
is driven to 7.0 V or less.
The built-in 5 V regulator is a series regulator with temperature compensation. A ceramic capacitor with a value of 0.1
F or more must be connected between the CGND plane and the Reg5V Pin.
The output of 5 V regulator is monitored by the internal Supervisor circuits. When the Supervisor detects this output is
more than 4.2 V (typ.), the driver state becomes active (figure1.1).
Figure 1.2 shows the application when the external 5 V regulator is used. When the Reg5V pin is applied into external 5
V, the Supervisor can activate the driver. In this application usage, VCIN should be connected to Reg5V.
The signal on pin DISBL# also enables or disables the circuit. When UVL disables the circuit, the built-in 5 V regulator
does not operate, but when the signal on DISBL# disables the circuit, only output-pulse generation is terminated, and
the 5 V regulator is not disabled.
Voltages from –0.3 V to VCIN + 0.3 V can be applied to the DISBL# pin, so on/off control by a logic IC or the use of a
resistor, etc., to pull the DISBL# line up to VCIN are both possible.
VCIN
DISBL#
REG5V
0
Driver State
Disable (GL, GH = L)
Disable (GL, GH = L)
Active
L
L
H
H
H
Active
Active
Active
H
Open
Disable (GL, GH = L)
12 V
VCIN
VCIN > 7.4 V
Reg5V
VCIN
5 V
IN
IN
Reg5V
UVL &
5 V Regulator
UVL &
5 V Regulator
External 5 V
To Internal
Logic
To Internal
Logic
Supervisor
Supervisor
Figure 1.1 Typical 12 V Input Application
(Activate Built-in 5 V Regulator)
Figure 1.2 External 5 V Application
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 12 of 16
R2J20652ANP
Preliminary
PWM & LSDBL#
The PWM pin is the signal input pin for the driver chip. When the PWM input is high, the gate of the high-side MOS
FET (GH) is high and the gate of the low-side MOS FET (GL) is low.
PWM
GH
L
GL
H
L
H
H
L
The LSDBL# pin is the Low Side Gate Disable pin for "Discontinuous Conduction Mode (DCM)" when LSDBL# is
low.
Figure 2 shows the Typical high-side and low-side gate switching and Inductor current (IL) during "Continuous
Conduction Mode (CCM)" and low-side gate disabled when asserting LSDBL# signal.
This pin is internally pulled up to Reg5V with 150 k resistor.
When low-side disable function is not used, keep this pin open or pulled up to VCIN.
CCM Operation (LSDBL# = "H" or Open mode)
IL
GH
GL
Figure 2.1 Typical Signals during CCM
DCM Operation (LSDBL# = "L")
IL
0 A
GH
GL
Figure 2.2 Typical Signals during DCM
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 13 of 16
R2J20652ANP
Preliminary
The PWM input is TTL level and has hysteresis. When the signal route from the control IC is high impedance, the tri-
state function turns off the high- and low-side MOS FETs. This function operates when the PWM input signal stays in
the input hysteresis window for 100 ns (typ.). After the tri-state mode has been entered and GH and GL have become
low, a PWM input voltage of 3.4 V or more is required to make the circuit return to normal operation.
100 ns (tHOLD-OFF
)
100 ns (tHOLD-OFF)
3.4 V
1.2 V
PWM
GH
GL
100 ns (tHOLD-OFF
)
100 ns (tHOLD-OFF)
3.4 V
1.2 V
PWM
GH
GL
Figure 3 PWM Shutdown-Hold Time Signal
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 14 of 16
R2J20652ANP
Preliminary
The equivalent circuit for the PWM-pin input is shown in the next figure. M1 is in the ON state during normal
operation; after the PWM input signal has stayed in the hysteresis window for 100 ns (typ.) and the tri-state detection
signal has been driven high, the transistor M1 is turned off.
When VCIN is powered up, M1 is started in the OFF state regardless of PWM Low or Open state. After PWM is
asserted high signal, M1 becomes ON and shifts to normal operation.
VCIN
DISBL#
M1
20 k
Tri-state
PWM Pin
detection signal
Input
Logic
To internal control
20 k
Figure 4 Equivalent Circuit for the PWM-pin Input
MOS FETs
The MOS FETs incorporated in R2J20652ANP are highly suitable for synchronous-rectification buck conversion. For
the high-side MOS FET, the drain is connected to the VIN pin and the source is connected to the VSWH pin. For the
low-side MOS FET, the drain is connected to the VSWH pin and the source is connected to the PGND pin.
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 15 of 16
R2J20652ANP
Preliminary
Package Dimensions
JEITA Package Code
RENESAS Code
Previous Code
—
MASS[Typ.]
—
P-HVQFN40-p-0606-0.50
PVQN0040KC-A
HD
D
HD/2
D /2
4-C0.50
B
B
1pin
1pin
INDEX
40
40
2.2
C0.3
A
0.7
0.2
1.95
Dimension in Millimeters
Min Nom Max
5.95 6.00 6.05
5.95 6.00 6.05
Reference
Symbol
2-A section
CAV No.
Die No.
D
E
2.05
1.95
A2 0.87 0.89 0.91
f
—
—
0.20
ZD
A
0.865 0.91 0.95
X 4
e
X 4
t
S AB
A1 0.005 0.02 0.04
0.17 0.22 0.27
b1 0.16 0.20 0.24
0.50
Lp 0.40 0.50 0.60
f
S AB
b
b
x
S AB
y1
S
e
—
—
L1
x
y
y1
t
—
—
—
—
—
—
—
—
0.05
0.05
0.20
0.20
S
HD 6.15 6.20 6.25
HE 6.15 6.20 6.25
y
S
Lp
ZD
ZE
—
—
0.75
0.75
—
—
L1 0.06 0.10 0.14
c1 0.17 0.20 0.23
c2 0.17 0.22 0.27
Ordering Information
Part Name
Quantity
Shipping Container
Taping Reel
R2J20652ANP#G3
2500 pcs
REJ03G1867-0300 Rev.3.00 Feb 26, 2010
Page 16 of 16
Notice
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use of these circuits, software, or information.
5. When exporting the products or technology described in this document, you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and
regulations. You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military, including but not limited to
the development of weapons of mass destruction. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is
prohibited under any applicable domestic or foreign laws or regulations.
6. Renesas Electronics has used reasonable care in preparing the information included in this document, but Renesas Electronics does not warrant that such information is error free. Renesas Electronics
assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein.
7. Renesas Electronics products are classified according to the following three quality grades: "Standard", "High Quality", and "Specific". The recommended applications for each Renesas Electronics product
depends on the product's quality grade, as indicated below. You must check the quality grade of each Renesas Electronics product before using it in a particular application. You may not use any Renesas
Electronics product for any application categorized as "Specific" without the prior written consent of Renesas Electronics. Further, you may not use any Renesas Electronics product for any application for
which it is not intended without the prior written consent of Renesas Electronics. Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the
use of any Renesas Electronics product for an application categorized as "Specific" or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics.
The quality grade of each Renesas Electronics product is "Standard" unless otherwise expressly specified in a Renesas Electronics data sheets or data books, etc.
"Standard":
Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools;
personal electronic equipment; and industrial robots.
"High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control systems; anti-disaster systems; anti-crime systems; safety equipment; and medical equipment not specifically
designed for life support.
"Specific":
Aircraft; aerospace equipment; submersible repeaters; nuclear reactor control systems; medical equipment or systems for life support (e.g. artificial life support devices or systems), surgical
implantations, or healthcare intervention (e.g. excision, etc.), and any other applications or purposes that pose a direct threat to human life.
8. You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics, especially with respect to the maximum rating, operating supply voltage
range, movement power voltage range, heat radiation characteristics, installation and other product characteristics. Renesas Electronics shall have no liability for malfunctions or damages arising out of the
use of Renesas Electronics products beyond such specified ranges.
9. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and
malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation resistance design. Please be sure to implement safety measures to guard them against the
possibility of physical injury, and injury or damage caused by fire in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to
redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult,
please evaluate the safety of the final products or system manufactured by you.
10. Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product. Please use Renesas Electronics
products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. Renesas Electronics assumes
no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations.
11. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of Renesas Electronics.
12. Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products, or if you have any other inquiries.
(Note 1) "Renesas Electronics" as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries.
(Note 2) "Renesas Electronics product(s)" means any product developed or manufactured by or for Renesas Electronics.
SALES OFFICES
http://www.renesas.com
Refer to "http://www.renesas.com/" for the latest and detailed information.
Renesas Electronics America Inc.
2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A.
Tel: +1-408-588-6000, Fax: +1-408-588-6130
Renesas Electronics Canada Limited
1101 Nicholson Road, Newmarket, Ontario L3Y 9C3, Canada
Tel: +1-905-898-5441, Fax: +1-905-898-3220
Renesas Electronics Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K
Tel: +44-1628-585-100, Fax: +44-1628-585-900
Renesas Electronics Europe GmbH
Arcadiastrasse 10, 40472 Düsseldorf, Germany
Tel: +49-211-65030, Fax: +49-211-6503-1327
Renesas Electronics (China) Co., Ltd.
7th Floor, Quantum Plaza, No.27 ZhiChunLu Haidian District, Beijing 100083, P.R.China
Tel: +86-10-8235-1155, Fax: +86-10-8235-7679
Renesas Electronics (Shanghai) Co., Ltd.
Unit 204, 205, AZIA Center, No.1233 Lujiazui Ring Rd., Pudong District, Shanghai 200120, China
Tel: +86-21-5877-1818, Fax: +86-21-6887-7858 / -7898
Renesas Electronics Hong Kong Limited
Unit 1601-1613, 16/F., Tower 2, Grand Century Place, 193 Prince Edward Road West, Mongkok, Kowloon, Hong Kong
Tel: +852-2886-9318, Fax: +852 2886-9022/9044
Renesas Electronics Taiwan Co., Ltd.
7F, No. 363 Fu Shing North Road Taipei, Taiwan
Tel: +886-2-8175-9600, Fax: +886 2-8175-9670
Renesas Electronics Singapore Pte. Ltd.
1 harbourFront Avenue, #06-10, keppel Bay Tower, Singapore 098632
Tel: +65-6213-0200, Fax: +65-6278-8001
Renesas Electronics Malaysia Sdn.Bhd.
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: +60-3-7955-9390, Fax: +60-3-7955-9510
Renesas Electronics Korea Co., Ltd.
11F., Samik Lavied' or Bldg., 720-2 Yeoksam-Dong, Kangnam-Ku, Seoul 135-080, Korea
Tel: +82-2-558-3737, Fax: +82-2-558-5141
© 2010 Renesas Electronics Corporation. All rights reserved.
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