RTQ2522AGQW_技术文档

®

RTQ2522A/B

2A Ultra-Low Dropout Voltage LDO Regulators with Soft-Start

General Description

Features

^Ultralow V_INRange : 0.8V to 5.5V

The RTQ2522A/B is a very low dropout linear regulator

which operates from input voltage as low as 0.8V. The

device is capable of supplying 2Aof output current with a

typical dropout voltage of only 135mV. AVBIAS supply is

required to run the internal reference and LDO circuitry

while output current comes directly from the VIN supply

for high efficiency regulation. User-programmable soft-start

limits the input inrush current and minimizes stress on

the input power. The enable input and power good output

allow easy sequencing with external regulators. This

complete flexibility provides an easy-to-use robust power

management solution for a wide variety of applications.

^VBIAS Voltage Range : 2.7V to 5.5V

^VOUT Voltage Range : 0.8V to 3.6V

^Low Dropout : 135mV Typ at 2A, V_BIAS= 5V

^2% Accuracy Over Line/Load/ Temperature

^PGOOD Indicator for Easy Sequence Control

^Programmable Soft-Start Provides Linear Voltage

Startup

^Stable with Any Output Capacitor ≥ 2.2μF

^Over-Current and Over-Temperature Protection

Ordering Information

RTQ2522A/B

The RTQ2522A/B is stable with output capacitor greater

than or equal to 2.2μF. A precise reference and error

amplifier deliver 2% accuracy over load, line and

temperature. Over-current limit and over-temperature

protection are also included. The RTQ2522A/B is available

in the WDFN-10L 3x3 and WQFN-20L 5x5 packages.

Pin 1 Orientation***

(2) : Quadrant 2, Follow EIA-481-D

Package Type

QW : WDFN-10L 3x3 (W-Type)

QW : WQFN-20L 5x5 (W-Type)

Lead Plating System

G : Green (Halogen Free and Pb Free)

Applications

 PCs, Servers, Modems, and Set-Top-Boxes

A : WDFN-10L 3x3

B : WQFN-20L 5x5

 FPGA Applications

Note :

 DSP Core and I/O Voltages

 Instrumentation

***Empty means Pin1 orientation is Quadrant 1

Richtek products are :

 Post-RegulationApplications

 Applications With Sequencing Requirements

 RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

 Suitable for use in SnPb or Pb-free soldering processes.

Simplified Application Circuit

RTQ2522A/B

VIN

V

IN

PGOOD

R

PGOOD

C

IN

EN

V

VOUT

FB

OUT

C

OUT

V

VBIAS

BIAS

R1

C

BIAS

SS

R2

C

SS

GND

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RTQ2522A/B

Pin Configuration

(TOP VIEW)

20 19 18 17 16

1

2

3

4

5

15

14

13

12

11

VOUT

NC

SS

NC

GND

EN

10

9

1

VIN

PGOOD

VOUT

FB

SS

GND

2

NC

GND

3

8

7

6

4

NC

VBIAS

11

5

EN

VIN

21

6

7

8

9

10

WDFN-10L 3x3

WQFN-20L 5x5

Marking Information

RTQ2522AGQW

RTQ2522BGQW

KK= : Product Code

YMDNN : Date Code

RTQ2522BGQW : Product Number

YMDNN : Date Code

RTQ2522B

GQW

YMDNN

KK=YM

DNN

Functional Pin Description

Pin No.

Pin Name

VIN

Pin Function

Power input of the device.

WDFN-10L 3x3

WQFN-20L 5x5

1, 2

5, 6, 7, 8

Regulated output voltage. A minimum of 2.2F capacitor

should be placed directly at this pin.

9, 10

1, 18, 19, 20

VOUT

Power good indicator. An open-drain, active-high output that

indicates the status of VOUT. A pull-up resistor from 10k to

1M should be connected from this pin to a supply of up to

5.5V.

3

4

9

PGOOD

Bias input pin. Providing input voltage for internal control

circuitry.

10

VBIAS

EN

Chip enable (Active-High). Pulling this pin below 0.4V turns

the regulator off, reducing the quiescent current to a fraction

of its operating value. Connect to VIN if not being used.

5

11

6,

12,

Ground. The Exposed Pad must be soldered to a large PCB

and connected to GND for maximum power dissipation.

GND

SS

11 (Exposed Pad) 21 (Exposed Pad)

Connect a capacitor between this pin and the ground to set

the soft-start ramp time of the output voltage.

7

15

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RTQ2522A/B

Pin No.

Pin Name

Pin Function

WDFN-10L 3x3

WQFN-20L 5x5

Feedback pin. Connect this pin to an external voltage divider

to set the output voltage.

8

16

FB

No internal connection. This pin can be left floating or

connected to GND.

--

2, 3, 4, 13, 14, 17 NC

Functional Block Diagram

Current

Limit

VOUT

VIN

UVLO

VBIAS

+

SS

+

Thermal

Protection

-

0.8V

Reference

Soft-Start

Discharge

FB

PGOOD

-

+

Hysteresis

and Deglitch

0.9 x V

REF

EN

GND

Operation

The RTQ2522A/B is a very low dropout linear regulator

which operates from input voltage as low as 0.8V. It

provides a highly accurate output that is capable of

supplying 2A of output current with a typical dropout

voltage of only 135mV. Output voltage range is from 0.8V

to 3.6V.

for applications where an auxiliary bias voltage is not

available or low dropout is not required. In these

applications, VBIAS must be 1.6V above VOUT and

attention on power rating and thermal is needed.

Enable and Shutdown

The EN pin is active high. Apply a voltage above 1.1V

ensures the LDO regulator turns on, while the regulator

turns off if the V_ENbelows 0.4V. The enable circuitry has

typical 50mV hysteresis and deglitching for use with

relatively slowly ramping analog signals. That helps avoid

on-off cycling as a result of small glitches in the V_ENsignal.

A fast rise-time signal must be used to enable the

RTQ2522A/B if precise turn-on timing is required. If not

used, ENcan be connected to either VINor VBIAS. If EN

is connected to VIN, it should be connected as close as

possible to the largest capacitance on the input to prevent

VIN and VBIAS Supply

The VBIAS input supplies the internal reference and LDO

circuitry while all output current comes directly from the

VINinput for high efficiency regulation.An external VBIAS

at least 3.25V above VOUT, offers the RTQ2522A/B very

low dropout performance and allows the device to be used

in place of a DC-DC converter and still achieve good

efficiency. This provides designers to achieve the smallest,

simplest, and lowest cost solution.

Alternatively, VBIAS can be tied together with VINas well

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RTQ2522A/B

voltage droops on that line from triggering the enable

circuit.

Soft-Start

The RTQ2522A/B includes a soft-start feature to prevent

excessive current flow during start-up. When the LDO is

enabled, an internal soft-start current (I_SS) charges the

external soft-start capacitor (C_SS) to build a ramp-up voltage

internally. The RTQ2522A/B achieve a linear and

monotonic soft-start by tracking the voltage ramp until

the voltage exceeds the internal reference. The soft-start

ramp time can be calculated using Equation 1 :

0.8VC_SS(F)

0.44A

V_REFC_SS

t_SS(s) =

=

(1)

I_SS

Power GOOD

When the output voltage is greater than V_IT+ V_HYS, the

output voltage is considered good and the open-drain

PGOOD pin goes high impedance and is typically pulled

high with external resistor. If VOUT drops below V_ITor if

VBIAS drops below 1.9 V, the open-drain output turns on

and pulls the PGOOD output low. The PGOOD pin also

asserts when the device is disabled, OCP or OTP

triggered.

Over-Current Protection

The RTQ2522A/B has built-in over-current protection.

When over current (typ. 3A) is detected, the RTQ2522A/

B foldback and limit the current at typical 2.25A. It allows

the device to supply surges of up to 3A and prevent the

device over-heating if short circuit happened.

Thermal Protection

At higher temperatures, or in cases where internal power

dissipation causes excessive self heating on chip, the

thermal shutdown circuitry will shut down the LDO when

the junction temperature exceeds approximately 160°C.

It will re enable the LDO once the junction temperature

drops back to approximately 140°C. The RTQ2522A/B will

cycle in and out of thermal shutdown without latch-up or

damage until the overstress condition is removed. Long

term overstress (T_J> 125°C) should be avoided as it can

degrade the performance or shorten the life of the part.

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RTQ2522A/B

Absolute Maximum Ratings (Note 1)

 Supply Input Voltage, VIN ---------------------------------------------------------------------------------------- −0.3V to 6V

 Other Pins------------------------------------------------------------------------------------------------------------ −0.3V to 6V

 Output Voltage, VOUT -------------------------------------------------------------------------------------------- −0.3V to (V_IN+ 0.3V)

 PowerDissipation, P_D@ T_A= 25°C

WDFN-10L 3x3 ------------------------------------------------------------------------------------------------------3.27W

WQFN-20L 5x5 -----------------------------------------------------------------------------------------------------3.54W

 Package Thermal Resistance (Note 2)

WDFN-10L 3x3, θ_JA------------------------------------------------------------------------------------------------30.5°C/W

WDFN-10L 3x3, θ_JC------------------------------------------------------------------------------------------------7.5°C/W

WQFN-20L 5x5, θ_JA------------------------------------------------------------------------------------------------28.2°C/W

WQFN-20L 5x5, θ_JC-----------------------------------------------------------------------------------------------7.1°C/W

 Junction Temperature ----------------------------------------------------------------------------------------------150°C

 Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------260°C

 Storage Temperature Range ------------------------------------------------------------------------------------- −65°C to 150°C

 ESD Susceptibility (Note 3)

HBM (Human Body Model)---------------------------------------------------------------------------------------2kV

Recommended Operating Conditions (Note 4)

 Supply Input Voltage-----------------------------------------------------------------------------------------------0.8V to 5.5V

 Ambient Temperature Range------------------------------------------------------------------------------------- −40°C to 105°C

Electrical Characteristics

(V_EN= 1.1V, V_IN= V_OUT+ 0.3V, V_BIAS= 5V, C_BIAS= 0.1μF, C_IN= C_OUT= 10μF, C_SS= 1nF, I_OUT= 50mA, T_A= −40°C to 105°C, unless

otherwise specified. Typical values are at T_A= 25°C)

Parameter

Input Voltage

Symbol

V_IN

Test Conditions

Min

Typ Max

Unit

V_OUT

V_DROP

+

--

5.5

V

VBIAS Pin Voltage

Internal Reference

Output Voltage Range

V_BIAS

V_REF

V_OUT

2.7

V

T_A= 25C

0.796

V_REF

0.8 0.804

V_IN= 5V, I_OUT= 2A

--

3.6

2

2.97V  V_BIAS 5.5V,

50mA  I_OUT 2A

Accuracy

2

0.5

%

Line Regulation

Load Regulation

V_LINE

V_{OUT (Normal)}+ 0.3  V_IN 5.5V

50mA  I_OUT= 2A

--

0.03

0.09

--

%/V

%/A

V_LOAD

I_OUT= 2A,

V_BIAS V_{OUT (Normal)} 3.25V

VIN Dropout Voltage

V_{DROP_VIN}

--

100

150

mV

VBIAS Dropout Voltage

Current Limit

V_{DROP_VBIAS}I_OUT= 2A, V_IN= V_BIAS

I_LIMV_OUT= 80% × V_{OUT (Normal)}

--

1.55

--

1.8

5.5

V

A

2.5

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RTQ2522A/B

Parameter

Symbol

I_BIAS

Test Conditions

Min

--

Typ

1

Max

2

Unit

mA

A

Bias Pin Current

Shutdown Supply Current (I_GND) I_SHDN

V_EN= 0.4V

1

50

1

--

Feedback Pin Current

I_FB

1

0.15

A

1kHz, I_OUT= 1.5A,

V_IN= 1.8V, V_OUT= 1.5V

--

60

30

50

30

--

Power-Supply Rejection

(VIN to VOUT)

dB

300kHz, I_OUT= 1.5A,

V_IN= 1.8V, V_OUT= 1.5V

PSRR

(Note 5)

1kHz, I_OUT= 1.5A,

V_IN= 1.8V, V_OUT= 1.5V

Power-Supply Rejection

(VBIAS to VOUT)

dB

300kHz, I_OUT= 1.5A,

V_IN= 1.8V, V_OUT= 1.5V

Noise

(Note 5)

100Hz to 100kHz,

I_OUT= 1.5A, C_SS= 0.001F

25 x

V_OUT

Output Noise Voltage

V_RMS

t_STR

(Note 5)

R_LOADfor I_OUT= 1A,

C_SS= open

Minimum Startup Time

200

s

Soft-Start Charging Current

I_SS

V_SS= 0.4V

440

--

5.5

0.4

--

nA

--

1.1

0

Logic_High

V_IH

Enable Input

V

Voltage

Logic_Low

V_IL

--

Enable Pin Hysteresis

Enable Pin Deglitch Time

Enable Pin Current

V_{EN_HYS}

V_{EN_DG}

I_EN

50

20

0.1

90

3

mV

s

--

V_EN= 5V

--

1

A

PGOOD Trip Threshold

PGOOD Trip Hysteresis

V_IT

V_OUTdecreasing

85

--

94

--

%V_OUT

V_HYS

I_PGOOD= 1mA (sinking),

V_OUT< V_IT

PGOOD Output Low Voltage

PGOOD Leakage Current

V_{PGOOD_ L}

--

0.3

1

V

I_{PGOOD_LK}V_PGOOD= 5.25 V, V_OUT> V_IT

0.1

165

140

A

Shutdown, temperature

increasing

--

Thermal Shutdown Temperature T_SD

C

Reset, temperature decreasing

--

Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are

stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in

the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may

affect device reliability.

Note 2. θ_JAis measured under natural convection (still air) at T_A= 25°C with the component mounted on a high effective-

thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θ_JCis measured at the

exposed pad of the package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

Note 5. Guaranteed by design.

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RTQ2522A/B

Typical Application Circuit

RTQ2522A

1, 2

3

VIN

V

IN

PGOOD

R

PGOOD

R1

C

IN

5

4

9, 10

EN

V

VOUT

OUT

C

FF

V

C

VBIAS

BIAS

OUT

*Option

C

BIAS

8

FB

7

SS

R2

C

SS

GND

6, 11 (Exposed Pad)

RTQ2522B

5, 6, 7, 8

9

VIN

V

IN

PGOOD

R

PGOOD

R1

C

IN

11

10

1, 18, 19, 20

EN

V

VOUT

OUT

C

FF

V

C

VBIAS

BIAS

OUT

*Option

C

BIAS

16

FB

15

SS

R2

C

SS

GND

12, 21 (Exposed Pad)

* : The feedforward capacitor is optional for the transient response and circuit stability improvement.

Table 1. Suggested Component Value

V_OUT(V)

0.8

R1 (k)

Short

0.619

1.13

R2 (k)

Open

4.99

4.53

4.42

4.99

4.75

2.87

1.69

1.15

0.9

1.0

1.05

1.1

1.37

1.87

1.2

2.49

1.5

4.12

1.8

3.57

2.5

3.57

3.3

3.57

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RTQ2522A/B

Typical Operating Characteristics

Enable Voltage Threshold vs. Temperature

0.90

VBIAS Voltage UVLO vs. Temperature

2.31

2.29

2.27

2.25

2.23

2.21

2.19

2.17

2.15

2.13

2.11

Logic_High

0.85

0.80

0.75

0.70

0.65

0.60

0.55

0.50

Logic_High

logic_Low

V_IN= 1.8V, V_OUT= 1.2V, VBIAS = 5V, I_OUT= 50mA

-25 25 50 75 100 125

V_IN= 1.8V, V_OUT= 1.2V, VBIAS = 5V, I_OUT= 50mA

-50

-25

0

25

50

75

100

125

-50

0

Temperature (°C)

Reference Voltage vs. Temperature

Dropout Voltage vs. Output Current

0.810

0.805

0.800

0.795

0.790

140

120

100

80

105°C

25°C

−40°C

60

40

20

V_IN= 1.8V, no load

V_IN= 1.5V, VBIAS = 5V

1000 1500 2000

0

-50

-25

0

25

50

75

100

125

0

500

Temperature (°C)

Output Current (mA)

VIN Dropout Voltage vs. (VBIAS - VOUT)

Output Spectral Noise Density

350

300

250

200

150

100

50

100

10

105°C

25°C

−40°C

1

0.1

0.01

0.001

V_IN= 1.5V, I_OUT= 2A

0

V_IN= 1.5V, V_OUT= 1.2V, C_OUT= 10μF, I_LOAD= 1.5A

1

1.5

2

2.5

3

3.5

4

4.5

5

10

100

1000

10000

100000

VBIAS - VOUT (V)

Frequency (Hz)

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RTQ2522A/B

VIN PSRR vs. Frequency

VBIAS PSRR vs. Frequency

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

I_LOAD= 0.1A

I_LOAD= 1.5A

I_LOAD= 0.1A

I_LOAD= 0.5A

I_LOAD= 1.5A

V_IN= 1.8V, V_OUT= 1.2V, VBIAS = 5V,

C_OUT= 10μF, C_SS= 1nF

V_IN= 1.8V, V_OUT= 1.2V, C_OUT= 10μF, C_SS= 1nF

10

100

1K

10K

100K

1M

10M

10

100

1K

10K

100K

1M

10M

Frequency (Hz)

Load Transient Response

Power Up Response

C_SS= 0nF

V_OUT

(50mV/Div)

C_SS= 2.2nF

C_SS= 1nF

V_OUT

(500mV/Div)

I_OUT

(1A/Div)

EN

(2V/Div)

V_IN= 2.5V, V_OUT= 1.5V, I_OUT= 100mA to 1.5A

Time (1ms/Div)

Time (50μs/Div)

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RTQ2522A/B

Application Information

The RTQ2522A/B is a low dropout regulator that features

soft-start capability. It provides ENand PGOODfor easily

system sequence control, and built-in over current &

thermal protection for safe operation.

the output voltage. In order to achieve the maximum

accuracy specifications, R2 should be ≤ 4.99kΩ.

Power Up Sequence Requirement

The RTQ2522A/B supports power on the input VIN,

VBIAS, and EN pins in any order without damage the

device. Generally, connecting the EN and VIN for most

application is acceptable, as long as VIN and V_ENis greater

than the EN threshold (typ. = 1.1V) and the input ramp

rate of VIN and VBIAS is faster than the output settled

soft-start ramp rate. If the VIN/BIAS input source ramp

rate is slower than the output settled soft-start time, the

output will track the input supply ramp up level and minus

the dropout voltage until it reaches the settled output voltage

level. For the other case, If EN is connected with VBIAS,

and the provided VINis present before VBIAS, the output

soft-start will as programmed. While VBIAS and V_ENare

present before VIN is applied also the settled soft-start

time has expired, then VOUT tracks VIN ramp up. If the

soft-start time has not expired, output tracks VINramp up

until output reaches the value set by the charging soft-

start capacitor.

Dropout Voltage

Because of two power supply inputs VIN and VBIAS and

one VOUT regulator output, there are twoDropout voltages

specified. The first is the VINDropout voltage is the voltage

difference (VIN − VOUT) when VOUT starts to decrease

by percent specified in the Electrical Characteristics table.

This is used when an external bias voltage is applied to

achieve low dropout and assumes that VBIAS is at least

3.25 V above VOUT.

The second, VBIAS dropout voltage is the voltage

difference (VBIAS − VOUT) when VINand VBIAS pins are

joined together and VOUT starts to decrease. This option

allows the device to be used in applications where an

auxiliary bias voltage is not available or low dropout is not

required. In these applications, VBIAS must be 1.6V above

VOUT and attention on power rating and thermal is needed.

Input, Output, and Bias Capacitor Selection

Thermal Considerations

The device is designed to be stable for all available types

and values of output capacitors ≥ 2.2μF. The device is

also stable with multiple capacitors in parallel, which can

be of any type or value. The capacitance required on the

VINand VBIAS pins strongly depends on the input supply

source impedance. To counteract any inductance in the

input, the minimum recommended capacitor for V_INis 1μF

and minimum recommended capacitor for V_BIASis 0.1μF.

If V_INand V_BIASare connected to the same supply, the

recommended minimum capacitor for V_BIASis 4.7μF. Good

quality, low ESR capacitors should be used on the input;

ceramic X5R and X7R capacitors are preferred. These

capacitors should be placed as close the pins as possible

for optimum performance.

The junction temperature should never exceed the

absolute maximum junction temperature T_J(MAX), listed

under Absolute Maximum Ratings, to avoid permanent

damage to the device. The maximum allowable power

dissipation depends on the thermal resistance of the IC

package, the PCB layout, the rate of surrounding airflow,

and the difference between the junction and ambient

temperatures. The maximum power dissipation can be

calculated using the following formula :

P_D(MAX)= (T_J(MAX)− T_A) / θ_JA

where T_J(MAX)is the maximum junction temperature, T_Ais

the ambient temperature, and θ_JAis the junction-to-ambient

thermal resistance.

For continuous operation, the maximum operating junction

temperature indicated under Recommended Operating

Conditions is 125°C. The junction-to-ambient thermal

resistance, θ_JA, is highly package dependent. For a

WDFN-10L 3x3 package, the thermal resistance, θ_JA, is

Adjusting the Output Voltage

The output voltage of the RTQ2522A/B is adjustable from

0.8V to 3.6V by external voltage divider resisters as shown

in TypicalApplication Circuit. R1 and R2 can be calculated

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RTQ2522A/B

30.5°C/Won a standard JEDEC 51-7 high effective-thermal-

conductivity four-layer test board. For a WQFN-20L 5x5

package, the thermal resistance, θ_JA, is 28.2°C/W on a

standard JEDEC 51-7 high effective-thermal-conductivity

four-layer test board. The maximum power dissipation at

T_A= 25°C can be calculated as below :

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

WQFN-20L 5x5

WDFN-10L 3x3

Four-Layer PCB

P_D(MAX)= (125°C − 25°C) / (30.5°C/W) = 3.27W for a

WDFN-10L 3x3 package.

P_D(MAX)= (125°C − 25°C) / (28.2°C/W) = 3.54W for a

WQFN-20L 5x5 package.

0

25

50

75

100

125

The maximum power dissipation depends on the operating

ambient temperature for the fixed T_J(MAX)and the thermal

resistance, θ_JA. The derating curves in Figure 1 allows

the designer to see the effect of rising ambient temperature

on the maximum power dissipation.

Ambient Temperature (°C)

Figure 1.Derating Curve of Maximum PowerDissipation

GND layout trace should be

wider for thermal consideration.

VIN

VOUT

C

IN

OUT

1

2

3

10

9

VIN

PGOOD

VBIAS

EN

VOUT

FB

SS

GND

R1

PGOOD reference

source input

8

7

6

4

5

Enable signal

input

C

SS

11

R2

C

BIAS

GND

Add via for thermal consideration

Figure 2. RTQ2522APCB LayoutGuide

is a registered trademark of Richtek Technology Corporation.

©

DSQ2522A/B-00 April 2017

www.richtek.com

11

RTQ2522A/B

GND layout trace should be

wider for thermal consideration.

C

IN

C

OUT

VIN

VOUT

GND

5

4

3

2

1

6

20

VIN

VOUT

PGOOD reference

source input

7

8

9

19

18

17

16

VOUT

NC

VIN

GND

PGOOD

VBIAS

R1

R2

10

FB

21

C

BIAS

11 12 13 14 15

C

SS

Enable signal input

GND

Add via for thermal consideration

Figure 3. RTQ2522B PCB LayoutGuide

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

12

DSQ2522A/B-00 April 2017

RTQ2522A/B

Outline Dimension

D2

D

L

E

E2

SEE DETAIL A

1

e

b

2

1

2

1

A

A3

DETAILA

Pin #1 ID and Tie Bar Mark Options

A1

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min

Max

Min

Max

A

A1

A3

b

0.700

0.000

0.175

0.180

2.950

2.300

2.950

1.500

0.800

0.050

0.250

0.300

3.050

2.650

3.050

1.750

0.028

0.000

0.007

0.116

0.091

0.116

0.059

0.031

0.002

0.010

0.012

0.120

0.104

0.120

0.069

D

D2

E

E2

e

0.500

0.020

L

0.350

0.450

0.014

0.018

W-Type 10L DFN 3x3 Package

©

is a registered trademark of Richtek Technology Corporation.

DSQ2522A/B-00 April 2017

www.richtek.com

13

RTQ2522A/B

1

2

1

2

DETAILA

Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters

Dimensions In Inches

Symbol

Min.

0.700

0.000

0.175

0.250

4.900

3.100

4.900

3.100

Max.

0.800

0.050

0.250

0.350

5.100

3.200

5.100

3.200

Min.

0.028

0.000

0.007

0.010

0.193

0.122

0.193

0.122

Max.

0.031

0.002

0.010

0.014

0.201

0.126

0.201

0.126

A

A1

A3

b

D

D2

E

E2

e

0.650

0.026

L

0.500

0.600

0.020

0.024

W-Type 20L QFN 5x5 Package

©

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

14

DSQ2522A/B-00 April 2017

RTQ2522A/B

Footprint Information

Footprint Dimension (mm)

Number of

Package

Tolerance

P

A

B

C

D

Sx

Sy

M

V/W/U/X/ZDFN3*3-10

10

0.50

3.80

2.10

0.85

0.30

2.55

1.70

2.30

±0.05

©

is a registered trademark of Richtek Technology Corporation.

DSQ2522A/B-00 April 2017

www.richtek.com

15

RTQ2522A/B

Footprint Dimension (mm)

Number of

Package

Tolerance

±0.05

P

Ax

Ay

Bx

By

C

D

Sx

Sy

V/W/U/XQFN5*5-20

20

0.65

5.80

3.80

1.00

0.40

3.25

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1^stStreet, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789

Richtek products are sold by description only. Customers should obtain the latest relevant information and data sheets before placing orders and should verify

that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek

product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use;

nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent

or patent rights of Richtek or its subsidiaries.

www.richtek.com

16

DSQ2522A/B-00 April 2017


型号：	RTQ2522AGQW
厂家：	RICHTEK TECHNOLOGY CORPORATION
描述：	Ultra-Low Dropout Voltage LDO Regulators
文件：	总16页 (文件大小：262K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

RTQ2522AGQW [RICHTEK]

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