MC74ACT08N [ROCHESTER]
AND Gate, ACT Series, 4-Func, 2-Input, CMOS, PDIP14, PLASTIC, DIP-14;
| 型号： | MC74ACT08N |
| 厂家： | 
Rochester Electronics |
| 描述： | AND Gate, ACT Series, 4-Func, 2-Input, CMOS, PDIP14, PLASTIC, DIP-14 栅 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总10页 (文件大小：829K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC74AC08, MC74ACT08
Quad 2-Input AND Gate
Features
• Outputs Source/Sink 24 mA
• ′ACT08 Has TTL Compatible Inputs
• Pb−Free Packages are Available
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MAXIMUM RATINGS
Rating
Symbol
Value
Unit
PDIP−14
N SUFFIX
CASE 646
DC Supply Voltage (Referenced to GND)
V
CC
−0.5 to
+7.0
V
14
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
V
−0.5 to
CC
V
V
1
in
V
+0.5
V
out
−0.5 to
SO−14
V
CC
+0.5
D SUFFIX
CASE 751A
DC Input Current, per Pin
I
20
mA
mA
mA
°C
14
in
1
DC Output Sink/Source Current, per Pin
I
50
50
out
CC
DC V or GND Current per Output Pin
I
CC
Storage Temperature
T
stg
−65 to
+150
TSSOP−14
DT SUFFIX
CASE 948G
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
14
1
V
CC
14
13
12
11
10
9
8
SOEIAJ−14
M SUFFIX
CASE 965
14
1
1
2
3
4
5
6
7
GND
Figure 1. Pinout: 14−Lead Packages Conductors
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 5 of this data sheet.
©
Semiconductor Components Industries, LLC, 2010
1
Publication Order Number:
May, 2010 − Rev. 9
MC74AC08/D
MC74AC08, MC74ACT08
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
2.0
4.5
0
Typ
5.0
5.0
−
Max
6.0
Unit
′AC
V
Supply Voltage
V
CC
′ACT
5.5
V , V
in out
DC Input Voltage, Output Voltage (Ref. to GND)
V
CC
V
V
V
V
V
V
@ 3.0 V
−
150
40
25
10
8.0
−
−
ns/V
CC
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
@ 4.5 V
@ 5.5 V
@ 4.5 V
@ 5.5 V
−
−
−
−
−
t , t
CC
CC
CC
CC
r
f
−
−
Input Rise and Fall Time (Note 2)
′ACT Devices except Schmitt Inputs
t , t
ns/V
r
f
−
T
Junction Temperature (PDIP)
Operating Ambient Temperature Range
Output Current − High
−
140
85
°C
°C
J
T
A
−40
−
25
−
I
I
−24
24
mA
mA
OH
OL
Output Current − Low
−
−
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
CC
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
in
DC CHARACTERISTICS
74AC
74AC
T
A
=
−40°C to
+85°C
T
A
= +25°C
V
CC
(V)
Typ
Guaranteed Limits
Symbol
Parameter
Conditions
= 0.1 V
OUT
Unit
V
V
V
Minimum High Level
Input Voltage
V
3.0
4.5
5.5
1.5
2.25
2.75
2.1
2.1
V
IH
or V − 0.1 V
3.15
3.85
3.15
3.85
CC
Maximum Low Level
Input Voltage
V
= 0.1 V
3.0
4.5
5.5
1.5
2.25
2.75
0.9
1.35
1.65
0.9
1.35
1.65
V
V
IL
OUT
or V − 0.1 V
CC
Minimum High Level
Output Voltage
3.0
4.5
5.5
2.99
4.49
5.49
2.9
4.4
5.4
2.9
4.4
5.4
I
= −50 mA
OH
OUT
V
IN
= V or V (Note 3)
IL IH
−12 mA
−24 mA
−24 mA
3.0
4.5
5.5
−
−
−
2.56
3.86
4.86
2.46
3.76
4.76
V
I
OH
V
OL
Maximum Low Level
Output Voltage
V
= V or V (Note 3)
IL IH
IN
12 mA
24 mA
24 mA
3.0
4.5
5.5
−
−
−
0.36
0.36
0.36
0.44
0.44
0.44
V
I
OL
I
IN
Maximum Input
Leakage Current
V = V , GND
5.5
−
0.1
1.0
mA
I
CC
I
I
I
Minimum Dynamic (Note 4)
Output Current
V
V
= 1.65 V Max
= 3.85 V Min
5.5
5.5
−
−
−
−
75
mA
mA
OLD
OHD
CC
OLD
−75
OHD
Maximum Quiescent
Supply Current
V
IN
= V or GND
5.5
−
4.0
40
mA
CC
NOTE:
I
IN
and I @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
.
CC
CC
3. All outputs loaded; thresholds on input associated with output under test.
4. Maximum test duration 2.0 ms, one output loaded at a time.
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2
MC74AC08, MC74ACT08
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC
74AC
T
A
= −40°C
to +85°C
T
A
= +25°C
C
L
= 50 pF
C
= 50 pF
L
Fig.
No.
V
(V)
CC
Min
Typ
Max
Min
Max
(Note5 )
Symbol
Parameter
Unit
3.3
5.0
1.5
1.5
7.5
5.5
9.5
7.5
1.0
1.0
10.0
8.5
t
t
Propagation Delay
Propagation Delay
ns
3−5
3−5
PLH
3.3
5.0
1.5
1.5
7.0
5.5
8.5
7.0
1.0
1.0
9.0
7.5
ns
PHL
5. Voltage Range 3.3 V is 3.3 V 0.3 V.
Voltage Range 5.0 V is 5.0 V 0.5 V.
DC CHARACTERISTICS
74ACT
74ACT
T
A
=
−40°C to
+85°C
T
A
= +25°C
V
CC
Typ
1.5
Guaranteed Limits
(V)
Symbol
Parameter
Conditions
= 0.1 V
OUT
Unit
V
V
V
Minimum High Level
Input Voltage
V
4.5
5.5
4.5
5.5
4.5
5.5
2.0
2.0
0.8
0.8
4.4
5.4
2.0
2.0
0.8
0.8
4.4
5.4
IH
V
V
or V − 0.1 V
1.5
CC
Maximum Low Level
Input Voltage
V
OUT
= 0.1 V
1.5
IL
or V − 0.1 V
1.5
CC
Minimum High Level
Output Voltage
4.49
5.49
I
= −50 mA
OH
OUT
V
V
V
IN
= V or V (Note 6)
IL
IH
−24 mA
−24 mA
4.5
5.5
4.5
5.5
−
3.86
4.86
0.1
3.76
4.76
0.1
−
V
OL
Maximum Low Level
Output Voltage
0.001
0.001
I
= 50 mA
OUT
V
V
0.1
0.1
V
= V or V (Note 6)
IL IH
IN
24 mA
24 mA
4.5
5.5
−
−
0.36
0.36
0.44
0.44
I
IN
Maximum Input
Leakage Current
V = V , GND
5.5
−
0.1
1.0
mA
I
CC
DI
Additional Max. I /Input
V = V − 2.1 V
5.5
5.5
5.5
0.6
−
−
−
−
1.5
75
mA
mA
mA
CCT
CC
I
CC
I
I
I
Minimum Dynamic (Note 7)
Output Current
V
OLD
V
OHD
= 1.65 V Max
OLD
= 3.85 V Min
−
−75
OHD
CC
Maximum Quiescent
Supply Current
V
IN
= V or GND
5.5
−
4.0
40
mA
CC
6. All outputs loaded; thresholds on input associated with output under test.
7. Maximum test duration 2.0 ms, one output loaded at a time.
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3
MC74AC08, MC74ACT08
AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT
74ACT
T
A
= −40°C
to +85°C
T
A
= +25°C
C
L
= 50 pF
C
= 50 pF
L
Fig.
No.
V
(V)
CC
Min
1.0
1.0
Typ
−
Max
9.0
Min
1.0
1.0
Max
(Note 8)
Symbol
Parameter
Unit
t
t
Propagation Delay
Propagation Delay
5.0
10.0
ns
3−5
3−5
PLH
5.0
−
9.0
10.0
ns
PHL
8. Voltage Range 5.0 V is 5.0 V 0.5 V.
CAPACITANCE
Value
Typ
4.5
20
Symbol
Parameter
Test Conditions
Unit
C
C
Input Capacitance
Power Dissipation Capacitance
V
CC
CC
= 5.0 V
= 5.0 V
pF
pF
IN
V
PD
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4
MC74AC08, MC74ACT08
MARKING DIAGRAMS
PDIP−14
SOIC−14
TSSOP−14
SOEIAJ−14
14
14
14
14
1
AC
08
74AC08
ALYWG
MC74AC08N
AWLYYWWG
AC08G
AWLYWW
ALYWG
G
1
1
1
14
14
1
14
14
ACT
08
MC74ACT08N
AWLYYWWG
ACT08G
AWLYWW
74ACT08
ALYWG
ALYWG
G
1
1
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = Pb−free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
†
Package
Shipping
MC74AC08NG
PDIP−14
25 Units / Rail
55 Units / Rail
(Pb−Free)
MC74AC08D
SOIC−14
MC74AC08DG
SOIC−14
(Pb−Free)
MC74AC08DR2
SOIC−14
MC74AC08DR2G
SOIC−14
(Pb−Free)
2500 / Tape & Reel
MC74AC08DTR2
MC74AC08DTR2G
MC74AC08MEL
MC74AC08MELG
TSSOP−14*
TSSOP−14*
SOEIAJ−14
2000 / Tape & Reel
25 Units / Rail
SOEIAJ−14
(Pb−Free)
MC74ACT08N
PDIP−14
MC74ACT08NG
PDIP−14
(Pb−Free)
MC74ACT08D
SOIC−14
55 Units / Rail
MC74ACT08DG
SOIC−14
(Pb−Free)
MC74ACT08DR2
MC74ACT08DR2G
SOIC−14
SOIC−14
(Pb−Free)
MC74ACT08DR2GH
SOIC−14
2500 / Tape & Reel
2000 / Tape & Reel
(Pb−Free, Halide−Free)
MC74ACT08DTR2
MC74ACT08DTR2G
MC74ACT08MELG
TSSOP−14*
TSSOP−14*
SOEIAJ−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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5
MC74AC08, MC74ACT08
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
14
1
8
7
B
INCHES
MILLIMETERS
A
F
DIM
A
B
C
D
F
MIN
MAX
0.770
0.260
0.185
0.021
0.070
MIN
18.16
6.10
3.69
0.38
1.02
MAX
19.56
6.60
4.69
0.53
1.78
0.715
0.240
0.145
0.015
0.040
L
N
C
G
H
J
K
L
M
N
0.100 BSC
2.54 BSC
0.052
0.008
0.115
0.290
−−−
0.095
0.015
0.135
0.310
10
1.32
0.20
2.92
7.37
−−−
0.38
2.41
0.38
3.43
7.87
10
−T−
SEATING
PLANE
J
_
_
K
0.015
0.039
1.01
D 14 PL
H
G
M
M
0.13 (0.005)
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6
MC74AC08, MC74ACT08
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
−A−
14
8
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−B−
P 7 PL
M
M
B
0.25 (0.010)
7
1
G
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
F
R X 45
_
C
A
B
C
D
F
G
J
K
M
P
R
8.55
3.80
1.35
0.35
0.40
8.75 0.337 0.344
4.00 0.150 0.157
1.75 0.054 0.068
0.49 0.014 0.019
1.25 0.016 0.049
0.050 BSC
0.25 0.008 0.009
0.25 0.004 0.009
−T−
SEATING
PLANE
J
M
K
1.27 BSC
D 14 PL
0.19
0.10
0
M
S
S
0.25 (0.010)
T
B
A
7
0
7
_
_
_
_
5.80
0.25
6.20 0.228 0.244
0.50 0.010 0.019
SOLDERING FOOTPRINT*
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
MC74AC08, MC74ACT08
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G−01
ISSUE B
NOTES:
14X K REF
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
M
S
S
V
0.10 (0.004)
T
U
S
0.15 (0.006) T
U
N
0.25 (0.010)
14
8
2X L/2
M
B
L
N
−U−
PIN 1
IDENT.
F
7
1
DETAIL E
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
K
0.15 (0.006) T
U
A
−V−
MILLIMETERS
DIM MIN MAX
INCHES
MIN MAX
K1
A
B
C
D
F
G
H
J
4.90
4.30
−−−
0.05
0.50
5.10 0.193 0.200
4.50 0.169 0.177
J J1
1.20
−−− 0.047
0.15 0.002 0.006
0.75 0.020 0.030
SECTION N−N
0.65 BSC
0.026 BSC
0.60 0.020 0.024
0.20 0.004 0.008
0.16 0.004 0.006
0.30 0.007 0.012
0.25 0.007 0.010
0.50
0.09
0.09
0.19
J1
K
−W−
C
K1 0.19
L
M
6.40 BSC
0.252 BSC
0.10 (0.004)
0
8
0
8
_
_
_
_
SEATING
PLANE
−T−
H
G
DETAIL E
D
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
01.34X6
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
8
MC74AC08, MC74ACT08
PACKAGE DIMENSIONS
SOEIAJ−14
CASE 965−01
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
L
14
8
E
Q
1
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
H
E
E
_
M
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
L
7
1
DETAIL P
Z
D
MILLIMETERS
INCHES
MIN
VIEW P
DIM MIN
MAX
2.05
0.20
0.50
0.20
10.50
5.45
MAX
0.081
0.008
0.020
0.008
0.413
0.215
A
e
A
---
0.05
0.35
0.10
9.90
5.10
---
0.002
0.014
0.004
0.390
0.201
c
A
1
b
c
D
E
e
b
A
1
1.27 BSC
0.050 BSC
H
M
7.40
0.50
1.10
8.20
0.85
1.50
0.291
0.020
0.043
0.323
0.033
0.059
0.13 (0.005)
E
L
0.10 (0.004)
L
E
M
0
10
10
_
0.035
0.056
0
_
_
_
Q
0.70
---
0.90
1.42
0.028
---
1
Z
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MC74AC08/D
相关型号：
MC74ACT109DC
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SOIC-16
MOTOROLA
MC74ACT109DCR1
J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, PLASTIC, SOIC-16
MOTOROLA
MC74ACT109DT
J-Kbar Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, TSSOP-16
ROCHESTER
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