BD18340FV-M_技术文档

Datasheet

Constant Current LED Drivers for Automotive

Constant Current Controller

for Automotive LED Lamps

BD18340FV-M BD18341FV-M

General Description

Key Specifications

BD18340FV-M/BD18341FV-M are 70V-withstanding

Constant Current Controller for Automotive LED Lamps.

It is able to drive at maximum 10 rows of PNP transistors.

It can also contribute to reduction in the consumption

power of the set as it has the integrated standby function.,

The IC also incorporates a highly reliable, in-built

de-rating function, LED Open Detection, Short Circuit

Protection and Over Voltage Mute function and LED

failure input/output function.

Input Voltage Range:

FB Terminal Voltage Accuracy:

4.5V to 19V

650mV ±3%

@Ta = 25°C to 125°C

0µA(Typ)

Stand-by Current:

LED Current De-rating Accuracy:

BD18340FV-M: ±5% @V_DCDIM=0.5 to 0.75V

BD18341FV-M: ±12% @V_DCDIM=0.5 to 0.75V

Operating Temperature Range:

-40°C to +125°C

Features

AEC-Q100 Qualified^(Note1)

Package

W(Typ) x D(Typ) x H(Max)

LED Constant-Current Controller

SSOP-B16

5.00mm x 6.40mm x 1.35mm

PWM Dimming Function

LED Current De-rating Function

LED Open Detection

Short Circuit Protection(SCP)

Over Voltage Mute Function(OVM)

Disable LED Open Detection Function at

Reduced-Voltage

Abnormal Output Detection and Output Functions

(Note1: Grade1)

Applications

SSOP-B16

 Automotive LED Exterior Lamp

(Rear Lamp, Turn Lamp, DRL/Position Lamp,

Fog Lamp etc.)

 Automotive LED Interior Lamp

(Air Conditioner Lamp, Interior Lamp,

Cluster Light etc.)

Typical Application Circuit

RFB1

RFB2

VIN

FB

PWM_in

D1

RLIM

ZD1

CVIN1

CCRT

CVIN2

EN

BASE

D2

D3

CRT

OP

DC_in

RCRT

SCP

CLED

BD18340FV-M

BD18341FV-M

DISC

D

RDCIN

VREG

CD

CVREG

ROPM

PWMOUT

PBUS

OPM

RDCDIM

GND

DCDIM

NTC

〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays

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Pin Configuration

(TOP VIEW)

FB

VIN

1

16

15

14

13

12

11

10

9

BASE

EN

2

N.C.

DISC

CRT

D

3

OP

4

SCP

5

GND

DCDIM

VREG

OPM

6

PBUS

7

PWMOUT

8

Pin Description

No.

Name

No.

Name

Function

The terminal to set

Disable LED open detection voltage

1

2

3

4

5

6

7

8

FB

BASE

N.C.

OP

Input terminal for feedback voltage

9

OPM

The terminal for connecting

PNP Tr. BASE

10

11

12

13

14

15

16

VREG

Internal reference voltage

The terminal to set

DC dimming

Pin not connected internally. ^{(Note 1)}

DCDIM

D

The terminal

for LED open detection

The terminal to set

Disable LED open detection time

The terminal

for short circuit protection

The terminal to set

CR timer

SCP

GND

PBUS

CRT

DISC

EN

Discharge terminal for

CR timer

GND

The terminal

Abnormal Output Detection and Output

Enable input

PWMOUT CR timer signal output

VIN

Power supply input

(Note 1) Please be sure to floating at N.C. pin

Block Diagram

VREG

VIN

FB

EN

VREG

PBUS

BASE

Over

Voltage

Mute

VREF

PBUS

OPENLOAD

OP

VREG

VIN

OPM

D

1.2V

Control

Logic

OPEN

MASK

VREG

SCP

DELAY

20µs

D COMP

1.2V⇔1.25V

DC Dimming

DELAY

Rise 1µs

1.0V

VREG

DCDIM

1.0V

CRT

CR

TIMER

DISC

PWMOUT

GND

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Absolute Maximum Ratings (Ta=25°C)

Parameter

Symbol

V_IN

Rating

-0.3 to +70

-0.3 to VIN+0.3V

-0.3 to +5.0

-0.3 to +7.0

-0.3 to V_REG+0.3

-40 to 125

Unit

V

Supply Voltage

EN,CRT, DISC Terminal Voltage

FB,BASE,OP,SCP Terminal Voltage

V_EN, V_CRT,V_DISC

V_FB, V_BASE, V_OP,V_SCP

V_IN-V_FB,V_IN-V_BASE

V_PBUS, V_REG,V_DCDIM

V_PWMOUT, V_OPM, V_D

T_opr

V

VIN-FB, VIN-BASE

Voltage across Terminals

V

PBUS,VREG

DCDIM Terminal Voltage

V

PWMOUT, OPM, D Terminal Voltage

Operating Temperature Range

Storage Temperature Range

Junction Temperature

V

°C

T_stg

-55 to 150

T_jmax

150

Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit

between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over

the absolute maximum ratings.

Thermal Resistance^(Note2)

Thermal Resistance (Typ)

Parameter

Symbol

Unit

1s^(Note4)

2s2p^(Note5)

SSOP-B16

Junction to Ambient

Junction to Top Characterization Parameter ^{(Note 3)}

θ_JA

140.9

6

77.2

5

°C/W

Ψ_JT

(Note2) Based on JESD51-2A (Still-Air),

(Note3) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of

the outside surface of the component package.

(Note4) Using a PCB board based on JESD51-3.

Layer Number of

Measurement Board

Material

FR-4

Board Size

114.3mm x 76.2mm x

1.57mmt

Single

Top

Copper Pattern

Thickness

Footprints and Traces

70μm

(Note5) Using a PCB board based on JESD51-7

Layer Number of

Material

Board Size

114.3mm x 76.2mm x 1.6mmt

2 Internal Layers

Measurement Board

4 Layers

FR-4

Top

Bottom

Copper Pattern

74.2mm x 74.2mm

Copper Pattern

Thickness

Copper Pattern

Thickness

35μm

Thickness

70μm

Footprints and Traces

70μm

74.2mm x 74.2mm

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Recommended Operating Conditions (Ta=-40°C to +125°C)

Parameter

Symbol

Min

4.5

100

10

Typ

13

-

Max

19

Unit

V

Supply Voltage^{(Note1) (Note2)}

CRTIMER Frequency Range

V_IN

f_PWM

t_MIN

5000

-

Hz

µs

PWM Minimum Pulse Width^(Note3)

-

(Note1) ASO should not be exceeded

(Note2) At start-up time, please apply a voltage above 5V once. The value is the voltage range after the temporary rise to 5V.

(Note3) At connecting the External PNP Tr.(2SAR573D3FRA(ROHM) ,1pcs), That is the same when the Pulse input to CRT terminal.

Operating Conditions

Parameter

Symbol

C_VIN1

Min

1.0

Max

-

Unit

μF

kΩ

Ω

The Capacitor

connecting VIN Terminal1

The Capacitor

connecting VIN Terminal2

(Note4)

C_VIN2

0.047

1.0

-

The Capacitor

connecting VREG Terminal

(Note5)

C_VREG

4.7

0.68

0.22

50

The Capacitor

connecting LED Anode

C_LED

C_CRT

R_CRT

0.1

The Capacitor

connecting CRT Terminal

0.01

0.1

The Resistor

connecting CRT Terminal

The Resistor

for setting LED Current LED

(Note6)

R_FB1, R_FB2

0.8

6.5

The Resistor

for setting Disable LED Open

Detection Voltage

R_OPM

25

55

kΩ

The Resistor

for setting DC Dimming

R_DCDIM

R_DCIN

4.7

-

50

10

kΩ

The Resistor

for DCIN pull-down

The Capacitor

for setting Disable LED Open

Detection Time

The Resistor for limiting

Base Terminal Current

(Note5)

C_D

R_LIM

Q₁

0.001

0.1

μF

See Features

Description 5

Ω

The External PNP Transistor

(Note7)

-

(Note4) ROHM Recommended Value (0.1μF GCM155R71H104KE37 murata)

(Note5) Ceramic capacitor recommended. Please setting the Disable LED Open Detection Time less than PWM minimum pulse width.

(Note6) At connecting the External PNP Tr. (2SAR573D3FRA (ROHM), 1pcs)

(Note7) For external PNP transistor, please use the recommended device 2SAR573D3FRA for this IC.

While using non-recommended part device, validate the design on actual board.

Please check hfe of the part to design base current limit resistor. (See Features Description, section 5).

As for parasitic capacitance, please evaluate over shoot of I_LEDon actual board. (See Features Description, Section 8 -Evaluation example, ILED pulse

width at PWM Dimming operation).

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Electrical Characteristics1

(Unless otherwise specified Ta = -40 to +125°C, V_IN= 13V, C_VREG= 1.0µF, Transistor PNP = 2SAR573D3FRA)

Limit

Parameter

Symbol

Unit

Conditions

Min

Typ

Max

[ Circuit Current I_VIN

]

Circuit Current

at Stand-by Mode

V_EN= 0V

V_FB=V_IN

I_VIN1

I_VIN2

I_VIN3

I_VIN4

-

0

10

5.0

μA

mA

Circuit Current

at Normal Mode

V_EN= V_IN, V_FB=V_IN-1.0V

Base current subtracted

2.0

Circuit Current

at LED Open Detection

V_EN= V_IN, V_FB=V_IN-1.0V

at LED Open Detection

Circuit Current

at PBUS=Low

V_EN= V_IN, V_FB=V_IN-1.0V

V_PBUS= 0V

[ VREG Voltage ]

VREG Terminal Voltage

V_REG

I_VREG

4.85

-1.0

5.00

-

5.15

-

V

I_VREG= -100μA

VREG Terminal

Current Capability

mA

[ DRV ]

V_FBREG= V_IN- V_FB

RFB1 = RFB2 = 1.8Ω,

Ta = 25 to 125°C

V_FBREG= V_IN- V_FB

RFB1 = RFB2 = 1.8Ω,

Ta = -40 to 125°C

630

617

650

670

683

mV

FB Terminal Voltage

V_FBREG

FB Terminal

Input Current

I_FB

7.5

10

15

-

30

-

μA

mA

kΩ

VFB = VIN

BASE Terminal Sink

Current Capability

V_FB= V_IN, V_BASE= V_IN- 1.5V

Ta = 25°C

I_BASE

R_BASE

BASE Terminal

Pull-up Resistor

V_CRT= 0V

V_FB= V_IN, V_BASE= V_IN- 1.0V

0.5

1.0

1.5

[ LED Current De-rating Function (DC Dimming Function) ]

mV / ΔV_FBREG/ ΔV_DCDIM

DC Dimming Gain

D_DG

688

725

762

V

V_DCDIM: 0.75V -> 0.35V

BD18340FV-M

FB Terminal Voltage

VDCDIM = 0.75V

V_{FB_DC1}

V_{FB_DC2}

V_{FB_DC3}

443

270

161

466

284

175

489

298

189

mV

FB Terminal Voltage

VDCDIM = 0.50V

FB Terminal Voltage

VDCDIM = 0.35V

BD18341FV-M

FB Terminal Voltage

VDCDIM = 0.75V

V_{FB_DC1}

V_{FB_DC2}

V_{FB_DC3}

413

250

155

466

284

175

522

318

196

mV

FB Terminal Voltage

VDCDIM = 0.50V

FB Terminal Voltage

VDCDIM = 0.35V

[ Over Voltage Mute Function(OVM) ]

ΔV_FB= 10.0mV

ΔV_FB= V_FB(@V_IN= 13V) –

Over Voltage Mute

Start Voltage

V_OVMS

20.0

-

22.0

-25

24.0

-

V

V_FB(@V_IN= V_OVM

)

Over Voltage Mute

Gain

mV /

V

V_OVMG

ΔV_FB/ ΔV_IN

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Electrical Characteristics2

(Unless otherwise specified Ta = -40 to +125°C, V_IN= 13V, C_VREG= 1.0µF, Transistor PNP = 2SAR573D3FRA)

Limit

Parameter

[ CRTIMER ]

Symbol

Unit

Conditions

Min

Typ

Max

CRT Terminal Charge Current

CRT Terminal Charge Voltage

I_CRT

36

0.72

1.80

2.10

28.5

0.38

20

40

0.80

2.00

2.40

30.0

0.40

50

5.0

-

44

0.88

2.20

3.00

31.5

0.42

100

10

μA

V

V_{CRT_CHA}

V_{CRT_DIS1}

V_{CRT_DIS2}

R_CHA

CRT Terminal

Discharge Voltage 1

V

CRT Terminal

Discharge Voltage 2

When V_CRT> V_{CRT_DIS2}

R_D1-> R_D2

,

V

R_CHA

=

CRT Terminal Charge Resistor

CR Timer Discharge Constant

DISC Terminal ON Resistor 1

DISC Terminal ON Resistor 2

kΩ

V / V

Ω

(V_{CRT_DIS1-}V_{CRT_CHA})/ I_CRT

V_{CRT_CHA}

V_{CRT_DIS1}

/

R_DISC1

R_DISC2

V_PWMOUTH

V_PWMOUTL

I_DISC= 10mA

2.5

4.0

-

kΩ

V

I_DISC= 100μA

PWMOUT Terminal

Output High Voltage

5.5

0.5

-

I_PWMOUT= -100μA

I_PWMOUT= 100μA

PWMOUT Terminal

Output Low Voltage

-

V

PWMOUT Terminal

Sink Current Capability

I_PWMOUT

_SINK

-

mA

μA

PWMOUT Terminal

Source Current Capability

I_PWMOUT

_SOURCE

-0.5

-

CRT Terminal Leakage Current

[ LED Open Detection ]

ICRT_LEAK

-

10

VCRT = 70V

LED Open Detection Voltage

V_OPD

I_OP

1.1

19

1.2

21

1.3

23

V

V_OPD= V_IN- V_OP

V_OP= V_IN- 0.5V

OP Terminal

Input Current

μA

[ Disable LED Open Detection Function at Reduced-Voltage]

OPM Terminal Source Current

I_OPM

38

40

42

μA

V

VIN Terminal Disable LED Open

Detection Voltage

at Reduced-Voltage

V_OPM

× 5.9

V_OPM

× 6.0

V_OPM

× 6.1

V_{IN_OPM}

V_{OPM_R}

VIN terminal Voltage

OPM Terminal

Input Voltage Range

1.0

-

2.2

V

[ Disable LED Open Detection Time Setting ]

Input Threshold Voltage

D Terminal Source Current

D Terminal ON Resistor

V_DH

I_DSOURCE

R_D

0.9

100

-

1.0

230

-

1.1

400

950

V

μA

Ω

I_{D_EXT}= 100μA

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Electrical Characteristics3

(Unless otherwise specified Ta = -40 to +125°C, V_IN= 13V, C_VREG= 1.0µF, Transistor PNP = 2SAR573D3FRA)

Limit

Parameter

Symbol

Unit

Conditions

Min

Typ

Max

[ Short Circuit Protection(SCP) ]

Short Circuit Protection

Voltage

V_SCP1

V_SCPR

V_SCPHYS

I_SCP

1.1

1.15

-

1.2

1.25

50

1.3

1.35

-

V

Short Circuit Protection

Release Voltage

Short Circuit Protection

Hysteresis Voltage

mV

mA

V

SCP Terminal Source Current

0.2

1.15

10

1.0

1.30

20

2.0

1.45

45

SCP Terminal Source Current

ON Voltage

V_SCP2

t_SCP2

SCP Delay Time

[ PBUS ]

µs

Input High Voltage

V_PBUSH

V_PBUSL

V_PBUSHYS

I_PBUS

2.40

-

V

Input Low Voltage

-

0.6

-

Hysteresis Voltage

200

150

-

mV

μA

V

PBUS Terminal Source Current

75

-

300

0.6

5.5

10

V_EN= 5V

PBUS Terminal

Output Low Voltage

R_PBUS

I_{PBUS_EXT}= 3mA

I_{PBUS_EXT}= -10μA

V_PBUS= 7V

PBUS Terminal

Output High Voltage

V_{PBUS_OH}

I_{PBUS_LEAK}

3.5

-

4.5

-

V

PBUS Terminal

Leakage Current

μA

[ EN ]

Input High Voltage

V_ENH

V_ENL

V_ENHYS

I_EN

2.4

-

0.6

-

V

Input Low Voltage

Hysteresis Voltage

-

60

7

mV

μA

Terminal Input Current

[ UVLO VIN ]

15

V_EN= 5V

UVLO Detection Voltage

V_UVLOD

V_UVLOR

V_HYS

3.88

4.25

-

4.10

4.50

0.4

4.32

4.75

-

V

V_IN: Sweep down

V_IN: Sweep up,

V_REG> 3.75V

UVLO Release Voltage

UVLO Hysteresis Voltage

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Typical Performance Curves (Reference Data)

(Unless otherwise specified Ta = 25°C, V_IN= 13V, C_VREG= 1.0µF, Transistor PNP = 2SAR573D3FRA)

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

6.0

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

Ta=125°C

Ta= 25°C

Ta=-40°C

Ta=125°C

Ta= 25°C

Ta=-40°C

0

2

4

6

8

10 12 14 16 18 20

VIN[V]

0

2

4

6

8

10 12 14 16 18 20

VIN[V]

Figure 1. I_VIN2vs V_IN

Figure 2. V_REGvs V_IN

500

400

300

200

100

0

5.25

5.20

5.15

5.10

5.05

5.00

4.95

4.90

4.85

4.80

4.75

-50 -25

0

25 50 75 100 125 150

Temp[°C]

0

2

4

6

8

10

12

14

RFB1+RFB2[Ω]

Figure 3. V_REGvs Temp

Figure 4. I_LEDvs R_FB1+R_FB2

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Typical Performance Curves (Reference Data)

(Unless otherwise specified Ta = 25°C, V_IN= 13V, C_VREG= 1.0µF, Transistor PNP = 2SAR573D3FRA)

690

680

670

660

650

640

630

620

610

5

4

3

2

1

0

-1

-2

-3

-4

-5

ΔI_LED= (I_LED/ (0.65V / R_FB1+R_FB2))-1)x100[%]

0

2

4

6

8

10

12

14

-50 -25

0

25 50 75 100 125 150

Temp[°C]

RFB1+RFB2[Ω]

Figure 5. ΔI_LEDvs R_FB1+R_FB2

Figure 6. V_FBREGvs Temp

800

700

600

500

400

300

200

100

0

760

750

740

730

720

710

700

690

680

Ta= 25°C

Ta=-40°C

Ta=125°C

-50 -25

0

25 50 75 100 125 150

Temp[°C]

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

VDCDIM[V]

Figure 7. V_FBREGvs V_DCDIM

Figure 8. D_DGvs Temp

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Typical Performance Curves (Reference Data)

(Unless otherwise specified Ta = 25°C, V_IN= 13V, C_VREG= 1.0µF, Transistor PNP = 2SAR573D3FRA)

800

700

600

500

50

45

40

35

Ta= 25°C

Ta=-40°C

400

300

200

100

0

30

25

20

15

10

Ta=125°C

Ta= 25°C

Ta=-40°C

4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0

VIN[V]

6

11 16 21 26 31 36 41 46 51 56

VIN[V]

Figure 9. I_BASEvs V_IN

Figure 10. V_FBREGvs V_IN

42.0

41.5

41.0

40.5

40.0

39.5

39.0

38.5

38.0

42.0

41.5

41.0

40.5

40.0

39.5

39.0

38.5

38.0

-50 -25

0

25 50 75 100 125 150

-50 -25

0

25 50 75 100 125 150

Temp[℃]

Figure 11. I_CRTvs Temp

Figure 12. I_OPMvs Temp

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Features Description

(Unless otherwise specified, Ta=25°C, V_IN=13V, Transistor PNP = 2SAR573D3FRA, and numbers are “Typical” values.)

1. LED Current Setting

LED current I_LEDcan be defined by setting resistances R_FB1and R_FB2

.

푉

퐹퐵푅퐸퐺

[ ]

퐴

퐼_퐿퐸퐷

=

ꢀ_퐹퐵1+ ꢀ_퐹퐵2

where:

V

_FBREGis the FB Terminal Voltage 650mV (Typ)

• How to connect LED current setting resistors

LED current setting resistors must always be connected at least in pair arranged in series as below.

If only one current setting resistor is used, then in case of a possible resistor short, the external PNP Tr. and LED

may be broken due to large current flow.

PNP Tr. rating current, LED rating current, R_FB1and R_FB2must have the following relations:

푉

퐹퐵푅퐸퐺

[ ]

퐴

퐼_{퐿퐸퐷_푀푎푥}> 퐼_{푃푁푃_푀푎푥}

>

ꢁꢂ푛(ꢀ_퐹퐵1, ꢀ_퐹퐵2

)

where:

I

V

_{LED_Max}is the LED Rating Current

_{PNP_Max}is the PNP Tr. Rating Current

_FBREGis the FB Terminal Voltage 650mV(Typ)

Min(R_FB1,R_FB2) is the Lowest value of R_FB1and R_FB2

R

FB1

FB2

VIN

FB

+B

EN

VREG

BASE

VCE(SAT)

VREG

GND

VREF

C

VREG

ILED

Figure 13. LED Current Setting

• Constant current control dynamic range

Constant current control dynamic range of LED current I_LEDcan be calculated as follows.

[ ]

푉

푉 ≥ 푉

∙ ꢄ + 푉

+ 푉

ꢃ푁

푓_퐿퐸퐷

퐶퐸_푃푁푃

퐹퐵푅퐸퐺

where:

V

_INis the VIN Terminal Voltage

_{f_LED}is the LED Vf

N is the Number of Rows of LED

V

_CE(sat)is the External PNP Tr. Collector-Emitter Saturation Voltage

_FBREGis the FB Terminal Voltage 650mV(Typ)

2. Reference-Voltage (VREG)

VIN terminal generates 5.0V (Typ). This voltage is used as power source for the internal circuit, and also used to fix the

voltage of terminals outside LSI to HIGH side. VREG terminal must be connected with C_VREG= 1.0μF to 4.7μF to ensure

capacity for the phase compensation. If C_VREGis not connected, the circuit behavior would become extraordinarily unstable,

for example with the oscillation of the reference-voltage.

VREG terminal voltage must not be used as power source for other devices than this LSI.

VREG circuit has a built-in UVLO function. The IC is activated when the VREG terminal voltage rises to 4.0V (Typ) or higher,

and shut down when the VREG terminal voltage drops to 3.75V(Typ) or lower.

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3. Table of Operations

The PWM dimming mode switches to DC control depending on CRT terminal voltage.

When V_IN> 22.0V (Typ), LED current is limited to reduce the heat dissipation of external PNP Tr.

Depending on OP/SCP terminal voltage status, output current is turned OFF. Output current is also turned OFF

when Low signal is input to PBUS terminal.

In addition, UVLO, TSD further increases system reliability

For each functions, please refer to Features Description.

Detecting Condition

Operation

Mode

CRT

Terminal

LED Current

(I_LED)

PBUS Terminal

Hi-Z

[Detect]

[Release]

Stand-by

Mode^(Note1)

-

V_EN≤ 0.6V

V_EN≥ 2.4V

OFF^(Note3)

V_CRT

2.0V(Typ)

≥

High

(4.5V(Typ))

DC

-

50mA to 400mA

See Features

Description, 4.

See Features

Description, 4.

High

(4.5V(Typ))

PWM Dimming

DC Dimming

-

V_DCDIM

1.0V(Typ)

≤

See Features

Description, 9.

High

(4.5V(Typ))

-

V_DCDIM> 1.25V

Over Voltage

Mute

V_IN

22.0V(Typ)

>

V_IN

22.0V(Typ)

≤

See Features

Description, 11.

High

(4.5V(Typ))

LED Open

Detection^(Note2)

V_OP

≥

V_OP

<

OFF^(Note3)

Low

V_IN–1.2V(Typ)

V_IN– 1.2V(Typ)

Short Circuit

Protection

(SCP)

V_SCP

1.2V(Typ)

≤

V_SCP≥

1.25V(Typ)

PBUS Control

OFF

Input

V_PBUS≤ 0.6V

V_PBUS≥ 2.4V

V_IN≤ 4.1V(Typ)

or

V_IN≥ 4.5V(Typ)

or

High

(4.5V(Typ))

OFF^(Note3)

UVLO

TSD

-

V_REG≤ 3.75V(Typ)

V_REG≥ 4.0V(Typ)

Tj ≥

Tj ≤

OFF^(Note3)

Hi-Z

175C(Typ)

150C(Typ)

(Note1) Circuit Current 0μA(Typ)

(Note2) In regard to the sequence of LED current OFF, see Features Description, 5.

(Note3) BASE Terminal Current: OFF, and LED Current (I_LED): OFF.

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4. PWM Dimming Operation using external RC network

PWM Dimming is performed with the following circuit.

The ramp up/down time of the CRT voltage, and therefore the dimming cycle and Duty, can be set by values of the external

components (CCRT, RCRT).

Please connect CRT to VIN and DISC to GND or open if it is not used.

The CR timer function is activated if DC SW is OPEN. To perform PWM light control of LED current, a triangular

waveform is generated at CRT terminal. The LED current (I_LED) is turned OFF while CRT voltage is ramping up,

and LED current(I_LED) is turned ON while CRT voltage is ramping down.

When VCRT > V_{CRT_DIS1}(2.0V(Typ)), Dimming mode turns to DC Control. When VCRT > V_{CRT_DIS2}(2.4V(Typ)),

discharge resistance of DISC terminal changes from R_DISC1(50Ω(Typ)) to R_DISC2(5kΩ(Typ)).

PWM SW

ON

VIN

EN

VREG

FB

DC SW

OPEN

VREG

Control

Logic

BASE

ICRT

VREF

CRT

CCRT

RCRT

ILED

VCRT_DIS1

VCRT_DIS2

GND

DISC

RDISC1

RDISC2

PWMOUT

Figure 14. PWM Dimming Operation

CRT Voltage

Ramp-up

CRT Voltage

Ramp-down

VCRT_DIS1

VCRT_CHA

2.0V(Typ)

CRT Terminal

Waveform

⊿VCRT

0.8V(Typ)

tOFF

tON

⊿VCRT×CCRT

V

CRT_CHA

tOFF

=

=RCHA×CCRT

tON= - (RCRT+ RDISC1)×CCRT×ln

ICRT

V

CRT_DIS1

5V

0V

PWMOUT Terminal

Waveform

LED Current

I

LED

I

LED

I

LED

I

LED

I

LED

I

LED

OFF

ON

OFF

ON

OFF

ON

ILED

Figure 15. PWM Dimming Operation

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(1) CRT Ramp up Time t_OFFand CRT Ramp down Time t_ON

CRT Ramp up Time t_OFFand CRT Ramp down Time t_ONcan be defined from the following equations.

Make sure that t_ONis set > PWM Minimum Pulse Width t_MIN:10μs (Min).

∆푉 × ꢅ_퐶푅푇

퐶푅푇

[ ]

= ꢀ_퐶퐻ꢆ× ꢅ_퐶푅푇푠

푡_푂퐹퐹

=

퐼_퐶푅푇

푉

퐶푅푇_퐶퐻ꢆ

(

)

[ ]

ꢈ 푠

푡_푂푁= − ꢀ_퐶푅푇+ ꢀ_{퐷ꢃ푆퐶1}× ꢅ_퐶푅푇× 퐼푛 ꢇ

푉

퐶푅푇_퐷ꢃ푆1

where:

I_CRTis the CRT Terminal Charge Current

R_CHAis the CRT Terminal Charge Resistor

R_DISC1is the DISC Terminal ON Resistor1

V_{CRT_CHA}is the CRT Terminal Charge Voltage

V_{CRT_DIS1}is the CRT Terminal Discharge Voltage1

40μA(Typ)

30kΩ(Typ)

50Ω(Typ)

0.8V(Typ)

2.0V(Typ)

(2) PWM Dimming Frequency f_PWM

PWM frequency is defined by t_ONand t_OFF

.

ꢊ

[ ]

ꢋ푧

ꢉ

푃푊푀

=

푡_푂푁+ 푡_푂퐹퐹

(3) ON Duty(D_ON

)

Like the above, PWM ON duty is defined by t_ONand t_OFF

.

푡_푂푁

푡_푂푁+ 푡_푂퐹퐹

[ ]

%

ꢌ_푂푁

=

(Example) In case of R_CRT=3.6kΩ, C_CRT=0.1μF (Typ)

t_OFF= R_CHA× C_CRT= 30kΩ × 0.1μF = 3.0ms

t_ON= - (R_CRT+ R_DISC1) × C_CRT× ln(V_{CRT_CHA}/ V_{CRT_DIS1})= - (3.6kΩ + 50Ω) × 0.1μF × ln(0.8V / 2.0V) = 0.334ms

f_PWM= 1 / (t_ON+ t_OFF) = 1 / (3.0ms + 0.334ms) = 300Hz

D_ON

= t_ON/ (t_ON+ t_OFF) = 0.334ms / (3.0ms + 0.334ms) =10.0%

[PWM Dimming Operation using external signal]

In case external PWM input to CRT terminal,

Make sure that input pulse High voltage >2.2V and

pulse Low voltage<0.72V.

VIN

EN

VREG

Also please open DISC terminal or connect to GND.

FB

Control

Logic

VREG

BASE

ICRT

VREF

μ-Con

or

CRTIMER

CRT

ILED

GND

DISC

Figure 16. PWM Dimming Operation using external signal

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• About a reverse connection protection diode

Caution on using Reverse protection Diode

With temperature, reverse current I_rof diode (D2, D3) can affect the charge and discharge current to capacitance C1.

It is recommended to choose a diode (D2, D3) with Ir value less than 1μA. To avoid High-Z at point A,a resistor R_DCINof

10kΩ is also recommended between Point A and GND.

CRT rise / fall time deviation from set values

①

↓

During the PWM dimming operation mode, the A-point on Figure.17 becomes Hi-Z

②

Reverse current Ir of D2 and D3 goes to the A-point

(Power supply voltage is being input into the cathode of D2, so reverse current of D2 goes to mainly into C1)

⇒Reverse current Ir of D3 is added to the CRT terminal charge current and discharge current,

so CRT start-up / fall time deviates from the settings.

↓

③

C1 gets charged, voltage at A-point rises

Voltage at A-point exceeds voltage in CRT terminals of each IC

Vf occurs in the diodes D3

↓

④

↓

⑤

↓

⑥

D3 circulate forward current If

⇒Forward current If of D3 is added to the CRT terminal charge current and discharge current,

so CRT start-up / fall time deviates from the settings.

↓

⑦

Repetition ②-⑥

D1

D2

VIN

EN

FB

BASE

A point

BD18340FV-M

BD18341FV-M

Ir

D3

CRT

If

RDCIN

C1

Vf

GND

DISC

Figure 17. how reverse protection diode affects the CRT terminal rise/fall time

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5. LED Open Detection Function

The IC can detect LED open condition when the OP terminal voltage (V_OP) meets the following condition: V_OP> V_IN- 1.2V

(Typ). As soon as V_OP> V_IN- 1.2 V (Typ) condition is achieved, D terminal source current (230μA (Typ)) turns on and starts

charging the disable LED open detection time setting capacitor (C_D).

Once the D terminal voltage (V_D) becomes higher than 1.0 V (Typ) and 1μs (Typ) elapses, the BASE terminal sink current

(I_BASE) is latched OFF and PBUS terminal voltage (V_PBUS) is switched to Low.

[Base Current Limit Resistance (R_LIM)]

The OP terminal voltage V_OPis defined by the following formula:

(Note that the external PNP Tr. goes into the saturation mode when the collector is open)

(

)

[ ]

푉_푂푃= 푉 − { ꢀ_퐹퐵1+ ꢀ_퐹퐵2× 퐼_{퐵ꢆ푆퐸_푀푎푥}+ 푉_{퐶퐸_푃푁푃}} 푉

ꢃ푁

[ ]

퐴

퐼_{퐵ꢆ푆퐸_푀푎푥}= 6.0푉/ꢀ_퐿ꢃ푀

ꢍ

ꢎ

퐼_{퐵ꢆ푆퐸_푀푎푥}< 80푚퐴

where:

R_FB1, R_FB2is the LED Current Setting Resistance

I_{BASE_Max}is the Maximum BASE Terminal Sink Current

R_LIMis the BASE Terminal Sink Current Limit Resistance

V_{CE_PNP}is the External PNP Tr. Collector-Emitter Voltage (Note: I_CE=I_OP(23 μA (Max)))

Please determine the BASE current limit resistance R_LIMto ensure that the OP terminal voltage when the LED is open should

meet the following condition: V_OP> V_IN- 1.2 V (Typ).

Also note that the BASE current limit resistance must meet the following condition in order to obtain the BASE current to be

needed during normal LED operation.

[ ]

퐴

4.0/ꢀ_퐿ꢃ푀> 퐼_퐿퐸퐷/ℎꢉ푒_{_푀ꢃ푁}

where:

hfe_{_MIN}is the Minimum External PNP Tr. hfe

Disable LED open detection time t_D, or the length of time from the moment the OP terminal voltage meets the condition “V_OP

> V_IN- 1.2 V (Typ)” until the moment the BASE terminal sink current (I_BASE) is latched OFF, can be defined by the following

formula. Note that the disable time must be shorter than the ON pulse width of the PWM dimming.

ꢅ_퐷× 푉_퐷퐻

[ ]

푠

푡_푂푁> 푡_퐷=

퐼_퐷

where:

_ONis the ON pulse width of the PWM dimming(CRT Ramp down Time)

C_Dis the disable LED open detection time setting capacitor

_DHis the D Terminal Input Threshold Voltage 1.0V (Typ)

t

V

I_Dis the D Terminal Source Current 230μA (Typ)

To reset the latched off LED current, EN must be turned-on again (The time when EN Terminal is ”L”: more than 50μs )

or the condition “UVLO (V_IN< 4.1 V or V_REG< 3.75 V)” must be fulfilled.

VIN

LED

OPEN

Discharge Co

by OP terminal input current(21μA)

RFB1

RFB2

OP Terminal

Voltage

VOP

VIN

FB

VIN - 1.2V(Typ)

VF_LED

DRV

PBUS

BASE

PBUS

VCE_PNP

RLIM

LED Open

Detection

Comparator

Output

IBASE

OPEN

Control

Logic

LED OPEN

OP

VOP

1.0V

230uA

1.2V

(Typ)

D Terminal

Voltage

VD

1μs

(Typ)

CLED

VD

CD×1.0V

230μA

D

D COMP

ILED

DELAY

1μs

CD

PBUSTerminal

Voltage

1.0V

VPBUS

I

BASE：OFF(DRV：OFF)

GND

I

BASE：ON

Latch Release Condtion :

(DRV：ON)

EN：H →Lor UVLO：detect

Figure 18. LED Open Detection Timing Chart

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6. Disable LED Open Detection Function at Reduced-Voltage

The disable LED open detection function serves to prevent false detection of LED open at the reduced-voltage during the

ramp-up/ramp-down of the VIN terminal voltage. LED open will not be detected until the VIN terminal Disable Open

Detection Voltage at Reduced-Voltage (V_{IN_OPM}). Once V_{IN_OPM}is surpassed, the LED current will be latched OFF (BASE

terminal sink current (I_BASE) is latched OFF) and the PBUS voltage will be switched to Low following the sequence explained

in Description of Functions 5.

V_{IN_OPM}must be defined by the following formula. (The OPM terminal voltage must be set between 1.0 V to 2.2 V.)

VIN

[ ]

ꢃ푁_푂푃퐸푅푅

푉

≥ 푉

푉

ꢃ푁_푂푃푀

FB

where:

V_{IN_OPM}is theVIN Terminal Disable Open Detection Voltage

at Reduced-Voltage

V_{IN_OPERR}is the VIN Terminal Open Erroneous Detection Voltage

at Reduced-Voltage

Control

Logic

VCE_PNP

VREG

BASE

IOPM

VREF

(

) [ ]

푉

= 푉_푂푃푀× 6.0 ꢏ푦푝

OPM

ꢃ푁_푂푃푀

OPEN

MASK

OPENLOAD

OP

Vf_LED×N

[ ]

푉_푂푃푀= 퐼_푂푃푀× ꢀ_푂푃푀

푉

ROPM

VOPD=1.2V

[ ]

푉

= 푉 × ꢄ + 푉_푂푃퐷

ꢃ푁_푂푃퐸푅푅

푓_퐿퐸퐷

GND

where:

V_OPMis the OPM Terminal Voltage

I_OPMis the Terminal Source Current 40 μA (Typ)

R_OPMis the OPM Terminal Connection Resistance

V_{f_LED}is the LED Vf

Figure 19. Disable LED Open Detection Function

at Reduced-Voltage

N is the Number of Rows of LED

V_OPDis the LED Open-Circuit Detection Voltage 1.2 V (Typ)

VIN_OPERR

VIN_OPM

VIN__OPM VIN_OPERR

VIN >

Vf_LED × N + VCE_PNP + VFBREG

VIN

Controllable Range of

constant current

Disable

LED Open

Detection

Area

Disable

LED Open

Detection

Area

VIN

VOPD =VIN -1.2V

LED Open

Detection

Area

LED Open

Detection

Area

VOP

VOP = Vf_LED × N

ILED

4.5V

VPBUS

Figure 20. VIN Terminal Disable LED Open Detection Voltage and LED Open Erroneous Detection Voltage

at Reduced-Voltage

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7. Short Circuit Protection (SCP)

Short Circuit Protection function lowers the SCP terminal voltage when the collector of the external PNP Tr. is grounded.

After a lapse of the short circuit protection delay time (t_SCP)(20μs(Typ)) following the drop of the SCP terminal

voltage (V_SCP) under 1.2V(Typ), the external PNP Tr. is turned OFF to prevent its thermal destruction, and the PBUS

terminal is switched to Low to communicate the faulty condition.

In order to avoid malfunction, the Short Circuit Protection function will not be activated until CRT > 2.0 V(Typ)

after UVLO is reset.

In case where the short circuit (V_SCP< 1.2V(Typ)) is present from the beginning when the power is turned on,

the short circuit protection function will be activated 60µs(Typ) after V_CRT> 2.0V(Typ) condition is reached.

VIN

FB

BASE

EN

VREG

VREF

VIN

PBUS

Control

Logic

PBUS

ILED

SCP

SHORT

GND

20µs

Filter

1.2V ⇔1.25V

Short

Circuit

Short Circuit

4.5V

VIN

2.0V

V

CRT

SCP

1.25V

ON

1.25V

ON

1.2V

V

ON

60μs

20μs

OFF

High

OFF

Low

OFF

ILED

High

Low

VPBUS

Figure 21. Short Circuit Protection (SCP)

• SCP Terminal Source Current

The SCP terminal sources the SCP terminal source current (1mA (Typ)) once its voltage (V_SCP) drops under 1.3V in order to

prevent the malfunction of the short circuit protection.

VIN

FB

EN

1.3V(Typ)

VREG

BASE

VSCP

VREF

0V

PBUS

GND

PBUS

VIN

Control

Logic

SCP

1.25V ⇔1.3V

1.0mA(Typ)

0mA

SCP

ISCP

20µs

Filter

ISCP

1.2V⇔1.25V

Figure 22. SCP Terminal Source Current

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8. About the capacitor of connecting LED anode

During PWM Mode, the output (LED anode) will be high impedance (‘Hi-Z’). During this time noise (Note1) can couple on

to this pin and cause false detection of SHORT condition.

To prevent this it is necessary to connect a Capacitor (0.1µF to 0.68µF) between LED anode and GND terminal nearby

terminal

(Note1) Conducted noise, Radiated noise, Crosstalk of connecter and PCB pattern etc…

Make sure that the capacitor of connecting LED anode is the following equation:

[

]

0.ꢊ ≤ ꢅ_퐿퐸퐷≤ 0.68 휇ꢐ

In case above range is exceeded, the I_LEDcurrent becomes dull, so please evaluate I_LEDwaveform in PWM mode operation.

(Please refer to the following waveform).

About the example of evaluation, please see to the following waveform.

In case a capacitor exceeding the recommended range (above 0.68μF) is connected to LED anode, there is a

possibility that delay time of start-up will reach about several decades ms, so special attention is needed.

VIN

EN

VREG

FB

Control

Logic

VREG

BASE

ICRT

VREF

CRT

CLED

GND

DISC

ILED

PWMOUT

Figure 23. About the capacitor of connecting LED anode

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Evaluation example (ILED pulse width at PWM Dimming operation)

Condition: +B = 13V

Ta = 25°C

LED = 1 Strings

C_CRT= 0.01μF

R_DISC= 1.0kΩ

PWM Dimming Mode

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9. LED Current De-rating Function (DC Dimming Function)

The LED current (I_LED) will be cut down once the DCDIM terminal voltage goes under 1.0 V (Typ).

If LED de-rating function is not used, please DCDIM terminal must be kept 1.25V or more always and as stable as possible.

Any ripples at DCDIM terminal will cause oscillations in output current I_LED.It is recommended to insert a capacitor at

DCDIM terminal.

Steep changes in the DCDIM terminal voltage also might affect the ability of the output amplifier to keep up with the

changes. So Please evaluate I_LEDwaveform on actual board_.

The LED current de-rating function can be defined by the following formula:

ꢀ_푁푇퐶

ꢀ_푁푇퐶+ ꢀ_{퐷퐶퐷ꢃ푀}

[ ]

푉

푉_{퐷퐶퐷ꢃ푀}= 푉

∙

푅퐸퐺

(

)

( ) [ ]

− ꢊ.0푉 − 푉_{퐷퐶퐷ꢃ푀}× ꢌ_퐷퐺푉

퐹퐵푅퐸퐺

푉

퐹퐵푅퐸퐺

푉_{퐷퐶퐷ꢃ푀}< ꢊ.0푉 = 푉

where:

R_DCDIMis The Resistor for setting DC Dimming

R_NTCis the NTC Thermistor Resistance

V_FBREGis the FB Terminal Voltage VIN – 650 mV (Typ)

D_DGis the DCDIM Dimming Gain 725 mV/V (Typ)

VIN

FB

EN

BASE

VREG

VREF

VREG

R

DCDIM

DC Dimming

DCDIM

ILED

GND

1.0V

R

NTC

ILED

for Prevention

Chattering

VFBREG

(VIN-VFB

)

[mV]

650

466

284

175

0

0.35 0.5

0.75

1.0

1.25

VDCDIM [V]

Figure 24. LED Current De-rating Function (DC Dimming Function)

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10. PBUS Function

The PBUS terminal has two functions. When the IC detects OPEN/SHORT of LED’s the PBUS is pulled LOW.

It is also possible to turn OFF I_LEDcurrent by externally pulling the PBUS to LOW voltage. This feature is useful when

multiple this IC’s are used to drive LED loads. An OPEN/SHORT detection by one IC can be used to turn OFF current of

other driver IC’s. (Please refer connection diagram below)

Caution of using PBUS terminal

Do not connect to the PBUS terminal other than below items list due to the difference of ratings, internal threshold

voltages, and so on. (BD18340FV-M, BD18341FV-M, BD18342FV-M, BD18343FV-M, BD18345EFV-M, BD18337EFV-M,

BD18347EFV-M)

FB

VIN

EN

VIN

EN

BASE

BD18340FV-M

BD18341FV-M

BD18340FV-M

BD18341FV-M

OP

CH 1

CH 2

PBUS

GND

LED

OPEN

LED

OFF

communication each other by PBUS

Figure 25. PBUS Function

▼Example of Protective Operation due to LED Open Circuit

①CH1 LED

Open

CH1 PNP Tr.

Collector

Voltage

ON

CH1 ILED

OFF

②After CH1LED Open Detection Mask time

LED：Latch OFF

I

V

PBUS：High→Low

V

PBUS

CH2 PNP Tr.

Collector

③VPBUS：High→Low

CH2 PNP Tr. : OFF

Voltage

ON

CH2 ILED

OFF

Figure 26. Example of Protective Operation

If LED OPEN occurs, PBUS of CH1 is switched from Hi-Z to Low output. As PBUS becomes Low, LED drivers of

other CH detect the condition and turns OFF their own LEDs. LED anode clamps to 1.3V (Typ) during

the OFF period, in order to prohibit ground fault detection.

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11. Over Voltage Mute Function (OVM)

Once the VIN terminal voltage (V_IN) goes above 22.0 V (Typ), the over voltage mute function is activated to decrease the

LED current (I_LED) in order to suppress heat generation from the external PNP Tr.

The FB terminal voltage V_FBREGwhich controls the LED current (I_LED) will decay at -25 mV/V (Typ).

VIN

FB

BASE

EN

VREG

Over

Voltage

Mute

VREF

GND

VIN-VFB [mV]

22.0V(Typ)

650

-25mV/V(Typ)

Output current is

muted by power

supply overvoltage

0

VOVMS

VIN [V]

Figure 27. Overvoltage Mute Function (OVM)

12. Under voltage Lockout (UVLO)

UVLO is a protection circuit to prevent malfunction of the IC when the power is turned on or then the power is suddenly shut

off.

This IC has two UVLO circuits; UVLO VIN for V_INand UVLO VREG for V_REG

.

As soon as UVLO status is detected, BASE terminal sink current will be turned off to switch OFF the LED current (I_LED).

The following shows the threshold conditions of both UVLO circuits.

Detection Conditions

LED Current

Operating Mode

PBUS Terminal

(I_LED)

[Detect]

[Release]

High output

(4.5 V (Typ))

UVLO VIN

OFF^(Note1)

V_IN≤ 4.1 V(Typ)

V_IN≥ 4.5 V(Typ)

High output

(4.5 V (Typ))

UVLO VREG

OFF^(Note1)

V_REG≤ 3.75V(Typ)

V_REG≥ 4.0 V(Typ)

(Note 1) BASE terminal sink current is turned OFF to switch OFF the LED current I_LED

.

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Timing Chart

(Unless otherwise specified Ta=25°C, VIN=13V, Transistor PNP=2SAR573D3FRA, LED2strings, Value is Typical.)

PWM Dimming Mode

DC Mode

EN

reclosing

EN

reclosing

OUTPUT

GND

OUTPUT

GND

LED

OPEN

SHORT

OPEN

SHORT

13V

4.5V

VIN

4.1V

VEN

2.4V

0.6V

2.4V

0.6V

4.0V

V

REG

CRT

13V

V

1.0V

VD

VIN-1.2V

1.25V

V

OP

SC P

1.25V

1.2V

1.25V

1.2V

20μs

V

PBU S

V

FBREG

ILED

Output

Latch OFF

Output

Latch OFF

Figure 28. Timing Chart

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Recommended Application Circuit

(1) ILED=120mA

RFB1

RFB2

DC_in

D1

VIN

EN

FB

ZD1

CVIN1

CVIN2

BASE

Q1

CRT

OP

U1

SCP

CLED

BD18340FV-M

DISC

D

BD18341FV-M

VREG

CD

CVREG

ROPM

PWMOUT

PBUS

OPM

GND

DCDIM

Figure 29. Recommended Application Circuit1 (I_LED120mA, LED white 2strings)

Recommended Parts List1 (I_LED120mA, LED white 2strings)

Parts

IC

No

U1

Parts Name

BD18340FV-M/BD18341FV-M

RFN2LAM6STF

Value

-

UNIT

-

Product Maker

ROHM

D1

-

ROHM

Diode

Z_D1

TND12H-220KB00AAA0

2SAR573D3FRA

-

NIPPON CHEMICON

ROHM

PNP Tr.

Q1

-

R_FB1

R_FB2

R_OPM

C_VIN1

C_VIN2

C_VREG

C_D

LTR10EVHFL2R70

2.7

39

4.7

0.1

1.0

0.01

0.1

Ω

ROHM

Resistor

LTR10EVHFL2R70

Ω

ROHM

MCR03EZPFX3902

kΩ

μF

ROHM

GCM32ER71H475KA40

GCM155R71H104KE37

GCM188R71E105KA49

GCM155R11H103KA40

GCM155R71H104KE37

murata

Capacitor

murata

C_LED

murata

(About Z_D1, please place according to Test Standard of Battery line.)

Please note the following

1. External PNP transistor

For external PNP transistor, please use the recommended device 2SAR573D3FRA for this IC.

While using non-recommended device, validate the design on actual board.

Please check hfe of the part to design base current limit resistor. (See Features Description, section 5). As for parasitic

capacitance (C_LEDconnected at LED anode), The more it is small overshoot will be smaller. Please use devices that parasitic

capacitance smaller than recommended device, also parasitic capacitance is possible to variation by PCB layout.

So please evaluate over shoot of I_LEDon actual board. (See Features Description, Section 8 -Evaluation example, ILED

pulse width at PWM Dimming operation).

2. Power supply steep variation

This IC is validated with test conditions as per ISO7637-2 standards.

There is possibility of unexpected LED regulation due to sudden transients outside the specification range standards in input

power supply.Please check the maximum ratings of LED and evaluate on actual board for any unexpected LED regulation.

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(2) ILED=120mA, PWM ON Duty=10%

RFB1

RFB2

VIN

EN

FB

PWM_in

D1

ZD1

CVIN1

CVIN2

BASE

Q1

D2

CRT

OP

DC_in

D3

CCRT

RCRT

U1

SCP

CLED

BD18340FV-M

BD18341FV-M

DISC

D

RDCIN

VREG

CD

CVREG

PWMOUT

PBUS

OPM

ROPM

GND

DCDIM

Figure 30. Recommended Application Circuit 2

(I_LED120mA , LED white 2strings, PWM ON Duty: 10%(Pulse width: 0.334ms), PWM frequency: 300Hz)

Recommended Parts List 2

(I_LED120mA, LED white 2strings, PWM ON Duty: 10%(Pulse width: 0.334ms),PWM frequency: 300Hz)

Parts

IC

No

U1

Parts Name

BD18340FV-M/BD18341FV-M

RFN2LAM6STF

Value

-

UNIT

-

Product Maker

ROHM

D1,D2

D3

-

ROHM

Diode

RFN1LAM6STF

-

ROHM

Z_D1

TND12H-220KB00AAA0

2SAR573D3FRA

-

NIPPON CHEMICON

ROHM

PNP Tr.

Q1

-

R_FB1

R_FB2

R_CRT

R_OPM

R_DCIN

C_VIN1

C_VIN2

C_VREG

C_CRT

C_D

LTR10EVHFL2R70

2.7

3.6

39

2

Ω

ROHM

LTR10EVHFL2R70

Ω

ROHM

Resistor

MCR03EZPFX3601

MCR03EZPFX3902

ESR10EZPF2001

kΩ

μF

ROHM

GCM32ER71H475KA40

GCM155R71H104KE37

GCM188R71E105KA49

GCM155R71H104KE37

GCM155R11H103KA40

GCM155R71H104KE37

4.7

0.1

1.0

0.1

0.01

0.1

murata

Capacitor

murata

C_LED

murata

(About Z_D1, please place according to Test Standard of Battery line.)

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(3) ILED=524mA, PWM ON Duty=10%, LED Current De-rating function

RFB1

RFB2

VIN

EN

FB

PWM_in

DC_in

D1

D2

ZD1

CVIN1

CVIN2

BASE

Q1 to Q3

CRT

OP

D3

CCRT

RCRT

U1

SCP

CLED

BD18340FV-M

BD18341FV-M

DISC

D

RDCIN

VREG

CD

CVREG

PWMOUT

PBUS

OPM

ROPM

RDCDIM

GND

DCDIM

NTC

Figure 31. Recommended Application Circuit 3

(I_LED524mA, LED white 2strings, PWM ON Duty: 10%(pulse width: 0.334ms), PWM frequency: 300Hz)

Recommended Parts List 3

(I_LED524mA, LED white 2strings, PWM ON Duty: 10%(pulse width: 0.334ms), PWM frequency: 300Hz)

Parts

IC

No

U1

Parts Name

BD18340FV-M/BD18341FV-M

RFN2LAM6STF

Value

-

Unit

-

Product Maker

ROHM

D1,D2

D3

-

ROHM

Diode

RFN1LAM6STF

-

ROHM

Z_D1

TND12H-220KB00AAA0

2SAR573D3FRA

-

NIPPON CHEMICON

ROHM

PNP Tr.

Q1 to Q3

R_FB1

-

LTR10EVHFLR620

0.62

3.6

39

43

150

2

Ω

ROHM

R_FB2

LTR10EVHFLR620

Ω

ROHM

R_CRT

R_OPM

R_DCDIM

NTC

R_DCIN

C_VIN1

C_VIN2

C_VREG

C_CRT

C_D

MCR03EZPFX3601

MCR03EZPFX3902

MCR03EZPFX4302

NTCG104LH154JTDS

ESR10EZPF2001

kΩ

μF

ROHM

Resistor

ROHM

TDK

ROHM

GCM32ER71H475KA40

GCM155R71H104KE37

GCM188R71E105KA49

GCM155R71H104KE37

GCM155R11H103KA40

GCM155R71H104KE37

4.7

0.1

1.0

0.1

0.01

0.1

murata

Capacitor

murata

C_LED

murata

(About Z_D1, please place according to Test Standard of Battery line.)

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(4) ILED=120mA, Three rows drive, PWM ON Duty=10%, LED Current De-rating function

RFB11

RFB12

RFB21

RFB22

RFB31

RFB32

VIN

EN

FB

PWM_in

DC_in

D1

D2

D3

R1

R2

R3

RLIM

ZD1

CVIN1

CCRT

CVIN2

BASE

Q1

Q2

Q3

D4

D5

D6

CRT

OP

SCP

RCRT

U1

DISC

D

BD18340FV-M

BD18341FV-M

RDCIN

VREG

CLED1

CLED2

CLED3

CD

CVREG

PWMOUT

PBUS

OPM

ROPM

RDCDIM

GND

DCDIM

ILED1

ILED2

ILED3

NTC

Figure 32. Recommended Application Circuit 4

(I_LED1~3120mA, LED white 2strings×3, PWM ON Duty: 10%( pulse width: 0.334ms), PWM frequency: 300Hz)

Recommended Parts List 4

(I_LED120mA, LED white 2strings, PWM ON Duty: 10%(pulse width: 0.334ms), PWM frequency: 300Hz)

Parts

IC

No

U1

Parts Name

BD18340FV-M/BD18341FV-M

RFN2LAM6STF

Value

UNIT

Product Maker

ROHM

murata

-

D1,D2

D3

Diode

RFN1LAM6STF

D4 to D6

Q1 to Q3

R_LIM

DA228UFH

PNP Tr.

2SAR573D3FRA

-

MCR03EZPFX1000

100

2.7

3.6

39

Ω

R_FB11, R_FB21, R_FB31LTR10EVHFL2R70

R_FB12, R_FB22, R_FB32LTR10EVHFL2R70

Ω

Resistor

R_CRT

R_OPM

MCR03EZPFX3601

kΩ

Ω

MCR03EZPFX3902

R_DCIN

ESR10EZPF2001

2

R1 to R3

C_VIN1

MCR03EZPFX51R0

GCM32ER71H475KA40

GCM155R71H104KE37

GCM188R71E105KA49

GCM155R71H104KE37

GCM155R11H103KA40

GCM155R71H104KE37

51

4.7

0.1

1.0

0.1

0.01

0.1

μF

C_VIN2

C_VREG

Capacitor

C_CRT

C_D

C_LED1to C_LED3

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Thermal Loss

Thermal design should meet the following equation:

ꢑ_푑> ꢑ_퐶

ꢍ

ꢎ ꢍ

ꢎ

− ꢏ_푇

ꢑ_푑= ꢊ/휃_퐽ꢆ∙ ꢏ

− ꢏ 표푟 ꢊ/훹 ∙ ꢏ

푗ꢒ푎푥

푎

퐽푇

푗ꢒ푎푥

ꢑ_퐶= 푉 ∙ 퐼_ꢓꢃ푁2+ 푉

∙ 퐼_퐵ꢆ푆퐸

ꢃ푁

퐵ꢆ푆퐸

where:

P_dis the Power Dissipation

P_cisthe Power Consumption

V_INisthe VIN Terminal Voltage

I_VIN2istheCircuit Current at Normal Mode

V_BASEisthe BASE Terminal Voltage

I_BASEisthe BASE Terminal Sink Current

Θ_JAisthe Thermal Resistance of Junction to Ambient

Ψ_JTisthe thermal Characterization Parameter of Junction to centerCase Surface

T_jmaxisthe Max Joint Temperature (150 °C)

T_aisthe Ambient Temperature

T_Tisthe Case Surface Temperature

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I/O equivalence circuits

Terminal

Name

Terminal

Name

No.

I/O Equivalent Circuit

No.

I/O Equivalent Circuit

VIN

(16Pin)

VREG

(10Pin)

1kΩ(Typ)

FB

(1Pin)

5.6kΩ(Typ)

1

FB

9

OPM

VREG

DCDIM

D

10kΩ(Typ)

OPM

(9Pin)

GND

(6Pin)

GND

(6Pin)

VIN

(16Pin)

VIN

(16Pin)

1kΩ

(Typ)

BASE

(2Pin)

VREG

(10Pin)

2

3

4

BASE

N.C

10

11

12

13

14

370kΩ

(Typ)

10kΩ(Typ)

92.5kΩ

(Typ)

GND

(6Pin)

GND

(6Pin)

VIN

(16Pin)

DCDIM

(11Pin)

10kΩ(Typ)

OP

(4Pin)

100kΩ(Typ)

OP

GND

(6Pin)

GND

(6Pin)

VREG

(10Pin)

VIN

(16Pin)

D

(12Pin)

100kΩ(Typ)

SCP

(5Pin)

5

6

7

SCP

GND

100kΩ(Typ)

GND

(6Pin)

GND

(6Pin)

VREG

(10Pin)

-

100kΩ(Typ)

CRT

(13Pin)

VREG

(10Pin)

CRT

GND

(6Pin)

PBUS

(7Pin)

PBUS

100kΩ(Typ)

10Ω

(Typ)

DISC

(14Pin)

GND

(6Pin)

VREG

(10Pin)

DISC

5kΩ

(Typ)

5.2V

(Typ)

10Ω

(Typ)

GND

(6Pin)

PWM

OUT

PWMOUT

(8Pin)

8

380Ω

(Typ)

EN

(15Pin)

GND

(6Pin)

260kΩ

(Typ)

150kΩ

(Typ)

1kΩ(Typ)

5.2V

1kΩ(Typ)

15

16

EN

5.2V

(Typ)

1080kΩ

(Typ)

143kΩ

(Typ)

1333kΩ

(Typ)

GND

(6Pin)

VIN

-

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Operational Notes

1. Reverse Connection of Power Supply

Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when

connecting the power supply, such as mounting an external diode between the power supply and the IC’s power

supply pins.

2. Power Supply Lines

Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at

all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic

capacitors.

3. Ground Voltage

Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.

OR

4. Ground Wiring Pattern

When using both small-signal and large-current ground traces, the two ground traces should be routed separately but

connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal

ground caused by large currents. Also ensure that the ground traces of external components do not cause variations

on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.

5. Thermal Consideration

Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may

result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the

board size and copper area to prevent exceeding the maximum junction temperature rating.

6. Recommended Operating Conditions

These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.

The electrical characteristics are guaranteed under the conditions of each parameter.

7. Inrush Current

When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow

instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power

supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and

routing of connections.

8. Operation Under Strong Electromagnetic Field

Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.

9. Testing on Application Boards

When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may

subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply

should always be turned off completely before connecting or removing it from the test setup during the inspection

process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during

transport and storage.

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Operational Notes – continued

10. Inter-pin Short and Mounting Errors

Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in

damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.

Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and

unintentional solder bridge deposited in between pins during assembly to name a few.

11. Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

12. Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be

avoided.

Resistor

Transistor (NPN)

Pin A

Pin B

B

E

C

Pin A

B

C

E

P

P⁺

N

P⁺

P

P⁺

N

Parasitic

Elements

Parasitic

Elements

P Substrate

GND GND

P Substrate

GND

Parasitic

Elements

Parasitic

Elements

N Region

close-by

Figure 33. Example of monolithic IC structure

13. Ceramic Capacitor

When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others.

14. Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within

the Area of Safe Operation (ASO).

15. Thermal Shutdown Circuit(TSD)

This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always

be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the

junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls

below the TSD threshold, the circuits are automatically restored to normal operation.

Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no

circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from

heat damage.

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Ordering Information

B D 1

8

3

4

0

F

V -

ME2

Product Name

Package

FV: SSOP-B16

Packaging and forming specification

M: High Reliability Design

E2: Embossed tape and reel

B D 1

1

F

V -

ME2

Product Name

Package

FV: SSOP-B16

Packaging and forming specification

M: High Reliability Design

E2: Embossed tape and reel

Marking Diagrams

SSOP-B16(TOP VIEW)

Part Number Marking

18340

LOT Number

1PIN MARK

SSOP-B16(TOP VIEW)

Part Number Marking

18341

LOT Number

1PIN MARK

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Physical Dimension, Tape and Reel Information

Package Name

SSOP-B16

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BD18340FV-M BD18341FV-M

Revision History

Date

Revision

001

Changes

2016.03.29

New Release

Page.3 Footprints and Traces

74.2mm²(Square)

⇒

74.2mm x 74.2mm

002

2016.04.21

Page.12 Table of Operations

Operation Mode: TSD

PBUS Terminal: High(4.5V(Typ)) to Hi-z

Page.5 Electrical Characteristics1

VREG Terminal Voltage

±3%(Ta= 25 to 125°C) ⇒ ±3%(Ta=-40 to 125°C)

±5%(Ta=-40 to 125°C)

Page.16 Formula

[ ]

푉

(

)

↓

푉_푂푃= ꢀ_퐹퐵1+ ꢀ_퐹퐵2× 퐼_{퐵ꢆ푆퐸_푀푎푥}+ 푉_{퐶퐸_푃푁푃}

[ ]

(

)

푉_푂푃= 푉_ꢃ푁− { ꢀ_퐹퐵1+ ꢀ_퐹퐵2× 퐼_{퐵ꢆ푆퐸_푀푎푥}+ 푉_{퐶퐸_푃푁푃}} 푉

Page. 17 Delete the description of when installing heat sink resistor, or connecting

resistor or diodes between OP terminal and LED anode

2019.02.28

003

Page. 21 DCDIM terminal must be kept below 1.25V

↓

DCDIM terminal must be kept 1.25V or more

Page. 22 Caution of using PBUS terminal

Revise the description and the items list

Page.25, 26, 27 Recommended Parts List

Update discontinued parts to latest parts number

Page. 28 Recommended Application Circuit 4

I_LED: 150mA

⇒ 120mA

Add recommended parts list 4 and delete the description

www.rohm.co.jp

TSZ02201-0T1T0C700180-1-2

2019.02.28 Rev.003

35/35

TSZ22111 • 15 • 001

Notice

Precaution on using ROHM Products

(Note 1)

1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment

,

aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,

bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales

representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way

responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any

ROHM’s Products for Specific Applications.

(Note1) Medical Equipment Classification of the Specific Applications

JAPAN

USA

EU

CHINA

CLASSⅢ

CLASSⅣ

CLASSⅡb

CLASSⅢ

2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor

products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate

safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which

a failure or malfunction of our Products may cause. The following are examples of safety measures:

[a] Installation of protection circuits or other protective devices to improve system safety

[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure

3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.

Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the

use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our

Products under any special or extraordinary environments or conditions (as exemplified below), your independent

verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:

[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents

[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust

[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,

H2S, NH3, SO2, and NO2

[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves

[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items

[f] Sealing or coating our Products with resin or other coating materials

[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.

However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble

cleaning agents for cleaning residue after soldering

[h] Use of the Products in places subject to dew condensation

4. The Products are not subject to radiation-proof design.

5. Please verify and confirm characteristics of the final or mounted products in using the Products.

6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,

confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power

exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect

product performance and reliability.

7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in

the range that does not exceed the maximum junction temperature.

8. Confirm that operation temperature is within the specified range described in the product specification.

9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in

this document.

Precaution for Mounting / Circuit board design

1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product

performance and reliability.

2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must

be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,

please consult with the ROHM representative in advance.

For details, please refer to ROHM Mounting specification

Notice-PAA-E

Rev.004

Precautions Regarding Application Examples and External Circuits

1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the

characteristics of the Products and external components, including transient characteristics, as well as static

characteristics.

2. You agree that application notes, reference designs, and associated data and information contained in this document

are presented only as guidance for Products use. Therefore, in case you use such information, you are solely

responsible for it and you must exercise your own independent verification and judgment in the use of such information

contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses

incurred by you or third parties arising from the use of such information.

Precaution for Electrostatic

This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper

caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be

applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,

isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).

Precaution for Storage / Transportation

1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:

[a] the Products are exposed to sea winds or corrosive gases, including Cl₂, H₂S, NH₃, SO₂, and NO₂

[b] the temperature or humidity exceeds those recommended by ROHM

[c] the Products are exposed to direct sunshine or condensation

[d] the Products are exposed to high Electrostatic

2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period

may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is

exceeding the recommended storage time period.

3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads

may occur due to excessive stress applied when dropping of a carton.

4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of

which storage time is exceeding the recommended storage time period.

Precaution for Product Label

A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.

Precaution for Disposition

When disposing Products please dispose them properly using an authorized industry waste company.

Precaution for Foreign Exchange and Foreign Trade act

Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign

trade act, please consult with ROHM in case of export.

Precaution Regarding Intellectual Property Rights

1. All information and data including but not limited to application example contained in this document is for reference

only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any

other rights of any third party regarding such information or data.

2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the

Products with other articles such as components, circuits, systems or external equipment (including software).

3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any

third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM

will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to

manufacture or sell products containing the Products, subject to the terms and conditions herein.

Other Precaution

1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.

2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written

consent of ROHM.

3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the

Products or this document for any military purposes, including but not limited to, the development of mass-destruction

weapons.

4. The proper names of companies or products described in this document are trademarks or registered trademarks of

ROHM, its affiliated companies or third parties.

Notice-PAA-E

Rev.004


型号：	BD18340FV-M
厂家：	ROHM
描述：	BD18340FV-M是面向车载LED灯的70V高耐压恒流控制器。一个本IC最多可驱动10个外置PNP晶体管。同时还内置待机功能，可为降低灯组功耗做贡献。内置LED电流降额功能、LED开路检测、输出短路保护、过电压保护、LED异常状态输入输出功能，可实现高可靠性。驱动控制器晶体管
文件：	总38页 (文件大小：3146K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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