BD63922EFV-E2 [ROHM]

Motion Control Electronic, BIPolar, PDSO24;
BD63922EFV-E2
型号: BD63922EFV-E2
厂家: ROHM    ROHM
描述:

Motion Control Electronic, BIPolar, PDSO24

光电二极管
文件: 总16页 (文件大小:1596K)
中文:  中文翻译
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TECHNICAL NOTE  
Stepping Motor Driver Series  
Constant Current 2ch  
36V Simple Series  
BD63922EFV/BD63942EFV/BD63962EFV  
ver.1  
Outline  
BD63922EFV,BD63942EFV,BD63962EFV are the ultra simple type that provides the minimum function for driving stepping  
motor and various protection circuits.  
As for its basic function, it is a low power consumption bipolar PWM constant current-drive driver with power supply’s rated  
voltage of 36V and rated output current of 0.8A, 1.2A, 1.5A, and each driver is pin-compatible so that replacement can be done  
easily. Also it makes μ-STEP drive possible by inputting external DAC signal so that it provides wider application area. There  
are excitation modes of FULL STEP & HALF STEP mode. This series contributes to reduction of mounting area, cost down,  
safety design.  
Feature  
1) Power supply: one system drive (rated voltage of 36V)  
2) Rated output current: 0.8A, 1.2A, 1.5A  
3) Low ON resistance DMOS output  
4) Parallel IN drive mode  
5) 2ch drive DC motor  
6) PWM constant current control (self oscillation)  
7) Built-in spike noise cancel function (external noise filter is unnecessary)  
8) FULL STEP applicable to HALF STEP  
9) Applicable to μstep drive  
10) Forward/reverse break mode for DC motor  
11) Power save function  
12) Built-in logic input pull-down resistor  
13) Power-on reset function  
14) Thermal shutdown circuit (TSD)  
15) Over current protection circuit (OCP)  
16) Under voltage lock out circuit (UVLO)  
17) Over voltage lock out circuit (OVLO)  
18) Malfunction prevention at the time of no applied power supply (Ghost Supply Prevention)  
19) Electrostatic discharge: 4kV (HBM specification)  
20) Microminiature, ultra-thin and high heat-radiation (exposed metal type) HTSSOP package  
21) Pin-compatible line-up  
Application  
Laser beam printer, Scanner, Photo printer, FAX, Ink jet printer, Mini printer, Sewing machine, Toy, and Robot etc.  
DEC. 2008  
Absolute maximum ratings(Ta=25)  
Item  
Symbol  
VCC1,2  
BD63922EFV  
BD63942EFV  
-0.2+36.0  
1.11  
BD63962EFV  
Unit  
V
Supply voltage  
Power dissipation  
Pd  
W
4.02  
Input voltage for control pin  
RNF maximum voltage  
Maximum output current  
VIN  
VRNF  
IOUT  
-0.2+5.5  
0.5  
V
V
0.83  
1.03  
1.23  
1.53  
2.03  
A/phase  
A/phase  
4  
Maximum output current(peak)  
Operating temperature range  
Storage temperature range  
IOUTpeak  
Topr  
1.53  
-25+85  
-55+150  
+150  
Tstg  
Junction temperature  
Tjmax  
1  
70mm×70mm×1.6mm glass epoxy board. Derating in done at 8.8mW/for operating above Ta=25.  
4-layer recommended board. Derating in done at 32.0mW/for operating above Ta=25.  
Do not, however exceed Pd, ASO and Tjmax=150.  
2  
3  
4  
Pulse width tw1ms, duty 20%.  
Operating conditions(Ta= -25+85)  
Item  
Symbol  
VCC1,2  
IOUT  
BD63922EFV  
0.55  
BD63942EFV  
1928  
BD63962EFV  
1.25  
Unit  
V
Supply voltage  
Output current (DC)  
0.95  
A/phase  
5  
Do not however exceed Pd, ASO.  
Electrical characteristics  
Applicable to all the series (Unless otherwise specified Ta=25, Vcc1,2=24V)  
Limit  
Item  
Symbol  
Unit  
Condition  
Min.  
Typ.  
Max.  
Whole  
Circuit current at standby  
Circuit current  
ICCST  
ICC  
-
-
0.6  
2.7  
2.0  
7.0  
mA  
mA  
PS=L  
PS=H, VREF=0.4V  
Control input (IN1A, IN1B, IN2A, IN2B, PS)  
H level input voltage  
L level input voltage  
VINH  
VINL  
2.0  
-
-
-
-
V
V
0.8  
Output (OUT1A, OUT1B, OUT2A, OUT2B)  
Output ON resistance  
RON  
IOUT =0.3A  
-
-
2.8  
1.4  
3.6  
1.8  
Ω
Ω
(BD63920EFV)  
Sum of upper and lower  
IOUT =0.7A  
Output ON resistance  
RON  
(BD63940EFV)  
Sum of upper and lower  
Output ON resistance  
RON  
IOUT =1.0A  
-
-
1.1  
-
1.4  
10  
Ω
(BD63960EFV)  
Sum of upper and lower  
Output leak current  
Current control  
ILEAK  
μA  
RNFX input current  
VREFX input current  
VREFX input voltage range  
Comparator offset  
IRNFX  
IVREF  
-40  
-2.0  
0
-20  
-0.1  
-
-
μA  
μA  
V
RNFX=0V  
-
VREFX=0V  
VREF  
0.4  
20  
1.2  
VCOFS  
TONMIN  
-20  
0.3  
0
mV  
μs  
VREFX=0.4V  
Minimum on time  
0.7  
R=39kΩ, C=1000pF  
2/16  
Characteristics reference data (Unless otherwise specified Vcc1,2=24V)  
1.2  
0
-0.4  
-0.8  
-1.2  
-1.6  
-2  
1
85℃  
0.8  
0.6  
0.4  
0.2  
0
25℃  
-25℃  
-25℃  
25℃  
85℃  
-2.4  
0
200  
400  
600  
800  
0
200  
400  
600  
800  
Output Current : IOUT [mA]  
Output Current : IOUT [mA]  
Fig.1 Output H voltage (BD63922EFV)  
Fig.2 Output L voltage (BD63922EFV)  
0.8  
0.7  
0
-0.2  
-0.4  
-0.6  
-0.8  
85℃  
0.6  
25℃  
0.5  
0.4  
0.3  
0.2  
0.1  
0
-25℃  
-1  
-1.2  
-1.4  
-1.6  
-25℃  
25℃  
85℃  
0
200 400 600 800 1000 1200  
Output Current : IOUT [mA]  
0
200 400 600 800 1000 1200  
Output Current : IOUT [mA]  
Fig.3 Output H voltage (BD63942EFV)  
Fig.4 Output L voltage (BD63942EFV)  
0.8  
0
-0.2  
-0.4  
-0.6  
85℃  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
25℃  
-25℃  
-0.8  
-25℃  
-1  
25℃  
-1.2  
85℃  
-1.4  
0
250 500 750 1000 1250 1500  
Output Current : IOUT [mA]  
0
250 500 750 1000 1250 1500  
Output Current : IOUT [mA]  
Fig.5 Output H voltage (BD63962EFV)  
Fig.6 Output L voltage (BD63962EFV)  
3/16  
Terminal function  
1) BD63922EFV/BD63942EFV/BD63962EFV  
Pin  
Pin  
No.  
Pin name  
Function  
Pin name  
Function  
No.  
1
PGND  
IN2B  
Ground terminal  
13  
14  
15  
IN1A  
PGND  
VCC1  
Logic input terminal  
2
Ground terminal  
Logic input terminal  
3
VREF2  
Output current value setting terminal  
Power supply terminal  
Connection terminal of CR for setting PWM  
frequency  
H bridge output terminal  
4
5
CR2  
NC  
16  
17  
OUT1A  
RNF1  
Connection terminal of resistor for output  
current detection  
Non connection  
Terminal for testing  
H bridge output terminal  
6
7
8
TEST  
GND  
PS  
18  
19  
20  
OUT1B  
OUT2B  
RNF2  
(used by connecting with GND)  
Ground terminal  
H bridge output terminal  
Connection terminal of resistor for output  
current detection  
Power save terminal  
Connection terminal of CR for setting PWM  
frequency  
H bridge output terminal  
9
CR1  
21  
OUT2A  
10  
11  
12  
VREF1  
IN1B  
NC  
Output current value setting terminal  
Logic input terminal  
22  
23  
24  
VCC2  
NC  
Power supply terminal  
Non connection  
Non connection  
IN2A  
Logic input terminal  
Block diagramApplication circuit diagramInput output equivalent circuit diagram  
Set the PWM frequency.  
Setting range is  
Resistor for current detection.  
Setting range is  
C:470pF4700pF  
R:10kΩ~100kΩ  
0.2Ω~0.9Ω(BD63922EFV)  
0.2Ω~0.5Ω(BD63942EFV)  
0.2Ω~0.4Ω(BD63962EFV)  
Refer to P.6 for detail.  
VCC1  
Refer to P.8,13 for detail.  
15  
13  
IN1A  
OUT1A  
16  
18  
IN1B 11  
LOGIC  
Predriver  
CR1  
9
ONE  
OUT1B  
RNF1  
17  
SHOT  
39kΩ  
1000pF  
0.3Ω  
OCP  
Be sure to short VCC1 & VCC2.  
VREF1 10  
Current  
Limit  
Comp.  
VCC2  
22  
24  
2
IN2A  
OUT2A  
21  
19  
0.1uF  
100uF  
IN2B  
CR2  
LOGIC  
Predriver  
4
ONE  
OUT2B  
RNF2  
Bypass capacitor.  
Setting range is  
SHOT  
20  
39kΩ  
1000pF  
0.3Ω  
100uF470uF(electrolytic)  
0.01uF0.1uF(multilayer ceramic etc.)  
Refer to P.6 for detail.  
OCP  
VREF2  
3
Current  
Limit  
Comp.  
Set the PWM frequency.  
Setting range is  
C:470pF4700pF  
R:10kΩ~100kΩ  
TEST  
PS  
6
8
PGND  
PGND  
GND  
1
14  
7
RESET  
Regulator  
Refer to P.8,13 for detail.  
Resistor for current detection.  
Setting range is  
0.2Ω~0.9Ω(BD63922EFV)  
0.2Ω~0.5Ω(BD63942EFV)  
0.2Ω~0.4Ω(BD63962EFV)  
Refer to P6 for detail.  
TSD  
UVLO  
OVLO  
Terminal for testing.  
Please connect to GND.  
Fig.7 Block diagram & Application circuit diagram  
4/16  
VCC  
circuit  
VCC  
IN1A  
IN1B  
IN2A  
IN2B  
circuit  
VREF1  
VREF2  
5kΩ  
10kΩ  
100kΩ  
VCC  
VREG  
(internal regulator)  
VCC  
5kΩ  
CR1  
CR2  
OUT1A, OUT2A  
OUT1B, OUT2B  
RNF1, RNF2  
5kΩ  
circuit  
Fig.8 Input output equivalent circuit diagram  
Points to notice for terminal description and PCB layout  
PSPower save terminal  
PS can make circuit standby state and make motor output OPEN. Please be careful because there is a delay of 40µs(max.)  
before it is returned from standby state to normal state and the motor output becomes ACTIVE.  
PS  
L
State  
Standby state (RESET)  
ACTIVE  
H
IN1A, IN1B, IN2A, IN2BControl logic input terminal  
These terminals decide output state.  
Input  
Output  
IN1A  
IN2A  
IN1B  
IN2B  
OUT1A  
OUT2A  
OUT1B  
OUT2B  
PS  
L
Stand by  
X
X
OPEN  
OPEN  
(All circuits)  
H
H
H
H
L
H
L
L
L
OPEN  
OPEN  
Stand by  
Forward  
Reverse  
Brake  
H
L
L
L
H
L
H
H
H
X: H or L  
5/16  
TEST TerminalTerminal for testing  
This is the terminal used at the time of shipping test. Please connect to GND. Be aware that there is a possibility of  
malfunction depending on conditions when GND is unconnected.  
VCC1,VCC2Power supply terminal  
Motor’s drive current is flowing in it, so please wire in such a way that the wire is thick & short and has low impedance.  
Voltage VCC may have great fluctuation, so please arrange the bypass capacitor of about 100μF470μF as close to the  
terminal as possible and adjust in such a way that the voltage VCC is stable. Please increase the capacity if needed  
especially when a large current is used or those motors that have great back electromotive force are used. In addition, for the  
purpose of reducing of power supply’s impedance in wide frequency bandwidth, parallel connection of multi-layered ceramic  
capacitor of 0.01μF0.1μF etc is recommended. Extreme care must be used to make sure that the voltage VCC does not  
exceed the rating even for a moment. VCC1 & VCC2 are shorted inside IC, so please be sure to short externally VCC1 &  
VCC2 when using. If used without shorting, malfunction or destruction may occur because of concentration of current routes  
etc., so please make sure that they are shorted when in use. Still more, in the power supply terminal, there is built-in clamp  
component for preventing of electrostatic destruction. If steep pulse or voltage of surge more that maximum absolute rating  
is applied, this clamp component operates, as a result there is the danger of destruction, so please be sure that the  
maximum absolute rating must not be exceeded. It is effective to mount a Zener diode of about the maximum absolute rating.  
Moreover, the diode for preventing of electrostatic destruction is inserted between Vcc terminal and GND terminal, as a  
result there is the danger of IC destruction if reverse voltage is applied between Vcc terminal and GND terminal, so please  
be careful.  
GND,PGNDGround terminal  
In order to reduce the noise caused by switching current and to stabilize the internal reference voltage of IC, please wire in  
such a way that the wiring impedance from this terminal is made as low as possible to achieve the lowest electrical potential  
no matter what operating state it may be.  
OUT1A,OUT1B,OUT2A,OUT2BH Bridge output terminal  
Motor’s drive current is flowing in it, so please wire in such a way that the wire is thick & short and has low impedance. It is  
also effective to add a Schottky diode if output has positive or negative great fluctuation when large current is used etc, for  
example, if counter electromotive voltage etc. is great. Moreover, in the output terminal, there is built-in clamp component for  
preventing of electrostatic destruction. If surge or voltage more that maximum absolute voltage is applied, this clamp  
component operates, as a result there is the danger of even destruction, so please be sure that the maximum absolute rating  
must not be exceeded.  
RNF1,RNF2Connection terminal of resistor for detecting of output current  
Connect the current detection resistors of the values that correspond to each product (IC) between the terminal and GND.  
(see page 4) In view of the power consumption of the current-detecting resistor, please determine the resistor in such a way  
that W=IOUT2R[W] does not exceed the power dissipation of the resistor. In addition, please wire in such a way that it has a  
low impedance and does not have a impedance in common with other GND patterns because motor’s drive current flows in  
the pattern through RNF terminalcurrent-detecting resistorGND. Please do not exceed the rating because there is the  
possibility of circuits’ malfunction etc. if RNF voltage has exceeded the maximum rating (0.5V). Moreover, please be careful  
because if RNF terminal is shorted to GND, large current flows without normal PWM constant current control, then there is  
the danger that OCP or TSD will operate. If RNF terminal is open, then there is the possibility of such malfunction as output  
current does not flow either, so please do not let it open.  
VREFOutput current value-setting terminal  
This is the terminal to set the output current value. The output current value can be set by VREF voltage and  
current-detecting resistor (RNF resistor).  
BD63922EFV: Output current IOUT [A] = VREF [V] / {RNF [] + 0.046}  
BD63942EFV: Output current IOUT [A] = VREF [V] / {RNF [] + 0.043}  
BD63962EFV: Output current IOUT [A] = VREF [V] / {RNF [] + 0.035}  
Please avoid using it with VREF terminal open because if VREF terminal is open, the input is unsettled, and the VREF  
voltage increases, and then there is the possibility of such malfunctions as the setting current increases and a large current  
flows etc. Please keep to the input voltage range because if the voltage of over 0.5V is applied on VREF terminal, then there  
is also the danger that a large current flows in the output and so OCP or TSD will operate. Besides, please take into  
consideration the outflow current (max.2µA) if inputted by resistance division when selecting the resistance value. The  
minimum current, which can be controlled by VREF voltage, is determined by motor coil’s L & R values and minimum ON  
time because there is a minimum ON time in PWM drive. It is also effective to bias from exterior at the condition of VREF1  
and VREF2 are shorted except when μSTEP drive that is described on page 10 is performed.  
6/16  
CR1,CR2Connection terminal of CR for setting PWM frequency  
This is the terminal to set the minimum ON time and OFF time. Please connect the external C(470pF4700pF) and R(10k  
Ω~100kΩ) between this terminal and GND.  
The OFF time is determined by Toff[s]CR0.81. Please interconnect from external components to GND in such a way that  
the interconnection does not have impedance in common with other GND patterns. In addition, please carry out the pattern  
design in such ways as keeps such steep pulses as square wave etc. away and that there is no noise plunging. Please  
mount the two components of C and R if being used by PWM constant current control because normal PWM constant  
current control becomes impossible if CR terminal is open or it is biased externally. If the PWM frequency is low, there is a  
possibility that it will cause noise by being in the human auditory range, therefore pay attention to OFF time not to become  
longer than 50μsec.  
NC terminal  
This terminal is unconnected electrically with IC internal circuit. Have this terminal open or GND connected.  
IC back side metalMetal for heat-radiation  
For HTSSOP-B24 package, the heat-radiating metal is mounted on IC’s back side, and on the metal the heat-radiating  
treatment is performed when in use, which becomes the precondition to use, so please secure sufficiently the heat-radiating  
area by surely connecting by solder with the GND plane on the board and getting as wide GND pattern as possible. Please  
be careful because the allowable loss as shown in page 12 can not be secured if not connected by solder. Moreover, the  
back side metal is shorted with IC chip’s back side and becomes the GND potential, so there is the danger of malfunction  
and destruction if shorted with potentials other than GND, therefore please absolutely do not design patterns other than GND  
through the IC’s back side.  
PWM Constant current control  
1) Current control operation  
Output transistor is turned on and so the output current increases, and when the RNF voltage (the voltage is converted into  
by output current due to external resistor of RNF terminal) reaches the voltage value, which is VREF input voltage, the  
current limit comparator operates and enters the current decay mode. After that, the OFF time, which is caused by CR timer,  
has passed before the output is again turned on. The above-mentioned process is repeated.  
2) Noise cancel function  
In order to avoid the incorrect detection of current-detecting comparator’s caused by RNF spike noise that occurs at the time  
of output ON, the noise cancel time Tn is set up, so the current detection within the noise cancel time immediately after the  
output transistor is turned on is invalid. Therefore, the constant current drive is possible without external filter. And the noise  
cancel time becomes the minimum ON time of the motor output transistor.  
7/16  
3) CR Timer  
CR voltage is clamped at 0.9V (Typ.) during output ON, and as soon as the output current reaches the current limit value and  
enters the current decay mode, the discharge begins and goes on till 0.4V(Typ.), then the output is turned on again and the  
charge begins simultaneously. The time taken to discharge from 0.9V (Typ.) to 0.4V (Typ.) is the OFF time Toff. In addition,  
CR terminal starts charging, and the time taken to charge from 0.4V (Typ.) to 0.8V (Typ.) is the noise cancel time Tn. Then,  
Toff and Tn can be set by CR terminal’s external constant according to the following formula (Typ.).  
Toff[s]CR0.81  
Tn[s]CR'ln[(VCR-0.4)/(VCR-0.8)]  
In the formula: VCR=VR/(R'+R)  
V : internal regulator voltage 5V(Typ.)  
R': CR terminal’s internal impedance of 5kΩ(Typ.)  
Spike noise  
Current limit value  
Output current  
0mA  
Current limit value  
RNF voltage  
GND  
0.9V  
0.8V  
CR voltage  
0.4V  
Noise cancel time Tn  
Discharge timeOFF time Toff  
GND  
Fig.9 Timing chart of CR voltage, RNF voltage, and output current  
Please use the resistor of over 10kΩ(10kΩ~100kΩ recommended) because if the resistance value is low, the clamp  
voltage 0.9V(Typ.) can not be reached. If a capacitor with a value of a few thousand pico farad is used (470pF4700pF  
recommended), the noise cancel time Tn becomes longer, and there is the danger that the output current, which is flowing, is  
greater than the current limit value because of L and R values of motor coil. Moreover, it is necessary to be careful because if  
the OFF time Toff is set longer than normal, the output current’s ripple becomes larger, the average current is decreased,  
and then the rotating efficiency may be reduced. Please choose the optimal value in order to reduce the motor drive noise  
and the distortion of output current’s waveform etc. to a minimum.  
Current decay mode  
For the PWM constant current drive of this IC, the current decay mode is SLOW DECAY mode. Moreover, in order to reduce  
the power consumption of IC to a minimum, SLOW DECAY adopts the current decay based on the synchronous rectification  
mode, so low-power-consumption and high-efficiency drive is realized. The state of output transistor and the route of motor’s  
regenerative current during current attenuating for SLOW DECAY mode are as follows.  
When the current attenuates, the voltage between motor  
coils is small and the regenerative current decreases slowly,  
OFFOFF  
ONOFF  
OFFON  
so the current ripple becomes smaller, which is favorable for  
motor torque. But the output current increases due to  
deterioration of current control characteristic in small  
current region, or it is easily affected by motor's BEMF at  
the time of high pulse rate drive related to the modes of  
HALF STEP and QUARTER STEP*, so change of current  
limit value cannot be followed, current waveform distorts  
and motor vibration may increase. It is most suitable to the  
FULL STEP mode and the modes of the HALF STEP and  
QUARTER STEP* of low pulse rate drive.  
M
ONON  
output on  
current decay  
Fig.10 Route of regenerative current during current decay  
*There is a necessity of external DAC in order to realize the  
QUARTER STEP mode with this series.  
8/16  
Example of control sequence and torque vector  
You can drive a stepping motor with FULL step mode and HALF step mode and quarter step mode by the following logic input  
(IN1A, IN1B, IN2A, IN2B) sequence. See page 6 for current value set.  
FULL STEP  
OUT1A  
100%  
IN1A  
IN1B  
IN2A  
IN2B  
4
3
1
2
OUT2A  
OUT2B  
100%  
IOUT(CH1)  
IOUT(CH2)  
-100%  
100%  
-100%  
OUT1B  
IN1A  
IN1B  
IN2A  
IN2B  
OUT1A OUT1B OUT2A OUT2B  
H
L
L
H
H
L
H
H
L
L
L
H
L
L
H
H
L
H
H
L
L
L
L
H
H
L
H
H
H
L
H
L
Fig.11 Control Sequence at FULL STEP  
HALF STEP  
OUT1A  
1
IN1A  
IN1B  
IN2A  
IN2B  
100%  
2
8
6
7
3
OUT2B  
OUT2A  
100%  
IOUT(CH1)  
IOUT(CH2)  
4
-100%  
100%  
5
-100%  
OUT1B  
IN1A  
IN1B  
IN2A  
IN2B  
OUT1A OUT1B OUT2A OUT2B  
H
H
L
L
L
L
H
H
H
L
L
L
H
L
OPEN  
OPEN  
H
L
H
L
L
L
OPEN  
OPEN  
H
L
L
H
H
H
L
L
L
H
H
L
OPEN  
H
L
L
L
L
H
H
OPEN  
L
L
H
H
H
L
L
L
L
L
OPEN  
H
OPEN  
L
H
H
L
L
H
Fig.12 Control Sequence at HALF STEP  
9/16  
●μSTEP mode  
This IC makes it possible to set output current value of CH1, CH2 by VREF1, VREF2 terminal, and output logic of CH1,  
CH2 by IN1A, IN1B, IN2A, IN2B respectively. Therefore μSTEP drive can be realized by inputting linear voltage into  
VREF with external DAC and controlling IN1A, IN1B, IN2A, IN2B terminal  
IN1A  
IN1B  
IN2A  
IN2B  
VREF1  
VREF2  
Iout(CH1)  
Iout(CH2)  
Fig.13 Input signal and motor drive current at μSTEP drive  
Protection Circuits  
Thermal Shutdown (TSD)  
This IC has a built-in thermal shutdown circuit for thermal protection. When the IC’s chip temperature rises above 175℃  
(Typ.), the motor output becomes OPEN. Also, when the temperature returns to under 150(Typ.), it automatically returns  
to normal operation. However, even when TSD is in operation, if heat is continued to be added externally, heat overdrive can  
lead to destruction.  
Over Current Protection (OCP)  
This IC has a built in over current protection circuit as a provision against destruction when the motor outputs are shorted  
each other or Vcc-motor output or motor output-GND is shorted. This circuit latches the motor output to OPEN condition  
when the regulated threshold current flows for 4µs (Typ.). It returns with power reactivation or a reset of the PS terminal. The  
over current protection circuit’s only aim is to prevent the destruction of the IC from irregular situations such as motor output  
shorts, and is not meant to be used as protection or security for the set. Therefore, sets should not be designed to take into  
account this circuit’s functions. After OCP operating, if irregular situations continues and the return by power reactivation or a  
reset of the PS terminal is carried out repeatedly, then OCP operates repeatedly and the IC may generate heat or otherwise  
deteriorate. When the L value of the wiring is great due to the wiring being long, after the over current has flowed and the  
output terminal voltage jumps up and the absolute maximum values may be exceeded and as a result, there is a possibility  
of destruction. Also, when current which is over the output current rating and under the OCP detection current flows, the IC  
can heat up to over Tjmax =150and can deteriorate, so current which exceeds the output rating should not be applied.  
Under Voltage Lock Out (UVLO)  
This IC has a built-in under voltage lock out function to prevent false operation such as IC output during power supply under  
voltage. When the applied voltage to the Vcc terminal goes under 15V (Typ.), the motor output is set to OPEN. This  
switching voltage has a 1V (Typ.) hysteresis to prevent false operation by noise etc. Please be aware that this circuit does  
not operate during power save mode.  
Over Voltage Lock Out (OVLO)  
This IC has a built-in over voltage lock out function to protect the IC output and the motor during power supply over voltage.  
When the applied voltage to the VCC terminal goes over 32V (Typ.), the motor output is set to OPEN. This switching voltage  
has a 1V (Typ.) hysteresis and a 4µs (Typ.) mask time to prevent false operation by noise etc. Although this over voltage  
locked out circuit is built-in, there is a possibility of destruction if the absolute maximum value for power supply voltage is  
exceeded, therefore the absolute maximum value should not be exceeded. Please be aware that this circuit does not  
operate during power save mode.  
10/16  
False operation prevention function in no power supply (Ghost Supply Prevention)  
If a logic control signal is input when there is no power supplied to this IC, there is a function which prevents the false  
operation by voltage supplied via the electrostatic destruction prevention diode from the logic control input terminal to the  
Vcc, to this IC or to another IC’s power supply. Therefore, there is no malfunction of the circuit even when voltage is supplied  
to the logic control input terminal while there is no power supply.  
Thermal design  
Please confirm that the IC’s chip temperature Tj is not over 150, while considering the IC’s power consumption (W), package  
power (Pd) and ambient temperature (Ta). When Tj=150is exceeded the functions as a semiconductor do not operate and  
problems such as parasitism and leaks occur. Constant use under these circumstances leads to deterioration and eventually  
destruction of the IC. Tjmax =150must be strictly obeyed under all circumstances.  
Thermal Calculation  
The IC’s consumed power can be estimated roughly with the power supply voltage (VCC), circuit current (ICC), output ON  
resistance (RONH,RONL) and motor output current value (IOUT).  
The calculation method during FULL STEP drive, SLOW DECAY mode is shown here:  
Consumed power of the Vcc [W] = VCC [V]ICC [A] ・・・・・・・①  
Consumed power of the output DMOS [W] = (RONH[Ω] + RONL[Ω])IOUT [A]22[ch]on_duty  
During output ON  
+ (2RONL[Ω])IOUT [A]22[ch](1 - on_duty) ・・・・・・・②  
During current decay (recovery)  
However, on_duty: PWM on duty = Ton / (Ton+Toff)  
Ton varies depending on the L and R values of the motor coil and the current set value. Please confirm by actual  
measurement, or make an approximate calculation.  
Toff is the OFF time which depends on the external CR. See page 8 for details.  
Upper PchDMOS ON Resistance  
Lower NchDMOS ON Resistance  
Model Number  
RONH[Ω] (Typ.)  
RONL[Ω] (Typ.)  
BD63922EFV  
BD63942EFV  
BD63962EFV  
2.0  
1.0  
0.7  
0.8  
0.4  
0.4  
Consumed power of total IC W_total [W] = + ②  
Junction temperature Tj = Ta[] + θja[/W]W_total [W]  
However, the thermal resistance valueθja [/W] differs greatly depending on circuit board conditions. Refer to the derating  
curve on page 12. Also, we are taking measurements of thermal resistance valueθja of boards actually in use. Please feel  
free to contact our salesman.  
The calculated values above are only theoretical. For actual thermal design, please perform sufficient thermal evaluation for  
the application board used, and create the thermal design with enough margin to not exceed Tjmax=150.  
Although unnecessary with normal use, if the IC is to be used under especially strict heat conditions, please consider  
externally attaching a Schottky diode between the motor output terminal and GND to abate heat from the IC.  
11/16  
Temperature Monitoring  
There is a way to directly measure the approximate chip temperature by using the TEST terminal. However, temperature  
monitor using this TEST terminal is only for evaluation and experimenting, and must not be used in actual usage conditions.  
TEST terminal has a protection diode for prevention from electrostatic discharge. The temperature may be monitored using  
this protection diode.  
(1) Measure the terminal voltage when a current of Idiode=50μA flows from the TEST terminal to the GND, without  
supplying VCC to the IC. This measurement is of the VF voltage inside the diode.  
(2) Measure the temperature characteristics of this terminal voltage. (VF has a linear negative temperature factor  
against the temperature.) With the results of these temperature characteristics, chip temperature may be  
calibrated from the TEST terminal voltage.  
(3) Supply VCC, confirm the TEST terminal voltage while running the motor, and the chip temperature can be  
approximated from the results of (2).  
VCC  
circuit  
-Vf[mV]  
TEST  
circuit  
100kΩ  
Idiode  
V
25  
150  
Chip temperature Tj[]  
Fig.14 Model diagram for measuring chip temperature  
Fig.15 Tj and terminal voltage  
Power dissipation  
HTSSOP-B24 Package (BD63922EFV/BD63942EFV/BD63962EFV))  
HTSSOP-B24 has exposed metal on the back, and it is possible to dissipate heat from a through hole in the back. Also, the  
back of board as well as the surfaces has large areas of copper foil heat dissipation patterns, greatly increasing power  
dissipation. The back metal is shorted with the back side of the IC chip, being a GND potential, therefore there is a possibility  
for malfunction if it is shorted with any potential other than GND, which should be avoided. Also, it is recommended that the  
back metal is soldered onto the GND to short. Please note that it has been assumed that this product will be used in the  
condition of this back metal performed heat dissipation treatment for increasing heat dissipation efficiency.  
Measurement machineTH156Kuwano Electric)  
Measurement conditionROHM board  
Board size70*70*1.6mm3  
(With through holes on the board)  
4.0W  
4
3
4.0  
3.0  
The exposed metal of the backside is connected to the board with  
solder.  
Board①:1-layer board(Copper foil on the back 0mm2)  
Board②:2-layer board(Copper foil on the back 15*15mm2)  
Board③:2-layer board(Copper foil on the back 70*70mm2)  
Board④:4-layer board(Copper foil on the back 70*70mm2)  
2.8W  
Board①:θja =113.6/W  
Board②:θja =73.5/W  
Board③:θja =44.6/W  
Board④:θja =31.3/W  
1.7W  
1.1W  
2.0  
2
1
1.0  
0
50  
100  
Ambient Temperature : Ta[]  
Fig.16 HTSSOP-B24 Derating curve  
125  
25  
75  
150  
12/16  
Example of application [For BD63922EFV (see page 6)]  
Setting the Current Control Value (VREF and RNF terminals)  
We will consider a situation where the RNF terminal’s resistance value is the recommended 0.5Ω and the output current is  
set to 0.288A. Because IOUT=VREF[V] / {RNF[Ω] + 46[mΩ]}  
the VREF voltage necessary for IOUT=0.288A is 0.157V.  
This means that when the RNF terminal’s resistance value is 0.5Ω, VREF voltage=(0.5+0.046)×Output current.  
VREF terminal voltage is set to 0.157V due to resistance division.  
The VREF terminal’s outflow current is max. 2μA when considering the maximum value of the electrical characteristics, yet  
here, current is max. 4μA at double the current by assuming VREF1 and VREF2 are shorted. As for the bias current of the  
resistance division, it is necessary to set a sufficient current value that does not fluctuate the reference potential of the  
resistance division with this current of 4μA.  
As an example, we will consider that a current 40 times of 4μA (160μA) is set to be applied.  
If the voltage applied to the resistance division is 3.3V,  
3.3V  
3.3[V] / 160[μA]=20.6[kΩ]  
becomes the sum of R1 and R2’s resistance values. (R1+R2=20.6[kΩ])  
Therefore, to make the VREF terminal voltage 0.157V  
3.3[V]R2 / (R1+R2) =0.157[V]  
VREF 1  
VREF 2  
R1  
R2  
Settings of R1=20kΩ and R2=1kΩ is one of good condition.  
Fig.17 Example of VREF voltage setting  
Setting the PWM Frequency (CR terminal)  
The setting method decides the optimal value with respect to the output current ripple, consumed power and noise cancel  
time Tn (minimum ON time).  
The OFF time Toff and noise cancel time Tn (minimum ON time tONMIN) can be set with an external CR constant values.  
Please see page 8 for details.  
[To adjust output current ripple]  
The output current ripple depends on the L and R values of the motor coil as well as the current decay mode, so first the  
current ripple should be confirmed by driving the motor under actual application conditions with the recommended  
values of C=1000[pF], R=39[kΩ] and OFF time Toff =32[μs]. If there are any problems with the ripple, the optimal OFF  
time should be set by adjusting R values.  
At this time, if the OFF time Toff needs to be shortened, it is recommended that the R value is adjusted. If the C value is  
made smaller the noise cancel time Tn is shortened and there is a possibility of malfunction caused by the RNF spike  
noise, which is generated at output ON.  
[To adjust noise cancel time]  
Because the noise level of the RNF spike noise varies depending on the capacity or inductance components etc of the  
board and pattern, if there is any malfunction caused by the RNF spike noise at the recommended value of C=1000[pF],  
the noise cancel time Tn should be lengthened by making the C value greater. Be aware that if the C value is doubled, the  
OFF time Toff is also doubled and the R value needs to be halved.  
There are various combinations of C and R values, but they must be set within the ranges of the recommended values  
(C:470pF~4700pF, R:10kΩ~100kΩ)(see page 8). Also, if the PWM frequency is low, there is a possibility that it will cause  
noise by being in the human auditory range, therefore OFF time should not exceed 50μsec. On the other hand, if the  
frequency is too high, there is a possibility with the relative electrical time constant that the set current is not applied to the  
motor, depending on the L and R values of the motor coil.  
13/16  
Usage Notes  
(1) Absolute maximum ratings  
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can  
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any  
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as  
fuses.  
(2) Connecting the power supply connector backward  
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply  
lines. An external direction diode can be added.  
(3) Power supply Lines  
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,  
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals  
to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the  
circuit, not that capacitance characteristic values are reduced at low temperatures.  
(4) GND Potential  
The potential of GND pin must be minimum potential in all operating conditions.  
(5) Metal on the backside (Define the side where product markings are printed as front)  
The metal on the backside is shorted with the backside of IC chip therefore it should be connected to GND. Be aware that  
there is a possibility of malfunction or destruction if it is shorted with any potential other than GND.  
(6) Thermal design  
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.  
Users should be aware that this series has been designed to expose their frames at the back of the package, and should  
be used with suitable heat dissipation treatment in this area to improve dissipation. As large a dissipation pattern should be  
taken as possible, not only on the front of the baseboard but also on the back surface.  
(7) Mounting errors and inter-pin shorts  
When attaching to a printed circuit board, pay close attention to the direction of the IC and displacement. Improper  
attachment may lead to destruction of the IC. There is also possibility of destruction from short circuits which can be  
caused by foreign matter entering between outputs or an output and the power supply or GND.  
(8) Operation in a strong electric field  
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to  
malfunction.  
(9) ASO  
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.  
(10) Thermal shutdown circuit  
The IC has a built-in thermal shutdown circuit (TSD circuit). If the chip temperature becomes Tjmax =150, and higher, coil  
output to the motor will be open. The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation.  
It is not designed to protect or indemnify peripheral equipment. Do not use the TSD function to protect peripheral  
equipment.  
TSD on temperature [] (Typ.)  
Hysteresis Temperature [] (Typ.)  
175  
25  
(11) Inspection of the application board  
During inspection of the application board, if a capacitor is connected to a pin with low impedance there is a possibility that  
it could cause stress to the IC, therefore an electrical discharge should be performed after each process. Also, as a  
measure again electrostatic discharge, it should be earthed during the assembly process and special care should be taken  
during transport or storage. Furthermore, when connecting to the jig during the inspection process, the power supply  
should first be turned off and then removed before the inspection.  
14/16  
(12) Input terminal of IC  
This IC is a monolithic IC, and between each element there is a P+ isolation for element partition and a P substrate.  
This P layer and each element’s N layer make up the P-N junction, and various parasitic elements are made up.  
For example, when the resistance and transistor are connected to the terminal as shown in figure 18,  
When GND(Terminal A) at the resistance and GND(Terminal B) at the transistor (NPN),  
the P-N junction operates as a parasitic diode.  
Also, when GND(Terminal B) at the transistor (NPN)  
The parasitic NPN transistor operates with the N layers of other elements close to the aforementioned  
parasitic diode.  
Because of the IC’s structure, the creation of parasitic elements is inevitable from the electrical potential relationship. The  
operation of parasitic elements causes interference in circuit operation, and can lead to malfunction and destruction.  
Therefore, be careful not to use it in a way which causes the parasitic elements to operate, such as by applying voltage  
that is lower than the GND (P substrate) to the input terminal.  
Resistor  
Transistor (NPN)  
B
Pin A  
Pin B  
Pin B  
C
E
Pin A  
B
C
E
N
N
N
P+  
P+  
P+  
P+  
N
P
P
Parasitic  
element  
N
N
Parasitic  
element  
P substrate  
P substrate  
GND  
GND  
GND  
GND  
Parasitic element  
Parasitic element  
Other adjacent elements  
Fig.18 Pattern Diagram of Parasitic Element  
(13) Ground Wiring Patterns  
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns,  
placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage  
variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the  
GND wiring pattern potential of any external components, either.  
(14) TEST Terminal  
Be sure to connect TEST pin to GND.  
15/16  
Selecting a model name when ordering  
B
D
6
3
9
X
2
E
F
V
E
2
ROHM model  
Part number  
Package type  
EFV=HTSSOP-B24  
E2 = Reel-wound embossed taping  
HTSSOP-B24  
<Dimension>  
<Tape and Reel information>  
Tape  
Embossed carrier tape  
2000pcs  
Quantity  
7.8 0.1  
+6  
4
4  
E2  
Direction  
of feed  
24  
13  
(The direction is the 1pin of product is at the upper left when you hold  
reel on the left hand and you pull out the tape on the right hand)  
+0.05  
0.03  
1
12  
0.17  
0.08  
0.325  
S
0.65  
+0.05  
0.04  
0.2  
M
0.08  
Direction of feed  
1pin  
Reel  
When you order , please order in times the amount of package quantity.  
(Unit:mm)  

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