BD93E70GWL (开发中) [ROHM]
BD93E70GWL是一款全功能USB Type-CPower Delivery(PD)控制器,可通过基带通信实现USB PD。该产品支持USB Type-C规范和Power Delivery规范。BD93E70GWL支持PD策略引擎,可通过主机接口与嵌入式控制器或SoC通信。该芯片支持SOP、SOP’和SOP’’信令,因此能够与电缆标记IC通信。 BD93E70GWL仅控制支持SSMUX协议和可调DCDC的特定IC。;型号: | BD93E70GWL (开发中) |
厂家: | ROHM |
描述: | BD93E70GWL是一款全功能USB Type-CPower Delivery(PD)控制器,可通过基带通信实现USB PD。该产品支持USB Type-C规范和Power Delivery规范。BD93E70GWL支持PD策略引擎,可通过主机接口与嵌入式控制器或SoC通信。该芯片支持SOP、SOP’和SOP’’信令,因此能够与电缆标记IC通信。 BD93E70GWL仅控制支持SSMUX协议和可调DCDC的特定IC。 通信 控制器 CD 光电二极管 |
文件: | 总21页 (文件大小:905K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Datasheet
USB Type-C Power Delivery
USB Type-C Power Delivery Controller
BD93E70GWL
General Description
Key Specifications
BD93E70GWL is a full function USB Type-C Power
Delivery (PD) Controller that supports USB PD using
base-band communication. It is compatible with USB
Type-C Specification and Power Delivery specification.
BD93E70GWL includes support for the PD policy engine
and communicates with an Embedded Controller or the
SoC via host interface. It supports SOP, SOP’ and SOP’’
signaling allowing it to communicate with cable marker
ICs. BD93E70GWL controls only a specific IC of the
SSMUX and the Variable DCDC.
◼ VBUS_C Voltage Range:
◼ VSVR Voltage Range:
◼ VCONNIN Voltage Range:
3.67 V to 22 V
3.1 V to 5.5 V
4.9 V to 5.5 V
◼ Operating Temperature Range: -30 °C to +85 °C
FW Revision
Rev.7821(1E8Dh)
◼
Applications
◼
◼
◼
TVs
Displays
Head Mounted Displays
Features
◼
◼
◼
◼
◼
◼
◼
◼
◼
32 Bit ARM® Cortex®-M0 Processor Embedded.
USB Type-C Specification Release 1.3 Compatible.
USB PD Specification Revision 3.0 Compatible.
Integrated VCONN Switches.
Package
W (Typ) x D (Typ) x H (Max)
UCSP50L2C(36Pin) 2.63 mm x 2.63 mm x 0.57 mm
(0.4mm pitch)
Integrated VBUS N-ch MOSFET Switch Gate Driver.
Integrated VBUS Discharge Switch.
Supports Dead Battery Operation.
I2C Interface for Host Communication.
Supports DP Alternate Mode Sink.
Typical Application Circuit
RS
10mΩ
Q10
Q11
Variable DCDC
Power Source
SCL SDARST
For Variable
DCDC I/F
Q20
Q21
VBUS
Power Sink
CS1S
1.0μF
CS2S
1.0μF
CCS
0.1 μF
CVBC
10μF
VSVR
(3.3V/5.0V)
F1
B6
VSVR
VDDIO
(3.3V/5.0V)
B1
C2
A1
VCONNIN
CLPON_B
CC1_C
VDDIO
VCONN
RSDA RSCL
RALT
3.3kΩ
3.3kΩ
100kΩ
A4
B4
C6
CC1
CC2
SDA
SCL
HOST I/F
BD93E70GWL
(Package: UCSP50L2C)
C1
CC2_C
GPIO2
D5
C4
VDD_CAP
GPIO5
GPIO4
USB
RVU1 RVU2 RDU
Type-C PD
Receptacle
2.63mm x 2.63mm x 0.57mm
RVD1
RVD2
RDD
C5
F6
D3
GPIO3
GPIO6
GPIO9
U1
VDD_CAP
D2
VDD_CAP
RIDSD
RST_B
VDD_CAP
ADCIN
E1
C3
RIDSU
RTHU
22 kΩ
A6
E6
IDSEL
GPIO8
GPIO7
GPIO0
GPIO1
USB
2.0
D4
D+/D-
RTHD
A5
B5
t°
PHY
HPD
For MUX I/F
AUX+/AUX-
CVCC
SCL SDA
DP Sink
I/F
ML0+/ML0-
ML1+/ML1-
ML2+/ML2-
ML3+/ML3-
4.7μF
SSMUX
/ Re-Driver
/ Re-Timer
etc.
SBU1/SBU2
RX1+/RX1-
RX2+/RX2-
TX1+/TX1-
TX2+/TX2-
SSRX+/SSRX-
SSTX+/SSTX-
USB3.0
PHY
GND
GND
“ARM® Cortex® “is a registered trademark of Arm Limited.
〇Product structure : Silicon integrated circuit 〇This product has no designed protection against radioactive rays.
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Contents
General Description........................................................................................................................................................................1
Features..........................................................................................................................................................................................1
Key Specifications ..........................................................................................................................................................................1
FW Revision ...................................................................................................................................................................................1
Applications ....................................................................................................................................................................................1
Package..........................................................................................................................................................................................1
Typical Application Circuit ...............................................................................................................................................................1
Contents .........................................................................................................................................................................................2
Pin Configuration ............................................................................................................................................................................3
Pin Description................................................................................................................................................................................4
Block Diagram ................................................................................................................................................................................5
Description of Block........................................................................................................................................................................6
Absolute Maximum Ratings ............................................................................................................................................................7
Thermal Resistance........................................................................................................................................................................7
Recommended Operating Conditions.............................................................................................................................................8
Internal Memory Cell Characteristics..............................................................................................................................................8
Electrical Characteristics.................................................................................................................................................................8
Timing Chart .................................................................................................................................................................................10
I/O Equivalence Circuits................................................................................................................................................................12
Operational Notes.........................................................................................................................................................................14
1.
2.
3.
4.
5.
6.
7.
8.
Reverse Connection of Power Supply............................................................................................................................14
Power Supply Lines........................................................................................................................................................14
Ground Voltage...............................................................................................................................................................14
Ground Wiring Pattern....................................................................................................................................................14
Recommended Operating Conditions.............................................................................................................................14
Inrush Current.................................................................................................................................................................14
Testing on Application Boards ........................................................................................................................................14
Inter-pin Short and Mounting Errors ...............................................................................................................................14
Unused Input Pins ..........................................................................................................................................................14
Regarding the Input Pin of the IC ...................................................................................................................................15
Ceramic Capacitor..........................................................................................................................................................15
Thermal Shutdown Circuit (TSD)....................................................................................................................................15
Over Current Protection Circuit (OCP) ...........................................................................................................................15
Disturbance Light............................................................................................................................................................15
9.
10.
11.
12.
13.
14.
Ordering Information.....................................................................................................................................................................16
Marking Diagram ..........................................................................................................................................................................16
Physical Dimension and Packing Information...............................................................................................................................17
Revision History............................................................................................................................................................................18
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Pin Configuration
(TOP VIEW)
CC1_C
TEST1
TEST3
TEST2
TEST4
SDA
GPIO0
GPIO1
GPIO3
GPIO5
IDSEL
VDDIO
GPIO2
GND
A
B
C
VCONNIN
SCL
CC2_C CLPON_B ADCIN
GPIO4
GPIO7
GND
RST_B GPIO9
D
E
F
VDD_CAP VCC_CAP SW2_S SW1_S CS
GPIO8
GPIO6
VSVR
VBUS_C SW2_G SW1_G VBUS
1
2
3
4
5
6
(BOTTOM VIEW)
VSVR
VBUS_C SW2_G SW1_G VBUS
GPIO6
GPIO8
GND
F
E
D
VDD_CAP VCC_CAP SW2_S SW1_S CS
GND
RST_B GPIO9
GPIO7
GPIO4
SCL
GPIO5
GPIO3
GPIO1
GPIO0
CC2_C CLPON_B ADCIN
GPIO2
VDDIO
IDSEL
C
B
A
VCONNIN
CC1_C
TEST3
TEST1
TEST4
TEST2
SDA
1
2
3
4
5
6
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Pin Description
Pin No.
Pin Name
CC1_C
TEST1
TEST2
SDA
Function
A1
A2
A3
A4
A5
A6
B1
B2
B3
B4
B5
B6
C1
C2
C3
C4
C5
C6
D1
D2
D3
D4
D5
D6
E1
E2
E3
E4
E5
E6
F1
F2
F3
F4
F5
F6
Configuration channel 1 for Type-C.
TEST pin. Short to GND.
TEST pin. Short to GND.
I2C slave data
GPIO0
IDSEL
GPIO / I2C master data
I2C Device ID Select.
VCONNIN
TEST3
TEST4
SCL
Input power for VCONN
TEST pin. Short to GND.
TEST pin. Short to GND.
I2C slave clock
GPIO1
VDDIO
CC2_C
CLPON_B
ADCIN
GPIO4
GPIO3
GPIO2
GND
GPIO / I2C master clock
GPIO H level voltage input
Configuration channel 2 for Type-C.
Enable clamper of CC Open: Dead-battery not support, L: Dead-battery support
Input voltage to ADC
GPIO
GPIO
GPIO
Ground
RST_B
GPIO9
GPIO7
GPIO5
GND
System reset signal input
GPIO
GPIO
GPIO
Ground
VDD_CAP
VCC_CAP
SW2_S
SW1_S
CS
Internal LDO 1.5 V
Internal power supply (for internal use only)
Power path FET BG/SRC voltage
Power path FET BG/SRC voltage
Current monitor input
GPIO
GPIO8
VSVR
Power supply from 3.3 V / 5 V system voltage rail
Power supply from VBUS for Type-C
Power path FET gate control
Power path FET gate control
VBUS Current/Voltage Monitor Input
GPIO
VBUS_C
SW2_G
SW1_G
VBUS
GPIO6
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Block Diagram
POWCNT
CSENSE
VSVR
VCC_CAP
VDD_CAP
OSC
VREF
VCONNIN
CLPON_B
CC_PHY
VDDIO
SCL
Device Policy Manager
Policy Engine
Protocol Layer
(MCU with memory)
I/F BUS
ADC
SDA
CC1_C
CC2_C
BMC_
PHY
RST_B
IDSEL
ADCIN
GPIOs
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Description of Block
(VREF)
VREF block is internal power source circuit of this LSI with the UVLO (Under Voltage Lock Out) function.
The main power input is VSVR. And for supporting dead battery operation, VBUS_C can become power source of this LSI
when VSVR does not exist.
VREF block monitors VSVR and VBUS_C, and chooses an appropriate power supply by detecting normal condition or
dead battery condition. From the voltage which it selected, it generates VCC_CAP and VDD_CAP for internal circuits.
(OSC)
OSC block is reference clock circuit of this LSI. This LSI does not need any external clock sources.
(I/F BUS)
I/F Bus block have I2C Slave for Host Control. The I2C Slave is intended to communicate with HOST MCU such as the EC.
(Device Policy Manager)
Device Policy Manager manages USB Type-C Power Delivery operation. It is constructed in internal MCU and program
memory. It is accessible using Host IF Bus from external host MCU. And the writing access to program memory is possible
from Host IF Bus.
(Policy Engine / Protocol Layer)
Policy Engine and Protocol Layer perform USB Power Delivery operation. These blocks are constructed in internal MCU
and the program memory in the same way as Device Policy Manager.
(CC_PHY)
CC_PHY is a physical layer of USB Type-C. It supports the following function.
Dual Role Port (Dual Role Data and Dual Role Power).
Pull-up Current Source (for USB default / 1.5 A / 3.0 A).
Pull-down Resistor for Up Facing Port (UFP).
The CC1_C pin and the CC2_C pin clamper for dead battery.
VCONN output select switch for E-marked IC.
VBUS Detecting.
(BMC_PHY)
BMC_PHY is a physical layer of USB Power Delivery. By control from Protocol Layer, it performs coding, decoding and
judgment of CRC and communicates Base Band PD signal.
(POWCNT)
POWCNT block is power path control circuit of VBUS and can monitor VBUS voltage. It has two gate drivers for Nch
MOSFET switch, high withstand discharge switch for VBUS and over voltage protection (OVP).
(ADC)
ADC block is a general-purpose ADC. It is used for the monitoring of various operating states. Monitoring object is external
input voltage for thermistor circuit, VBUS voltage, system Voltage, die temperature and source current
(CSENSE)
CSENSE can perform monitoring VBUS current on the high side of the VBUS power lane.
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Absolute Maximum Ratings (Ta = 25 °C)
Parameter
Symbol
VSVR
VB
Rating
-0.3 to +6.0
-0.3 to +28
-0.3 to VSVR
+150
Unit
V
Supply Voltage [VSVR]
VBUS_C Voltage [VB]
V
I/O Voltage [VDDIO]
VDDIO
Tjmax
Tstg
VSRC
VDRV
VGS
V
Maximum Junction Temperature
Storage Temperature Range
SW1_S, SW2_S Voltage
SW1_G, SW2_G Voltage
°C
°C
V
-55 to +150
-0.3 to +22
-0.3 to +28
-0.3 to +6.0
-0.2 to +0.186
-0.3 to +28
-0.3 to +2.1
-0.3 to +6.0
V
SW1_G – SW1_S, SW2_G – SW2_S
Voltage
V
VBUS – CS Voltage
VCS
V
VBUS, CS Voltage
VHV
V
VCC_CAP, VDD_CAP, ADCIN Voltage
VLV
V
All Other Pins
VOTH
V
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by increasing
board size and copper area so as not to exceed the maximum junction temperature rating.
Thermal Resistance (Note 1)
Thermal Resistance (Typ)
Parameter
Symbol
Unit
2s2p(Note 3)
UCSP50L2C
Junction to Ambient
Junction to Top Characterization Parameter(Note 2)
θJA
63.60
4.00
°C/W
°C/W
ΨJT
(Note 1) Based on JESD51-2A (Still-Air).
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside surface
of the component package.
(Note 3) Using a PCB board based on JESD51-9.
Layer Number of
Measurement Board
Material
FR-4
Board Size
114.5 mm x 101.5 mm x 1.6 mmt
2 Internal Layers
4 Layers
Top
Copper Pattern
Bottom
Copper Pattern
99.5 mm x 99.5 mm
Thickness
70 μm
Copper Pattern
Thickness
35 μm
Thickness
70 μm
Footprints and Traces
99.5 mm x 99.5 mm
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Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Operating Temperature
VSVR Voltage
Topr
VSVR
-30
3.1
+25
3.3
-
+85
5.5
5.5
22
°C
V
VCONNIN Voltage
VBUS_C Voltage
VDDIO Voltage
VCONN
VB
4.9
V
3.67
1.7
-
V
VDDIO
3.3
5.5
V
Internal Memory Cell Characteristics (Unless otherwise specified VSVR = VDDIO = 3.3 V, VB = 5.0 V)
Parameter
Symbol
Min
Typ
Max
Unit
cycles Ta = -30 °C to +85 °C
years Ta = -30 °C to +85 °C
Conditions
Data rewriting number (Note 4)
Data retention life (Note 5)
Mrw
Mrl
100
20
-
-
-
-
(Note 4) BD93E70GWL cannot rewrite FW. ROHM cannot guarantee if FW rewriting.
(Note 5) Not 100% Tested.
Electrical Characteristics (Unless otherwise specified VSVR = VDDIO = 3.3 V, VB = 5.0 V, Ta = 25 °C)
Parameter
Current Consumption
Shutdown Current
Symbol
Min
Typ
Max
Unit
Conditions
RST_B = “L”
VSVR Current
ISD
ISP
IST
-
-
-
-
200
2
190
μA
μA
USB-C Un-Attached
VSVR Current
The option function stops.
USB-C Attached, PD Standby
VSVR Current
Stop Current
-
-
Standby Current
mA
VREF
VCC_CAP Voltage
VDD_CAP Output Voltage
VSVR UVLO release
VBUS_C UVLO release
VDDIO UVLO release
VCCIN
V15D
-
-
-
-
-
3.3
1.5
-
-
V
V
V
V
V
Standby
Standby
-
VDBSVR
VBUSDET
VDBDDIO
3.10
3.67
1.7
-
1.0
Digital DC Characteristics (GPIOx: x = 0 to 9, SDA/SCL)
0.8 x
VDDIO
VDDIO
+ 0.3
0.2 x
VDDIO
Input “H” Voltage 1
VIH1
-
V
Input “L” Voltage 1
Input Leak Current 1
Output “H” Voltage 1
VIL1
IIL1
-0.3
-
0
-
V
μA
V
-5
+5
0.85 x
VDDIO
VOH1
-
IL = 1 mA
Digital DC Characteristics (GPIOx: x = 2 to 9)
Output “L” Voltage 1 VOL1
-
-
-
-
0.3
0.4
V
V
IL = -1 mA
IL = -3 mA
Digital DC Characteristics (GPIOx: x = 0 to 1, SDA/SCL)
Output “L” Voltage 2 VOL2
Digital AC Characteristics (GPIOx: x = 0 to 1, SDA/SCL)
SCL Frequency fSCL
-
0
400
kHz
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Electrical Characteristic (Unless otherwise specified VSVR = VDDIO = 3.3 V, VB = 5.0 V, Ta = 25 °C) – continued
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
CC_PHY
Pull-up Current (USB default)
Pull-up Current (1.5 A mode)
Pull-up Current (3.0 A mode)
Pull-down Resistor
VCONN
IIP1
IIP2
64
166
304
4.6
80
180
330
5.1
96
194
356
5.6
µA
µA
µA
kΩ
IIP3
RRD
SW On Resistor
RONVC
ILIMVC1
ILIMVC2
-
1.2
400
800
-
-
-
Ω
Current Limit 1
300
600
mA
mA
Current Limit 2
Voltage Measurement
VBUS_C / VBUS Voltage
Measurement Range
External Input Voltage Measurement
Range
VRV
0
0
-
-
28
V
V
VRIN
1.5
CSENCE
Current Sense Range
Measured Current Accuracy
POWCNT
ICS
0.1
-10
-
-
9
A
With 10 mΩ
IACC
+10
%
When it measured 8A.
VBUS_C OVP Detect Accuracy
Fast Discharge SW on Resistor
Soft Discharge SW on Resistor
ACOVP
RONFAST
RONSFT
-5
-
-
+5
-
%
Ω
OVP Detecting Voltage = 6.0 V
VBUS_C=1.0 V
510
200
-
-
kΩ
VBUS_C=1.0 V
Differential Voltage
(between SW1_G and SW1_S, or
VGDRV
-
5.5
-
V
SWx_S = 5.0 V
SW2_G and SW2_S)
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Timing Chart
(Normal Wakeup)
3.3 V
VSVR
0 V
0 V
0 V
0 V
5 V
VBUS_C
VDDIO
t1
t2
VCONNIN
1.5 V
VDD_CAP
(Internal)
0 V
CC1_C
CC2_C
(Pull Up or Pull
Down)
Hi-Z
Pull Up or Pull Down Enable
LSI Operation Shutdown
HW Standby
Initialization
Active (Type-C)
According to USB Type-C Specification
t3
Timing Characteristic (Ta = 25°C)
Parameter
Symbol
Min
Typ
Max
Unit
Conditions
VDDIO Input Timing from VSVR
Input
VCONNIN Input Timing from VSVR
Input
t1
t2
t3
0
0
-
-
-
-
-
-
ms
ms
ms
Not emergency operating.
I2C (master) is disable.
LSI Wakeup Time
100
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Timing Chart - continued
(Normal Shutdown)
t4
3.3 V
VSVR
0.5 V
0 V
5 V
VBUS_C
3.3 V
t5
VDDIO
0.5 V
0 V
5 V
4.9 V
VCONNIN
t6
1.5 V
VDD_CAP
(Internal)
0 V
CC1_C
CC2_C
(Pull Up or
Pull Down)
Pull Up or Pull Down Enable
Hi-Z
Timing Characteristic (Ta = 25°C)
Parameter
Symbol
t4
Min
-
Typ
Max
400
Unit
ms
Conditions
VSVR Falling Time
-
As for the timing of t5 and t6, it is arbitrary. But LSI may not maintain action of USB Type-C PD when it is lost during LSI action.
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BD93E70GWL
I/O Equivalence Circuits
PIN
Pin Name
Equivalent Circuit Diagram
No.
VSVR
VBUS_C
E2
VCC_CAP
VCC_CAP
E1
VDD_CAP
A1
C1
CC1_C
CC2_C
C2
F5
CLPON_B
VBUS
VBUS
E5
CS
C3
A6
ADCIN
IDSEL
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BD93E70GWL
I/O Equivalence Circuits - continued
A4
B4
A5
B5
C6
C5
C4
D5
F6
D4
E6
D3
SDA
SCL
VDDIO
VDDIO
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
F4
F3
SW1_G
SW2_G
SWX_S
E4
E3
SW1_S
SW2_S
VCC_CAP
D2
RST_B
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TSZ22111 • 15 • 001
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BD93E70GWL
Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power supply
pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply.
Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing
of connections.
7. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject
the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should
always be turned off completely before connecting or removing it from the test setup during the inspection process. To
prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and
storage.
8. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
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TSZ22111 • 15 • 001
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BD93E70GWL
Operational Notes – continued
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure 1. Example of Monolithic IC Structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
12. Thermal Shutdown Circuit (TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF power output pins. When the Tj
falls below the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
13. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
14. Disturbance Light
In a device where a portion of silicon is exposed to light such as in a WL-CSP and chip products, IC characteristics
may be affected due to photoelectric effect. For this reason, it is recommended to come up with countermeasures that
will prevent the chip from being exposed to light.
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TSZ22111 • 15 • 001
TSZ02201-0V2V0A000820-1-2
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BD93E70GWL
Ordering Information
B D 9 3 E 7 0 G W L -
E 2
Part Number
Package
GWL:UCSP50L2C
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
UCSP50L2C (TOP VIEW)
1PIN MARK
Part Number Marking
LOT Number
D93E70
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TSZ22111 • 15 • 001
TSZ02201-0V2V0A000820-1-2
11.Mar.2021 Rev.001
16/18
BD93E70GWL
Physical Dimension and Packing Information
Package Name
UCSP50L2C (BD93E70GWL)
< Tape and Reel Information >
Tape
Embossed carrier tape
3000pcs
Quantity
Direction of feed E2
The direction is the pin 1 of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
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TSZ22111 • 15 • 001
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11.Mar.2021 Rev.001
17/18
BD93E70GWL
Revision History
Date
Revision
001
Changes
11.Mar.2021
New Release
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TSZ22111 • 15 • 001
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18/18
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
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