SC2443_08 [SEMTECH]
Dual-Phase Single or Two Output Synchronous Step-Down Controller; 双相单或双输出同步降压型控制器
| 型号： | SC2443_08 |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | Dual-Phase Single or Two Output Synchronous Step-Down Controller |
| 文件： | 总22页 (文件大小：1171K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SC2443
Dual-Phase Single or Two Output
Synchronous Step-Down Controller
POWER MANAGEMENT
Description
Features
The SC2443 is a high-frequency dual synchronous step-down
switching power supply controller. It provides out-of-phase
high-current output gate drives to all N-channel MOSFET power
stages. The SC2443 operates in synchronous continuous-con-
duction mode. Both phases are capable of maintaining regula-
tion with sourcing or sinking load currents, making the SC2443
suitable for generating both VDDQ and the tracking VTT for
DDR applications.
u Wide input voltage range: 4.7V to 16V
u 0.5V feedback voltage for low-voltage outputs
u Programmable frequency up to 1 MHz per phase
u 2-Phase synchronous continuous conduction mode for
high efficiency step-down converters
u Out-of-phase operation for low input current ripples
u Output source and sink currents
u Fixed frequency peak current-mode control
u 75mV/-110mV maximum current sense voltage
u Inductor DCR current-sensing for low-cost applications
u Dual outputs or 2-phase single output operation
u Excellent current sharing between individual phases
u Individual soft-start, overload shutdown and enable
u External reference input for DDR applications
u External synchronization
The SC2443 employs fixed frequency peak current-mode con-
trol for the ease of frequency compensation and fast transient
response.
The dual-phase step-down controllers of the SC2443 can be
used to produce two individually controlled and regulated out-
puts or a single output with shared current in each phase. The
Step-down controllers operate from an input of at least 4.7V
and are capable of regulating outputs as low as 0.5V
u Industrial temperature range
u 4mm X 4mm X1mm 24-lead MLPQ package
Applications
u Telecommunication power supplies
u DDR memory power supplies
u Graphic power supplies
Individual soft-start and overload shutdown timer is included
in each step-down controller. The SC2443 implements hiccup
overload protection. In single output current share configura-
tion, the master timer controls the soft-start and overload shut-
down functions of both controllers.
u Servers and base stations
Typical Application Circuit
VIN
VIN
VOUT1 VP1
VIN
VIN
VOUT1 VP1
VP1
VOUT1
VP1
VOUT1
IN1-
U1
IN1-
U1
1
2
3
4
5
6
18
17
16
15
14
13
1
2
3
4
5
6
18
17
16
15
14
13
IN1-
IN1-
GDL1
PVCC
PGND
GDL2
GDH2
BST2
IN1-
IN1-
GDL1
PVCC
PGND
GDL2
GDH2
BST2
COMP1
SYNC
AGND
REF
COMP1
SYNC
AGND
REF
VIN
VIN
SC2443
SC2443
VOUT2
IN2-
REFIN
REFIN
VIN
VIN
IN2-
Dual Independent Outputs
Single Output With Current Sharing
Aug. 2008
1
SC2443
Pin Configuration
Ordering Information
Top View
Device
Package
SC2443MLTRT (1,2)
SC2443EVB
24-lead 4mm X 4mm X ꢀmm MLPQ
Evaluation Board
24
19
Notes:
(ꢀ) Available in tape and reel only. A reel contains 3,000 devices.
(2) Available in lead-free package only. Device is WEEE and RoHS
compliant.
18
13
IN1-
COMP1
SYNC
1
GDL1
PVCC
PGND
GDL2
AGND
GDH2
BST2
REF
REFIN
6
7
12
(24-lead 4mm X 4mm X ꢀmm MLPQ)
θJA = 29°C/W
Marking Information
Marking for the 4 X 4mm MLPQ-24 package:
2
SC2443
Absolute Maximum Ratings
Recommended Operating Conditions
AVCC, PVCC Voltage …………………………… -0.3 to 20V
VBST1, VBST2 Voltage ……………………………… -0.3 to 32V
Input Voltage Range ………………………… 4.75V to 16V
……………………………… - 0.3 to 40V
Thermal Information
Junction to Ambient(1) ……………………………
29°C/W
(for <10ns @ freq. < 500kHz)
Maximum Junction Temperature ……………………… 150°C
Storage Temperature ………………………… -65 to +150°C
SS1/EN1, SS2/EN2, SYNC Voltage ………………
-0.3 to 6V
IN1-, IN2-, REF Voltage ………………… -0.3 to AVCC+ 0.3V
REFIN , COMP1, COMP2 Voltage ………… -0.3 to AVCC+ 0.3V
CS1+, CS1-, CS2+, CS2- Voltage ………… -0.3 to AVCC+ 0.3V
PGND to AGND ………………………………………
0.3V
Peak IR Reflow Temperature …………………………… 260°C
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES-
(1) Calculated from package in still air, mounted to 3”x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
(2) This device is ESD sensitive. Use of standard ESD handing precautions is required
Electrical Characteristics
Unless otherwise specified: AVCC = PVCC = 12V, VBST1 = VBST2 = 12V, SYNC = 0V, -40°C < TA = TJ < 85°C, ROSC =51.1kW.
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Undervoltage Lockout
AVCCTH
AVCCHYST
ICC
AVCC Start Threshold
AVCC rising
4.5
170
12
4.7
16
V
AVCC Start Hysteresis
mV
mA
mA
AVCC Operating Current
AVCC Quiescent Current in UVLO
Iq
AVCC = AVCCTH - 0.2V
1.7
Channel 1 Error Amplifier
VIN1+
VIN1+
Non-inverting Input Voltage
Non-inverting Input Voltage
Non-inverting Input Line Regulation
Input Offset Voltage
0.49
0.5
0.5
0.51
0.5075
0.02
V
V
0°C < TA = TJ < 70°C
0.4925
AVCCTH < AVCC < 15V
%/V
mV
µA
µW-1
dB
1
-0.1
260
65
5
IIN1-
GM1
AOL1
Inverting Input Bias Current
Amplifier Transconductance
Amplifier Open Loop Gain
-0.25
Amplifier Unity Gain Bandwidth
COMP1 Switching Threshold
Amplifier Output Sink Current
Amplifier Output Source Current
MHz
V
VCS1+=VCS1- = 0, VSS1 Rising
VIN1- = 1V, VCOMP1 = 2.5V
VIN1- = 0V, VCOMP1 = 2.5V
2.2
16
12
µA
µA
3
SC2443
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Channel 2 Error Amplifier
Input Common-mode Range(ꢀ)
Inverting Input Voltage Range(ꢀ)
Input Offset Voltage
0
0
3
V
V
AVCC
ꢀ.5
mV
nA
nA
IIN2+
IIN2-
Non-inverting Input Bias Current
Inverting Input Bias Current
-ꢀ50
-ꢀ00
-380
-250
Inverting Input Voltage for 2 phases
Single Output Operation
2.5
V
GM2
Amplifier Transconductance
Amplifier Open Loop Gain
260
65
5
µW-1
dB
AOL2
Amplifier Unity Gain Bandwidth
COMP2 Switching Threshold
Amplifier Output Sink Current
Amplifier Output Source Current
MHz
V
VCS2+=VCS2- = 0, VSS2 Rising
VCOMP2 = 2.5V
2.2
ꢀ6
ꢀ2
µA
VCOMP2 = 2.5V
µA
Oscillator
fCHꢀ, fCH2
Channel Frequency
450
2.ꢀfCH
ꢀ.5
500
550
kHz
kHz
V
Synchronizing Frequency(ꢀ)
SYNC Input High Voltage
SYNC Input Low Voltage
Channel Maximum Duty Cycle
Channel Minimum Duty Cycle
0.5
0
V
DMAXꢀ, DMAX2
DMINꢀ, DMIN2
88
%
%
Current Limit Comparator
Input Common Mode Range
0
AVCC-ꢀ
90
V
VILIMꢀ+ , VILIM2+
VILIMꢀ- , VILIM2-
Cycle by cycle Peak Currentr Limit
VCSꢀ- = VCS2- = 0.5V, Sourcing
VCSꢀ- = VCS2- = 0.5V, Sinking
60
75
mV
Valley Current Overload Shutdown
Threshold
-85
-ꢀꢀ0
-ꢀ30
-2
mV
µA
Positive Current sense
Input Bias Current
VCSꢀ+ = VCSꢀ- = 0
VCS2+ = VCS2- = 0
ICSꢀ+ , ICS2+
-0.7
-0.7
Negative Current sense
Input Bias Current
VCSꢀ+ = VCSꢀ- = 0
VCS2+ = VCS2- = 0
ICSꢀ- , ICS2-
-2
µA
4
SC2443
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Gate Drivers
High side Gate Driver
Peak Source Current
VBSTꢀ, VBST2 = ꢀ2V
VBSTꢀ, VBST2 = ꢀ2V
ꢀ.5
ꢀ
A
A
A
A
High side Gate Driver
Peak Sink Current
Low side Gate Driver
Peak Source Current
AVCC = PVCC = ꢀ2V
AVCC = PVCC = ꢀ2V
ꢀ.5
ꢀ
Low side Gate Driver
Peak Sink Current
CL = 2200pF
CL = 2200pF
Gate Drive Rise Time
Gate Drive Fall Time
20
20
ns
ns
Low side Gate Driver to High side
Gate Driver Non-overlapping delay
CL = 0
90
ns
High side Gate Driver to Low side
Gate Driver Non-overlapping delay
CL = 0
90
ns
ns
TA = 25°C
Minimum On Time
ꢀ50
Soft Start, Overload Latchoff and Enable
ISSꢀ , ISS2
VSSꢀ = VSS2 = ꢀ.5V
VSSꢀ and VSS2 Rising
VSSꢀ = 3.8V, VINꢀ- falling
VSS2 = 3.8V, VIN2- falling
VSSꢀ = VSS2 = 3.8V
Soft Start Charging Current
Overload Enabling Soft Start Voltage
Overload INꢀ- Threshold
2
3.2
µA
V
0.75VREF
0.72 X
ꢀ.4
V
Overload IN2- Threshold
V
ISSꢀ _DIS , ISS2_DIS
VSSRCVꢀ
VSSRCV2
Soft Start Discharge Current
µA
,
Overload Recovery Soft Start Voltage
VSSꢀ and VSS2 Falling
0.3
0.7
0.5
0.7
V
Gate Driver Disable SS/EN Voltage
Gate Driver Enable SS/EN Voltage
0.9
ꢀ.2
V
V
ꢀ.5
Internal 0.5V Reference Buffer
VREF
Output Voltage
Load Regulation
IREF = -ꢀmA
490
500
5ꢀ0
mV
0 < IREF <-5mA
0.05
%/mA
Notes:
(ꢀ) Guaranteed by design.
5
SC2443
Typical Characteristics
AVCC operation current vs.
Temperature
AVCC current in UVLO vs.
UVLO Threshold vs. Temperature
Temperature
4.55
12.9
12.8
12.7
12.6
12.5
12.4
12.3
12.2
12.1
12
1.85
1.80
1.75
1.70
1.65
1.60
1.55
4.54
4.53
4.52
4.51
4.50
4.49
-40
25
85
-40
25
Temperature (OC)
85
-40
25
Temperature (OC)
85
Temperature (OC)
COMP Sink/Source current vs.
Temperature
VREF vs. Temperature
E/A GM vs. Temperature
502.0
501.5
501.0
500.5
500.0
499.5
499.0
20
15
10
5
290
280
270
260
250
240
230
220
SINK
0
-5
SOURCE
-10
-15
-40
25
85
-40
25
85
-40
25
85
Temperature (OC)
Temperature (OC)
Temperature (OC)
Switching Frequency setting vs.
Temperature
COMP switching Threshold vs.
Temperature
Cycle by Cycle OCP threshold vs.
Temperature
2.35
2.30
2.25
2.20
2.15
2.10
2.05
512
510
508
506
504
502
500
498
496
75.0
74.5
74.0
73.5
73.0
72.5
72.0
71.5
71.0
ROSC = 5ꢀ.ꢀKW
-40
25
85
-40
25
85
-40
25
85
Temperature (OC)
Temperature (OC)
Temperature (OC)
SS/EN Threshold for Overload Hiccup vs.
SS/EN Threshold for Gate Driver
Enable / Disable vs. Temperature
SS/EN Threshold for Overload
Hiccup Recovery vs. Temperature
Temperature
3.18
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.58
0.56
0.54
0.52
0.50
0.48
0.46
0.44
0.42
3.17
3.16
3.15
3.14
3.13
3.12
3.11
3.10
Enable
Disable
-40
25
85
-40
25
85
-40
25
85
Temperature (OC)
Temperature (OC)
Temperature (OC)
6
SC2443
Typical Application Circuit Performance
Circuit Conditions : Single output current share configuration as shown in page ꢀ5
Releasing SS/EN pin from GND
Releasing SS/EN pin from GND
Soft Start
VIN
5V/DIV
VIN
5V/DIV
ENꢀ/SSꢀ
2V/DIV
COMPꢀ
ꢀV/DIV
COMPꢀ
ꢀV/DIV
ENꢀ/SSꢀ
2V/DIV
GDLꢀ
5V/DIV
ENꢀ/SSꢀ
2V/DIV
VIN
2V/DIV
VOUT
ꢀV/DIV
VOUT
ꢀV/DIV
VOUT
ꢀV/DIV
ꢀ0ms/DIV
ꢀ0ms/DIV
ꢀ0ms/DIV
Gate Wavefroms
Pulling SS/EN pin to GND
Shuting down _ VIN ramp down
VIN
2V/DIV
VIN
5V/DIV
GDHꢀ
GDLꢀ
ꢀ0V/DIV
ENꢀ/SSꢀ
2V/DIV
ENꢀ/SSꢀ
2V/DIV
GDLꢀ
ꢀ0V/DIV
GDLꢀ
ꢀ0V/DIV
GDH2
GDL2
ꢀ0V/DIV
VOUT
ꢀV/DIV
VOUT
ꢀV/DIV
ꢀms/DIV
400us/DIV
ꢀus/DIV
Output Ripple _ IOUT = 40A
Transient Response _ ꢀ0A ~ 30A
OCP Trip _ IOUT = 56A
SSꢀ/ENꢀ
2V/DIV
GDHꢀ
GDH2
ꢀ0V/DIV
VOUT
GDHꢀ
50mV/DIV
20V/DIV
GDLꢀ
ꢀ0V/DIV
VOUT
20mV/DIV
VOUT
0.5V/DIV
200us/DIV
ꢀus/DIV
400us/DIV
Efficiency (ꢀ2VIN to ꢀVOUT)
OCP Recovery to 30A loading
EFF (%)
90
80
70
60
50
40
30
SSꢀ/ENꢀ
2V/DIV
GDHꢀ
20V/DIV
GDLꢀ
ꢀ0V/DIV
VOUT
0.5V/DIV
20ms/DIV
IOUT(A)
40
1
5
10
15
20
25
30
35
7
SC2443
Typical Application Circuit Performance
Circuit Conditions : Dual independent outputs configuration as shown in page ꢀ7
Soft Start (VOUT2)
Soft Start (VOUTꢀ)
Soft Start (Both outputs)
SSꢀ/ENꢀ
2V/DIV
VOUTꢀ
0.5V/DIV
COMP2
ꢀV/DIV
COMPꢀ
ENꢀ/SSꢀ
2V/DIV
EN2/SS2
2V/DIV
SS2/EN2
2V/DIV
VIN
2V/DIV
VIN
2V/DIV
VOUTꢀ
ꢀV/DIV
VOUT2
2V/DIV
VOUT2
2V/DIV
20ms/DIV
ꢀ0ms/DIV
ꢀ0ms/DIV
Output Ripple (VOUTꢀ_20A)
Gate waveforms (VOUTꢀ_2 = 20A)
Output Ripple (VOUT2_20A)
GDHꢀ
GDLꢀ
ꢀ0V/DIV
GDH2
GDL2
ꢀ0V/DIV
GDHꢀ
GDLꢀ
ꢀ0V/DIV
VOUT2
50mV/DIV
GDH2
GDL2
ꢀ0V/DIV
VOUTꢀ
50mV/DIV
ꢀus/DIV
ꢀus/DIV
ꢀus/DIV
Transient Response (VOUTꢀ _ 2A ~ ꢀ7A)
Transient Response (VOUT2 _ 2A ~ ꢀ7A)
OCP Trip (VOUTꢀ = 30A)
SSꢀ/ENꢀ
2V/DIV
VOUT2
50mV/DIV
VOUTꢀ
50mV/DIV
GDHꢀ
GDLꢀ
20V/DIV
VOUTꢀ
0.5V/DIV
200us/DIV
200us/DIV
400us/DIV
Combined Efficiency (ꢀ2VIN to ꢀVOUT & 2.5VOUT)
OCP Trip (VOUT2 = 28A)
EFF (%)
95
90
85
80
75
70
SS2/EN2
2V/DIV
GDH2
20V/DIV
GDL2
ꢀ0V/DIV
VOUT2
ꢀV/DIV
400us/DIV
IOUT(A)
1
5
10
15
20
8
SC2443
Pin Descriptions
Pin #
Pin Name
Pin Function
ꢀ
2
INꢀ-
Inverting Input of the Error Amplifier for the Step-down Controller ꢀ.
The Error Amplifier Output for Step-down Controller ꢀ.
COMPꢀ
Edge-triggered Synchronization Input. When not synchronized, tie this pin to a voltage above ꢀ.5V
or the ground. An external clock (frequency > frequency set with ROSC) at this pin synchronizes the
controllers.
3
SYNC
4
5
AGND
REF
Analog Signal Ground
Buffered Output of the Internal 0.5V Reference. The non-inverting input of the error amplifier for the
step-down converter ꢀ is internally connected to this pin
An external Reference voltage is applied to this pin.The non-inverting input of the error amplifier for
the step-down converter 2 is internally connected to this pin.
6
7
8
REFIN
COMP2
IN2-
The Error Amplifier Output for Step-down Controller 2.
Inverting Input of the Error Amplifier for the Step-down Controller 2. Tie to AVCC for two-phase single
output applications.
9
CS2-
The Inverting Input of the Current-sense Amplifier/Comparator for the Controller 2.
The Non-inverting Input of the Current-sense Amplifier/Comparator for the Controller 2.
ꢀ0
CS2+
An external capacitor tied to this pin sets (i) the soft-start time (ii) output overload latch off time for
step-down converter 2. Pulling this pin below 0.7V shuts off the gate drivers for the second controller.
Leave open for two-phase single output applications.
ꢀꢀ
SS2/EN2
ꢀ2
ꢀ3
ꢀ4
ꢀ5
ꢀ6
ꢀ7
ꢀ8
ꢀ9
20
AVCC
BST2
Power Supply Voltage for the Analog Portion of the Controllers.
Bootstrapped Supply for the High-side Gate Drive 2.
GDH2
GDL2
PGND
PVCC
GDLꢀ
GDHꢀ
BSTꢀ
Gate Drive Output for the High-side N-channel MOSFET of Output 2.
Gate Drive Output for the Low-side N-channel MOSFET of Output 2.
Ground Supply for All the Gate drivers.
Power Supply Voltage for Low-side MOSFET Drivers.
Gate Drive Output for the Low-side N-channel MOSFET of Output ꢀ.
Gate Drive Output for the High-side N-channel MOSFET of Output ꢀ.
Bootstrapped Supply for the High-side Gate Drive ꢀ.
An external capacitor tied to this pin sets (i) the soft-start time (ii) output overload latch off time for
buck converter ꢀ. Pulling this pin below 0.7V shuts off the gate drivers for the first controller.
2ꢀ
SSꢀ/ENꢀ
22
23
24
CSꢀ+
CSꢀ-
The Non-inverting Input of the Current-sense Amplifier/Comparator for the Controller ꢀ.
The Inverting Input of the Current-sense Amplifier/Comparator for the Controller ꢀ
An external resistor connected from this pin to GND sets the oscillator frequency
Solder to the Analog ground plane of the PCB.
ROSC
THPAD
9
SC2443
Block Diagram
SYNC
3
AVCC
12
CLK2
CLK1
REFERENCE
OSCILLATOR
ROSC
24
COMP1
2
IN1-
1
REF/IN1+
5
UVLO
4.3/4.5V
BST1
20
GDH1
19
-
+
R
S
EA1
-
+
Q
PWM
Non-Overlapping
Conduction
Control
PVCC
17
GDL1
18
0.5V
+
UVLO
-
0.75 VREF
PGND
16
SLOPE
COMP
CS1+
22
OL
Soft-Start And
Overload
Hiccup
+
+
-
+
DSBL
CS1-
23
ISEN
6
SS1/EN1
21
Control
+
ILIM+
-
75mV
-
+
OCN
ILIM-
110mV
COMP2
7
IN2-
8
-
+
REFIN/IN2+
6
+
-
0.72 VREF
AGND
4
OUT
SC2443 Block Diagram (Channel ꢀ PWM Control Only)
Figure 1. SC2443 Block Diagram
ꢀ0
SC2443
Applications Information
Description
The supply voltages for the high-side gate drivers are
obtained from two diode-capacitor bootstrap circuits. If
the bootstrap capacitor is charged from VCC, the high-
side gate drive voltage swing will be from approximately
2VCC to the ground. The power dissipated in the high-
side gate driver is not higher with higher voltage swing
because the gate-source voltage of the high-side MOSFET
still swing from zero to VCC. The outputs of the low-side
gate drivers swing from VCC to ground.
The SC2443 is a constant frequency 2-phase current-mode
step-downPWMswitchingcontrollerdrivingallN-channel
MOSFET. The two channels of the controller operate at
ꢀ80 degrees out-of-phase from each other. Since input
currents are interleaved in a two-phase converter, input
ripple current is lower and smaller input capacitor can
be used for filtering. Also, with lower inductor current
and smaller inductor ripple current per phase, overall I2R
losses are reduced.
The SC2443 has internal ramp-compensation to prevent
sub-harmonic oscillation when operating above 50%
duty cycle. There is enough ramp internally for a sensed
voltage ripple between ꢀ/4 to ꢀ/3 of the full-scale sensed
voltage limit of 75mV. The maximum sensed voltage limit
is unaffected by the compensating ramp.
The SC2443 operates in synchronous continuous-
conduction mode. It can be configured either as two
independent step-down controllers producing two
separate outputs or as a dual-phase single-output
controller by tying the IN2- pin to VCC. In single output
operation, the channel one error amplifier controls both
channels and the channel two error amplifier is disabled.
Soft-start and overload hiccup of both channels is
synchronized to channel one.
Current-Sensing
There are two ways to sense the inductor current for
current-mode control with the SC2443. Since the peak
inductor current corresponds to 75mV of sensed voltage
(CS+ - CS-), resistor current sensing can be used at the
output without resulting in excessive power dissipation.
Although accurate and far easier to lay out than high-side
resistor sensing, a pair of precision sense resistors adds
cost to the converter.
Frequency Setting and Synchronization
The internal oscillator of the SC2443 runs at twice the
phase frequency. The free-running frequency of the
oscillator can be programmed with an external resistor
from the ROSC pin to ground. The step-down controllers
are capable of operating up to ꢀ MHz. It is necessary to
consider the operating duty-ratio before deciding the
switchingfrequency. SeeApplicationsInformationsection
for more details.
With proper RC filter, Inductor DCR sensing can also be
used for SC2443 resulting in low cost and without extra
power dissipation.
Whensynchronizedexternally,theappliedclockfrequency
should be twice the desired phase frequency. The
synchronizing clock frequency should also be between 2
- 2.6 times the set free-running channel frequency.
Error Amplifiers
In closed loop operation, the error amplifier output ranges
from ꢀ.ꢀV to 3.5V. The upper output operating range
of either error amplifier is reserved for positive current-
sense voltage (CS+ - CS-) and corresponds to positive
(sourcing) output current. If the amplifier swings to its
lower operating range, the amplifier will still modulate the
high-side gate drive duty-ratio. However the peak current-
sense voltage (hence the peak inductor current) will be
limited to a negative value. The error amplifier output
is about 2.2V when the peak sense-voltage is zero. The
built-in offset in the current sense amplifier together with
synchronous continuous-conduction mode of operation
allows the SC2443 to regulate the output irrespective of
the direction of the load current.
Control Loop
The SC2443 uses peak current-mode control for fast
transient response, ease of compensation and current
sharing in single output operation. The low-side MOSFET
of each channel is turned off at the falling-edge of the
phase timing clock. After a brief non-overlapping time
interval of 90ns, the high-side MOSFET is turned on.
The phase inductor current ramps up. When the sensed
inductor current reaches the threshold determined by
the error amplifier output and compensation ramp, the
high-side MOSFET is turned off. After a non-overlapping
conduction time of 90ns, the low-side MOSFET is turned
on.
ꢀꢀ
SC2443
Applications Information (continued)
current reaching its current limit and the instant the
converter shuts down. This is due to cycle skipping(a
consequence of inductor current sense) reduces the
actual operating frequency.
The non-inverting input of the first feedback amplifier is
tied to the internal 0.5V voltage reference. Both the non-
inverting and the inverting inputs of the second error
amplifier are brought out as device pins so that the output
of the second converter can be made to track the output
of the first channel. For example in DDR applications,
Channel ꢀ can be used to generate VDDQ (2.5V) from
the input (5V or ꢀ2V) and channel 2 is used to produce a
tracking VTT (ꢀ.25V) with VDDQ being its input.
The SS/EN pin can also be used as the enable input for that
channel. Both the high-side and the low-side MOSFETs
will be turned off if the SS/EN pin is pulled below 0.7V.
Operating Frequency (fs)
The switching frequency in the SC2443 is user-
programmable. The advantages of using constant
frequency operation are simple passive component
selection and ease of feedback compensation. Before
setting the operating frequency, the following trade-offs
should be considered.
ꢀ) Passive component size
2) Circuitry efficiency
3) EMI condition
Current-Limit
The maximum current sense voltage of +75mV is the
cycle-by-cycle peak current limit when the load is
drawing current from the converter. There is no cycle-by-
cycle current limiting when the inductor current flows in
the negative direction. However once the valley of the
current sense voltage exceeds -ꢀꢀ0mV, the corresponding
channel will undergo shutdown and restart (hiccup).
4) Minimum switch on time and
5) Maximum duty ratio
Soft-Start and Overload Protection
The undervoltage lockout circuit discharges the SS/EN
capacitors. AfterVCC rises above 4.5V, the SS/EN capacitors
are slowly charged by internal 2mA current source. With
internalPNPtransistors,theSS/ENvoltagesclamptheerror
amplifier outputs. When the error amplifier output rises
to 2.2V, the high-side MOSFET starts to switch. As the SS/
EN capacitor continues to be charged, the COMP voltage
follows. The converter gradually delivers increasing power
to the output. The inductor current follows the COMP
voltage envelope until the output goes into regulation.
The SS/EN clamp on COMP is then released.
For a given output power, the sizes of the passive
components are inversely proportional to the switching
frequency, whereas MOSFET and Diodes switching losses
are proportional to the operating frequency. Other
issues such as heat dissipation, packaging and the cost
issues are also to be considered. The frequency bands
for signal transmission should be avoided because of EM
interference.
Minimum Switch On Time Consideration
In the SC2443 the falling edge of the clock turns on the
top MOSFET. The inductor current and the sensed voltage
ramp up. After the sensed voltage crosses a threshold
determined by the error amplifier output, the top MOSFET
is turned off. The propagation delay time from the turn-
on of the controlling FET to its turn-off is the minimum
switch on time. The SC2443 has a minimum on time of
about ꢀ50ns at room temperature. This is the shortest on
interval of the controlling FET. The controller either does
not turn on the top MOSFET at all or turns it on for at least
ꢀ50ns.
After the SS/EN capacitor is charged above 3.2V (high
enough for the error amplifier to provide full load current),
the overload detection circuit is activated. If the output
voltage falls below 70% of its set value or the valley
current-sense voltage exceeds -ꢀꢀ0mV, an overload latch
will be set and both the top and the bottom MOSFETs will
be turned off. The SS/EN capacitor is slowly discharged
with an internal ꢀ.4mA current sink. The overload latch
is reset when the SS/EN capacitor is discharged below
0.5V. The SS/EN capacitor is then recharged with the 2uA
current source and the converter undergoes soft-start.
If overload persists, the SC2443 will undergo repetitive
shutdown and restart.
For a synchronous step-down converter, the operating
duty cycle is
top MOSFET is
. So the required on time for the
VO /VIN
VO /
(
VIN × FS
)
. If the frequency is set
such that the required pulse width is less than ꢀ50ns,
then the converter will start skipping cycles. Due to
minimum on time limitation, simultaneously operating at
If the output is short-circuited, the inductor current will
not increase indefinitely between the time the inductor
ꢀ2
SC2443
Applications Information (continued)
very high switching frequency and very short duty cycle
is not practical. If the voltage conversion ratio
VO /VIN
PC Board Layout Issues
and hence the required duty cycle is higher, the switching
frequency can be increased to reduce the sizes of passive
components.
There will not be enough modulation headroom if the
on time is simply made equal to the minimum on time
of the SC2443. For ease of control, we recommend the
required pulse width to be at least ꢀ.5 times the minimum
on time.
Circuit board layout is very important for the proper
operation of high frequency switching power converters.
A power ground plane is required to reduce ground
bounces. The following are suggested for proper layout:
Power Stage
ꢀ) Separate the power ground from the signal ground. In
the SC2443, the power ground PGND should be tied to
the source terminal of lower MOSFETs. The signal ground
AGND should be tied to the negative terminal of the
output capacitor.
Setting the Switching Frequency
The switching frequency is set with an external resistor
connected from Pin 24 to ground. The set frequency is
inversely proportional to the resistor value (Figure 2).
2) Minimize the size of high pulse current loop. Keep the
top MOSFET, bottom MOSFET and the input capacitors
within a small area with short and wide traces. In addition
to the aluminum energy storage capacitors, add multi-
layer ceramic (MLC) capacitors from the input to the
power ground to improve high frequency bypass.
Figure 2. Free running frequency vs. ROSC.
800
700
600
500
400
300
200
100
0
3) Reduce high frequency voltage ringing. Widen and
shorten the drain and source traces of the MOSFET to
reduce stray inductances. Add a small RC snubber if
necessary to reduce the high frequency ringing at the
phase node. Sometimes slowing down the gate drive
signal also helps in reducing the high frequency ringing
at the phase node.
0
50
100
150
200
250
4) Shorten the gate driver path. Integrity of the gate drive
(voltage level, leading and falling edges) is important for
circuit operation and efficiency. Short and wide gate drive
traces reduce trace inductances. Bond wire inductance is
about 2~3nH. If the length of the PCB trace from the gate
driver to the MOSFET gate is ꢀ inch, the trace inductance
will be about 25nH. If the gate drive current is 2A with
ꢀ0ns rise and falling times, the voltage drops across
the bond wire and the PCB trace will be 0.6V and 5V
respectively. This may slow down the switching transient
of the MOSFET. These inductances may also ring with the
gate capacitance.
Rosc (k Ohm)
Setting the Output Voltage
The non-inverting input of the channel-one error amplifier
is internally tied the 0.5V voltage reference output (Pin 5).
The non-inverting input of the channel-two error amplifier
is brought out as a device pin (Pin 6) to which the user can
connect Pin 5 or an external voltage reference. A simple
voltage divider (Roꢀ at top and Ro2 at bottom) sets the
converter output voltage. The voltage feedback gain
h=0.5/Vo is related to the divider resistors value as
5) Put the decoupling capacitor for the gate drive power
supplies (BST and PVCC) close to the IC and power
ground.
h
Ro2
=
Ro1.
1- h
Control Section
6) The frequency-setting resistor Rosc should be placed
close to Pin 3. Trace length from this resistor to the analog
ꢀ3
SC2443
Applications Information (continued)
ground should be minimized.
7) Solder the bias decoupling capacitor right across the
AVCC and analog ground AGND.
8) Place the inductor DCR sense components away from
the power circuit and close to the corresponding CS+
and CS- pins. Use X7R type ceramic capacitor for the DCR
sense capacitor because of their temperature stability.
9) Use an isolated local ground plane underneath the
controller and tie it to the negative side of output capacitor
bank.
ꢀ0) Comp pin is sensitive to noise. Place compensation
network components away from noise signal (i.e. gate
driver signals, phase node) and close to corresponding
Comp pin .
ꢀ4
SC2443
Evaluation Application Circuit _ Single Output, Current share configuration
7
24
23
22
21
20
19
COMP2
IN2-
ROSC
CS1-
8
9
CS2-
CS1+
10
11
12
CS2+
SS1/EN1
BST1
SS2/EN2
AVCC
GDH1
1 0 u F / 1 6 V
1 0 u F / 1 6 V
I P D 0 6 N 0 3 L A
I P D 0 6 N 0 3 L A
2 7 0 u F / 1 6 V / O S C O N
2 7 0 u F / 1 6 V / O
2 7 0 u F / 1 6 V / O
1 0 u F / 6 . 3 V
1 5 0 0 u F / 6 . 3 V / F L
1 5 0 0 u F / 6 . 3 V / F L
1 5 0 0 u F / 6 . 3 V / F L
N . P .
1 0 u F / 6 . 3 V
ꢀ5
SC2443
Evaluation Board Bill of Materials
Single Output Current Share Configuration
Item
Reference
Quantity
Description
Package
Part
Vendor
ꢀ
2
3
Cꢀ,Cꢀ0
C2,C3,Cꢀꢀ
2
3
4
ꢀ6V X5R ceramic capacitor
ꢀ6V Aluminum solid capacitor _SEPC series
ꢀ6V X5R ceramic capacitor
ꢀ206
8 X 9mm
0603
ꢀ0uF
270uF
ꢀuF
Murata
Sanyo
C4,C9,C20,C25
Murata
4
5
C5,C2ꢀ,C23
C6,C22
C7
3
2
ꢀ
2
ꢀ
2
3
2
ꢀ6V X7R ceramic capacitor
25V X7R ceramic capacitor
0603
ꢀ00nF
22pF
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Murata
0603
0603
16V X7R
6
ceramic capacitor
22nF
7
C8,C24
Cꢀ2
25V X7R ceramic capacitor
25V X7R ceramic capacitor
6.3V X7R ceramic capacitor
6.3V Aluminum capacitor _ FL series
Small signal diode
0603
0603
2.2nF
8
330pF
ꢀ0uF
9
Cꢀ4,Cꢀ9
Cꢀ5,Cꢀ6,Cꢀ7
Dꢀ,D2
ꢀ206
ꢀ0
ꢀꢀ
8 X ꢀꢀ.5mm
SMD
ꢀ000uF
ꢀN4ꢀ48
Panasonic
Any
ꢀ2.5 X ꢀ2.5 X
ꢀ0mm
ꢀ2
Lꢀ,L2
2
SMD inductor
ꢀ.5uH/ꢀ.8mR
TRIO
ꢀ3
ꢀ4
Qꢀ,Q4
2
4
30V N Channel MOSFET
30V N Channel MOSFET
D-pack
D-pack
IPD09N03LA
IPD06N03LA
Infineon
Infineon
Q2,Q3,Q5,Q6
Rꢀ,R7,Rꢀꢀ,
Rꢀ7,Rꢀ8
ꢀ5
5
5% SMD resistor
0603
0R
Any
ꢀ6
ꢀ7
ꢀ8
ꢀ9
20
2ꢀ
22
23
24
25
R2,Rꢀ2
R3,Rꢀ3
R5
2
2
ꢀ
3
2
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
5% SMD resistor
5% SMD resistor
0603
0603
ꢀ0K
ꢀR
Any
Any
ꢀ% SMD resistor
0603
ꢀ24K
ꢀ0R
Any
R6,Rꢀ6.R2ꢀ
R8,Rꢀ9
R9
ꢀ% SMD resistor
0603
Any
ꢀ% SMD resistor
0603
560R
47K
Any
5% SMD resistor
0603
Any
Rꢀ0
5% SMD resistor
0603
2R2
Any
Rꢀ5
ꢀ% SMD resistor
0603
ꢀ.05K
ꢀK
Any
R20
ꢀ% SMD resistor
0603
Any
Uꢀ
Dual phase Sync. step down controller
MLPQ-24
SC2443
SEMTECH
ꢀ6
SC2443
Evaluation Application Circuit_ Dual Independant Outputs
24
23
22
21
20
19
7
ROSC
CS1-
COMP2
IN2-
N . P .
8
9
CS1+
CS2-
10
11
12
SS1/EN1
BST1
CS2+
2 2 n F
2 2 n F
SS2/EN2
AVCC
GDH1
I P D 0 9 N 0 3 L A
1 0 u F / 1 6 V
I P D 0 9 N 0 3 L A
1 0 u F / 1 6 V
1 5 0 0 u F / 1 6 V
N . P .
1 5 0 0 u F / 1 6 V / F L
1 0 u F / 6 . 3 V
2 2 u F / 1 0 V / X 7 R
1 8 0 0 u F / 6 . 3 V / F L
2 2 0 0 u F / 6 . 3 V / F L
1 8 0 0 u F / 6 . 3 V / F L
1 0 u F / 6 . 3 V
2 2 0 0 u F / 6 . 3 V / F L
2 2 u F / 1 0 V / X 7 R
ꢀ7
SC2443
Evaluation Board Bill of Materials
Dual Independent Output Configuration
Item
Reference
Quantity
Description
Package
Part
Vendor
ꢀ
2
Cꢀ,C4
2
2
ꢀ6V X5R ceramic capacitor
ꢀ206
ꢀ0uF
Murata
C2,Cꢀ5
ꢀ6V Aluminum capacitor _FL series
ꢀ0 X 20mm
ꢀ500uF
Panasonic
C4,Cꢀ3,Cꢀ8,
C30
3
4
ꢀ6V X5R ceramic capacitor
0603
0603
ꢀuF
Murata
4
5
C5,Cꢀ9,C26
C6
3
ꢀ
2
2
2
2
2
2
2
2
2
2
2
ꢀ6V X7R ceramic capacitor
25V X7R ceramic capacitor
ꢀ00nF
27pF
Panasonic
Panasonic
Panasonic
Murata
0603
0603
16V X7R
6
C7,C29
C8,Cꢀꢀ
C9,Cꢀ0
Cꢀ2,C25
Cꢀ6,C27
C2ꢀ,C24
C22,C23
Dꢀ,D2
ceramic capacitor
22nF
7
6.3V X7R ceramic capacitor
6.3V Aluminum capacitor _ FL series
25V X7R ceramic capacitor
25V X7R ceramic capacitor
ꢀ0V X7R ceramic capacitor
6.3V Aluminum capacitor _ FL series
Small signal diode
ꢀ206
ꢀ0 X ꢀ6mm
0603
ꢀ0uF
8
ꢀ800uF
2.2nF
Panasonic
Panasonic
Panasonic
Murata
9
ꢀ0
ꢀꢀ
ꢀ2
ꢀ3
ꢀ4
ꢀ5
ꢀ6
0603
470pF
ꢀ206
ꢀ0uF
ꢀ0 X 20mm
SMD
2200uF
ꢀN4ꢀ48
2.2uH/2mR
IPD09N03LA
IPD06N03LA
Panasonic
Any
Lꢀ,L2
Through hole inductor
Any
Qꢀ,Q4
30V N Channel MOSFET
D-pack
D-pack
Infineon
Infineon
Q2,Q5
30V N Channel MOSFET
Rꢀ,R7,Rꢀꢀ,Rꢀ3,
Rꢀ8,Rꢀ9,R24
R25
ꢀ7
8
5% SMD resistor
0603
0R
Any
ꢀ8
ꢀ9
20
2ꢀ
22
23
24
25
26
27
28
29
R2
R3,Rꢀ5
R5
ꢀ
2
ꢀ
ꢀ
2
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
5% SMD resistor
5% SMD resistor
0603
0603
ꢀ5K
ꢀR
Any
Any
ꢀ% SMD resistor
0603
ꢀ.05K
ꢀ24K
ꢀK
Any
R6
ꢀ% SMD resistor
0603
Any
Rꢀ0,R22
Rꢀꢀ
ꢀ% SMD resistor
0603
Any
5% SMD resistor
0603
47K
Any
Rꢀ2
5% SMD resistor
0603
2R2
Any
Rꢀ4
5% SMD resistor
0603
20K
Any
Rꢀ7
ꢀ% SMD resistor
0603
4.ꢀ2K
ꢀ00K
ꢀ0R
Any
R20
5% SMD resistor
0603
Any
R23
5% SMD resistor
0603
Any
Uꢀ
Dual phase Sync. step down controller
MLPQ-24
SC2443
SEMTECH
ꢀ8
SC2443
Evaluation Application Circuit_ Dual Independant Outputs (Lower power application)
7
24
23
22
21
20
19
COMP2
IN2-
ROSC
CS1-
N . P .
8
9
CS2-
CS1+
10
11
12
CS2+
SS1/EN1
BST1
F n 2 2
F n 2 2
SS2/EN2
AVCC
GDH1
V 6 1 / F u 0 1
V 6 1 / F u 0 1
L F / V 6 1 / F u 0 8 6
L F / V 6 1 / F u 0 8 6
R 7 X / V 3 . 6 / F u 0 1
L F / V 3 . 6 / F u 0 0 0 1
V 3 . 6 / F u 0 1
L F / V 3 . 6 / F u 0 0 0 1
P .
P .
N
N
P .
P .
N
N
ꢀ9
SC2443
Evaluation Board Bill of Materials
Dual Independent Output Configuration
Item
Reference
Quantity
Description
Package
Part
Vendor
ꢀ
2
Cꢀ,Cꢀ4
C2,Cꢀ5
2
2
ꢀ6V X5R ceramic capacitor
ꢀ206
ꢀ0uF
Murata
ꢀ6V Aluminum capacitor _FL series
ꢀ0 X ꢀ2.5mm
680uF
Panasonic
C4,Cꢀ3,Cꢀ8,
C30
3
4
ꢀ6V X5R ceramic capacitor
0603
0603
ꢀuF
Murata
4
5
C5,Cꢀ9,C26
C6
3
ꢀ
2
2
2
2
2
ꢀ
2
2
2
ꢀ6V X7R ceramic capacitor
25V X7R ceramic capacitor
ꢀ00nF
27pF
Panasonic
Panasonic
Panasonic
Murata
0603
0603
16V X7R
6
C7,C29
C8,C2ꢀ
C9,C22
Cꢀ2,C25
Cꢀ6,C27
C20
ceramic capacitor
22nF
7
6.3V X7R ceramic capacitor
6.3V Aluminum capacitor _ FL series
25V X7R ceramic capacitor
25V X7R ceramic capacitor
25V X7R ceramic capacitor
Small signal diode
ꢀ206
ꢀ0 X ꢀ2.5mm
0603
ꢀ0uF
8
ꢀ000uF
2.2nF
Panasonic
Panasonic
Panasonic
Murata
9
ꢀ0
ꢀꢀ
ꢀ2
ꢀ3
ꢀ4
0603
470pF
0603
ꢀ8pF
Dꢀ,D2
Lꢀ,L2
SMD
ꢀN4ꢀ48
ꢀ.9uH/3.9mR
FDS6982
Any
Through hole inductor
Any
Qꢀ,Q2
30V N Channel MOSFET
SO-8
0603
Fairchild
Rꢀ,R8,Rꢀ3,
Rꢀ9,R24,R25
ꢀ5
6
5% SMD resistor
0R
Any
ꢀ6
ꢀ7
ꢀ8
ꢀ9
20
2ꢀ
22
23
24
25
26
R2,Rꢀ4
R3,Rꢀ5
R5
2
2
ꢀ
ꢀ
3
2
2
2
ꢀ
ꢀ
ꢀ
5% SMD resistor
5% SMD resistor
0603
0603
4.87K
ꢀR
Any
Any
ꢀ% SMD resistor
0603
2.05K
ꢀ02K
ꢀ0R
Any
R6
ꢀ% SMD resistor
0603
Any
R7,Rꢀ8,R23
R9,R2ꢀ
Rꢀ0,R22
Rꢀꢀ,R20
Rꢀ2
5% SMD resistor
0603
Any
5% SMD resistor
0603
604R
ꢀK
Any
ꢀ% SMD resistor
0603
Any
5% SMD resistor
0603
47K
Any
5% SMD resistor
0603
2R2
Any
Rꢀ7
ꢀ% SMD resistor
0603
2.6ꢀK
SC2443
Any
Uꢀ
Dual phase Sync. step down controller
MLPQ-24
SEMTECH
20
SC2443
Outline Drawing - MLPQ-24
A
D
B
E
DIMENSIONS
INCHES MILLIMETERS
MIN NOM MAX MIN NOM MAX
DIM
A
.031
.039
0.90 1.00
.035
.001
(.008)
0.80
A1 .000
.002 0.00 0.02 0.05
-
-
-
-
(0.20)
0.25 0.30
A2
b
D
D1
E
PIN 1
INDICATOR
(LASER MARK)
.007
.010 .012 0.18
.152 .157 .163 3.85 4.00 4.15
2.70
.100 .106 .110 2.55
.152 .157 .163 3.85 4.00 4.15
2.70 2.80
2.80
E1 .100
.106 .110 2.55
e
L
N
aaa
bbb
.020 BSC
0.50 BSC
.012 .016 .020 0.30 0.40 0.50
24
24
.004
.004
0.10
0.10
A2
A
SEATING
PLANE
aaa C
A1
C
D1
LxN
E/2
E1
2
1
N
bxN
bbb
C A B
e
D/2
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.
2.
© Semtech, Inc. All Rights Reserved. An ISO-registered company. Semtech cannot assume responsibility for use of any circuitry other than
circuitry entirely embodied in a Semtech product. No circuit patent licenses are implied. Semtech reserves the right to change the circuitry and
specifications without notice at any time. Trademarks and Copyrights belong to their respective holders.
© 2007 Semtech Corporation
2ꢀ
SC2443
Land Pattern - MLPQ-24
K
DIMENSIONS
INCHES MILLIMETERS
DIM
(.156)
.122
.106
.106
.020
.010
.033
.189
(3.95)
3.10
2.70
2.70
0.50
0.25
0.85
4.80
C
G
H
K
P
X
Y
Z
G
Z
(C)
H
X
P
NOTES:
1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2.
THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 930ꢀ2
Phone: (805) 498-2ꢀꢀꢀ Fax: (805) 498-3804
www.semtech.com
22
相关型号：
SC2446ITSTR
Dual Switching Controller, Current-mode, 3A, 1000kHz Switching Freq-Max, PDSO28, MO-153-AE, TSSOP-28
SEMTECH
SC2446ITSTRT
Dual Switching Controller, Current-mode, 3A, 1000kHz Switching Freq-Max, PDSO28, LEAD FREE, MO-153-AE, TSSOP-28
SEMTECH
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