SC4520SETRT [SEMTECH]
3A Step-Down Switching Regulator with Adjustable Switching Frequency; 3A降压型开关稳压器，可调节开关频率
| 型号： | SC4520SETRT |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | 3A Step-Down Switching Regulator with Adjustable Switching Frequency |
| 文件： | 总12页 (文件大小：269K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SC4520
3A Step-Down Switching Regulator with
Adjustable Switching Frequency
POWER MANAGEMENT
Features
Description
The SC4520 is a current mode switching regulator with
an integrated switch and an adjustable frequency with
enable function. The integrated switch allows for cost-
effective, low power solutions with a peak switch current
of 3 amps. An adjustable high frequency of 100kHz to
600kHz provides for fast dynamic response and
instantaneous duty cycle adjustment as the input varies,
making the device ideal for CPE applications where the
input is a wall plug power. Low shutdown current also
makes the this device an excellent choice for portable
applications where conserving battery life is of prime
concern.
Wide operating voltage range: 4.4V to 24V
Integrated 3 Amp switch
100kHz to 600kHz adjustable frequency operation
Current mode control
Precision enable threshold
SO-8 EDP package. Lead-free product, fully WEEE
and RoHS compliant
Applications
XDSL modems
CPE equipment
DC-DC point of load applications
Portable equipment
Digtial consumer electronics
Typical Application Circuit
D1
C1
1
L1
BST
2
3
6
7
VIN
VOUT
IN
SW
FB
5
8
Enable
EN
SC4520
R1
C2
C3
FSET
COMP
D2
GND
4
R2
Rosc
C4
R3
Revision: December 13, 2006
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SC4520
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may
affect device reliability.
Parameter
Symbol
Limits
Units
Input Supply Voltage
Boost Pin Above VSW
Boost Pin Voltage
VIN
(VBST - VSW)
VBST
VEN
-0.3 to +28
V
V
16
-0.3 to +32
-0.3 to +24
-0.3 to +6
1
V
EN Pin Voltage
V
FB Pin Voltage
VFB
V
FB Pin Current
IFB
mA
V
FSET Pin Voltage
Thermal Impedance Junction to Ambient (1)
VFSET
θJA
+3
36.5
°C/W
°C
°C
°C
kV
Maximum Junction Temperature
Storage Temperature Range
TJ
150
TSTG
-65 to +150
300
Lead Temperature (Soldering) 10 sec
ESD Rating (Human Body Model)
Note: (1) Minimum pad size.
TLEAD
ESD
2
Electrical Characteristics
Unless specified: VIN = 12V, VCOMP = 0.8V, VBST = VIN + 5V, EN = tied to VIN, SW = open.
TA = TJ = -40°C to 125°C.
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Operating Input Voltage
Maximum Switch Current Limit
Oscillator Frequency
VIN
ISW
24(1)
V
A
3.0
250
100
fOSC
ROSC = 82.5k Ω
300
350
600
kHz
kHz
mV
V
Oscillator Frequency Range
Switch On Voltage Drop
VIN Undervoltage Lockout
VIN UVLO Hysteresis
fOSC
VD(SW)
VUVLO
VHYST
IQ
ISW = 3A
220
3.9
60
4.4
5.5
mV
mA
µA
VIN Supply Current
VFB = 1V
VEN = 0V
3
Standby Current
IQ(OFF)
250
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SC4520
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: VIN = 12V, VCOMP = 0.8V, VBST = VIN + 5V, EN = tied to VIN, SW = open.
TA = TJ = -40°C to 125°C.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
-0.25
0.8
MAX
-1
UNITS
µA
FB Input Current
Feedback Voltage
IFB
0.784
0.816
V
Feedback Voltage Line
Regulation
4.4V < VIN < 24V(1)
+3
mV/V
FB to VCOMP Voltage Gain(2)
0.9V ≤ VCOMP ≤ 2.0V
∆ ICOMP = ± 10µA
150
500
350
850
V/V
FB to VCOMP
1300
µMho
Transconductance(2)
VCOMP Pin Source Current
VCOMP Pin Sink Current
VFB = 0.6V
VFB = 1.0V
70
-70
4.3
110
µA
µA
-110
VCOMP Pin to Switch Current
Transconductance
VCOMP = 1.25V
A/V
VCOMP Pin Maximum
Switching Threshold
Duty cycle = 0%
0.6
V
VCOMP OCP Threshold
VCOMP rising
VCOMP falling
2
V
V
VCOMP Hiccup Retry Threshold
Maximum Switch Duty Cycle
0.25
VCOMP = 1.2V, ISW = 400mA,
85
%
ROSC = 0
Minimum Boost Voltage
Above Switch(2)
2.7
V
Boost Current
ISW = 1A
ISW = 3A
10
30
15
45
mA
Enable Input Threshold
Voltage
VETH
1.1
1.3
1.5
V
Enable Output Bias Current
IEOL
IEOH
EN = 50mV below threshold
EN = 50mV below threshold
8
µA
µA
10
Notes:
(1) The required minimum input voltage for a regulated output depends on the output voltage and load condition.
(2) Guaranteed by design.
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SC4520
POWER MANAGEMENT
Pin Configurations
Ordering Information
Part Number (1)(2)
SC4520SETRT
SC4520EVB
Package
TOP VIEW
SO-8 EDP
EVALUATION BOARD
BST
IN
SW
GND
1
2
3
4
8
7
6
5
FSET
COMP
FB
Notes:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
EN
(2) Lead-free product. This product is WEEE and
RoHS compliant.
(SO-8 EDP)
Pin Descriptions
Pin #
Pin Name Pin Function
1
BST
This pin provides power to the internal NPN switch. The minimum turn on voltage for this switch
is 2.7V.
2
3
4
5
IN
Pin IN delivers all power required by control and power circuitry. This pin sees high di/dt during
switching. A decoupling capacitor should be attached to this pin as close as possible.
SW
GND
EN
Pin SW is the emitter of the internal switch. The external freewheeling diode should be connected
as close as possible to this pin.
All voltages are measured with respect to this pin. The decoupling capacitor and the freewheeling
diode should be connected to GND as short as possible.
This is the chip enable input. The regulator is switched on if EN is high, and it is off if EN is low.
The regulator is in standby mode when EN is low, and the input supply current is reduced to a few
microamperes.
6
7
FB
Feedback input for adjustable output controllers.
COMP
This is the output of the internal error amplifier and input of the peak current comparator. A
compensation network is connected to this pin to achieve the specified performance.
8
-
FSET
Frequency setting pin. An external resistor connected from this pin to GND, sets the oscillator
frequency.
THERMAL Pad for heatsinking purposes. Connect to ground plane using multiple vias. Not connected
PAD internally.
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SC4520
POWER MANAGEMENT
Block Diagram
+
IN
+
ISEN
+
SLOPE
40m
COMP
FB
BST
+
PWM
S
R
-
Q
POWER
TRANSISTOR
EA
SW
Is
UVLO
REFERENCE
EN
SOFT START
HICCUP
GND
OL
0
SLOPE
SLOPE COMP
FB
OSCILLATOR
FSET
CLK
FREQUENCY
Typical Characteristic - OCP Limit
OCP Limit vs Duty Cycle
Rosc = 0
7
6.5
6
5.5
5
ILIM @-40C
ILIM @25C
ILIM @125C
4.5
4
3.5
3
2.5
2
0
20
40
60
80
100
Duty Cycle (%)
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SC4520
POWER MANAGEMENT
Application Information
Oscillator
The SC4520 is a current mode buck converter regulator.
SC4520 has an internal fixed-frequency clock. The
SC4520 uses two feedback loops that control the duty
cycle of the internal power switch. The error amplifier
functions like that of the voltage mode converter. The
output of the error amplifier works as a switch current
reference. This technique effectively removes one of the
double poles in the voltage mode system. With this, it is
much simpler to compensate a current mode converter
to have better performance. The current sense amplifier
in the SC4520 monitors the switch current during each
cycle. Overcurrent protection (OCP) is triggered when the
current limit exceeds the upper limit of 3A, detected by a
voltage on COMP greater than about 2V. When an OCP
fault is detected, the switch is turned off and the external
COMP capacitor is discharged at the rate of dv/dt = 3µA/
Ccomp. Once the COMP voltage has fallen below 250mV,
the part enters a normal startup cycle. Ccomp is the total
capacitance value attached to COMP. In the case of
sustained overcurrent or dead-short, the part will
continually cycle through the retry sequence as described
above, at a rate dependent on the value of Ccomp. During
start up, the voltage on COMP rises roughly at the rate of
dv/dt = 120µA/Ccomp. Therefore, the retry time for a
sustained overcurrent can be approximately calculated
as:
The external resistor connected to the FSET pin sets the
PWM frequency from 100kHz to 600kHz.
Frequency vs ROSC
700
600
500
400
300
200
100
0
0
50
100 150 200 250 300 350 400 450 500 550 600 650 700
Rosc - kOhm
UVLO
When the EN pin is pulled and held above 1.8V, the voltage
on Pin IN determines the operation of the SC4520. As
VIN increases during power up, the internal circuit senses
VIN and keeps the power transistor off until VIN reaches
4.4V.
Load Current
The peak current IPEAK in the switch is internally limited.
For a specific application, the allowed load current IOMAX
will change if the input voltage drifts away from the original
design as given for continuous current mode:
2V
120uA
2V
3uA
T
= Ccomp
•
+ Ccomp
•
retry
Figure 1 shows the voltage on COMP during a sustained
overcurrent condition.
VO (1− D)
IOMAX = 3 −
2 L fs
Where:
fS = switching frequency,
VO= output voltage and
D = duty ratio, VO / VIN
VIN= input voltage.
Figure 1. Voltage on COMP for Startup and OCP
Enable
Pulling and holding the EN pin below 0.4V activates the
shut down mode of the SC4520 which reduces the input
supply current to less than 150µA. During the shut down
mode, the switch is turned off. The SC4520 is turned on
if the EN pin is pulled high.
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SC4520
POWER MANAGEMENT
Application Information (Cont.)
Figure 2 shows the theoretical maximum load current
for the specific cases. In a real application, however, the
allowed maximum load current also depends on the layout
and the air cooling condition. Therefore, the maximum
load current may need to be degraded according to the
thermal situation of the application.
VO (VI − VO )
VI fs δ IOMAX
L =
Where:
fs = switching frequency,
δ = ratio of the peak to peak inductor current to the
output load current and
VO = output voltage.
The peak to peak inductor current is:
Maximum Load Current vs Input Voltage
L=10uH
Ip−p = δ • IOMAX
After the required inductor value is selected, the proper
selection of the core material is based on the peak
inductor current and efficiency specifications. The core
must be able to handle the peak inductor current IPEAK
without saturation and produce low core loss during the
high frequency operation.
2.900
2.880
2.860
2.840
Vo=2.5V
Vo=3.3V
Vo=5V
2.820
2.800
2.780
2.760
2.740
2.720
2.700
Ip−p
2
IPEAK = IOMAX
+
The power loss for the inductor includes its core loss and
copper loss. If possible, the winding resistance should
be minimized to reduce inductor’s copper loss. The core
must be able to handle the peak inductor current IPEAK
without saturation and produce low core loss during the
high frequency operation. The core loss can be found in
the manufacturer’s datasheet. The inductor’s copper loss
can be estimated as follows:
4
6
8
10
12
14
16
18
Vi (V)
Figure 2. Theoretical maximum load current curves
Inductor Selection
The factors for selecting the inductor include its cost,
efficiency, size and EMI. For a typical SC4520 application,
the inductor selection is mainly based on its value,
saturation current and DC resistance. Increasing the
inductor value will decrease the ripple level of the output
voltage while the output transient response will be
degraded. Low value inductors offer small size and fast
transient responses while they allow large ripple currents,
poor efficiencies and require more output capacitance
for low output ripple. The inductor should be able to
handle the peak current without saturating and its copper
resistance in the winding should be as low as possible to
minimize its resistive power loss. A good trade-off among
its size, loss and cost is to set the inductor ripple current
to be within 15% to 30% of the maximum output current.
PCOPPER = I2
RWINDING
LRMS
Where:
ILRMS is the RMS current in the inductor. This current can
be calculated as follows:
1
I
LRMS = IOMAX 1+
δ2
12
Output Capacitor Selection
Basically there are two major factors to consider in
selecting the type and quantity of the output capacitors.
The first one is the required ESR (Equivalent Series
Resistance) which should be low enough to reduce the
output voltage deviation during load changes. The second
one is the required capacitance, which should be high
enough to hold up the output voltage. Before the SC4520
regulates the inductor current to a new value during a
The inductor value can be determined according to its
operating point under its continuous mode and the
switching frequency as follows:
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SC4520
POWER MANAGEMENT
Application Information (Cont.)
load transient, the output capacitor delivers all the
additional current needed by the load. The ESR and ESL
of the output capacitor, the loop parasitic inductance
between the output capacitor and the load combined
with inductor ripple current are all major contributors to
the output voltage ripple. Surface mount ceramic
capacitors are recommended.
1
fs
TW
=
Dmax
Where:
fs = the switching frequency and
Dmax = maximum duty ratio, 0.85 for the SC4520.
The required minimum capacitance for the boost
capacitor will be:
Input Capacitor Selection
IB
VD
Cboost
=
TW
The input capacitor selection is based on its ripple current
level, required capacitance and voltage rating. This
capacitor must be able to provide the ripple current
drawn by the converter. For the continuous conduction
mode, the RMS value of the input capacitor current
ICIN(RMS) can be calculated from:
Where:
IB = the boost current and
VD= discharge ripple voltage.
With fs = 600kHz, VD = 0.5V and IB = 0.045A, the required
minimum capacitance for the boost capacitor is:
VO (VI − VO)
ICIN
= IOMAX
(RMS)
V2
I
IB
VD fs
1
0.045
0.5 600k
1
This current gives the capacitor’s power loss through its
RCIN(ESR) as follows:
Cboost
=
Dmax
=
0.85 = 128nF
PCIN = I2
• R
CIN(ESR)
The internal driver of the switch requires a minimum 2.7V
to fully turn on that switch to reduce its conduction loss.
If the output voltage is less than 2.7V, the boost capacitor
can be connected to either the input side or an
independent supply with a decoupling capacitor. But the
Pin BST should not see a voltage higher than its maximum
rating.
CIN
(RMS)
The input ripple voltage mainly depends on the input
capacitor’s ESR and its capacitance for a given load, input
voltage and output voltage. Assuming that the input
current of the converter is constant, the required input
capacitance for a given voltage ripple can be calculated
by:
D (1 − D)
fs (∆VI − IOMAX RCIN
Freewheeling Diode Selection
CIN = IOMAX
)
(ESR)
Where:
∆VI = the given input voltage ripple.
This diode conducts during the switch’s off-time. The diode
should have enough current capability for full load and
short circuit conditions without any thermal concerns.
Its maximum repetitive reverse block voltage has to be
higher than the input voltage of the SC4520. A low
forward conduction drop is also required to increase the
overall efficiency. The freewheeling diode should be
turned on and off fast with minimum reverse recovery
because the SC4520 is designed for high frequency
applications. SS23 Schottky rectifier is recommended
for certain applications. The average current of the diode,
ID_AVG can be calculated by:
Because the input capacitor is exposed to the large surge
current, attention is needed for the input capacitor. If
tantalum capacitors are used at the input side of the
converter, one needs to ensure that the RMS and surge
ratings are not exceeded. For generic tantalum
capacitors, it is suggested to derate their voltage ratings
at a ratio of about two to protect these input capacitors.
Boost Capacitor and its Supply Source Selection
The boost capacitor selection is based on its discharge
ripple voltage, worst case conduction time and boost
current. The worst case conduction time Tw can be
estimated as follows:
ID-AVG = Iomax (I−D)
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SC4520
POWER MANAGEMENT
Application Information (Cont.)
Thermal Considerations
Where:
RL – Load and
C – Output capacitor.
There are three major power dissipation sources for the
SC4520. The internal switch conduction loss, its switching
loss due to the high frequency switching actions and the
base drive boost circuit loss. These losses can be
estimated as:
The goal of the compensation design is to shape the loop
to have a high DC gain, high bandwidth, enough phase
margin, and high attenuation for high frequency noises.
Figure 3 gives a typical compensation network which
offers 2 poles and 1 zero to the power stage:
10
1000
2
−3
P
= Io Ron D +10.8 10 Io V +
Io D (Vboost )
total
I
Where:
SC4520
1
Vout
L1
IO = load current;
Ron = on-equivalent resistance of the switch;
VBOOST = input voltage or output based on the boost circuit
connection.
The junction temperature of the SC4520 can be
further determined by:
2
5
3
IN
SW
6
C
R1
R2
EN
FB
8
7
FSET
COMP
4
C4
C5
R3
D2
TJ = TA + θJA
P
total
θ
is the thermal resistance from junction to ambient.
JA
Its value is a function of the IC package, the application
layout and the air cooling system.
Figure 3. Compensation network provides 2 poles and
1 zero.
The freewheeling diode also contributes a significant
portion of the total converter loss. This loss should be
minimized to increase the converter efficiency by using
Schottky diodes with low forward drop (VF).
The compensation network gives the following
characteristics:
s
1
+
ωZ
s
R2
R1 +R2
Pdiode = VF Io (1−D)
GCOMP(s) = ω1
gm
s (1+
)
ωP2
Loop Compensation Design
Where:
1
The SC4520 has an internal error amplifier and requires
a compensation network to connect between the COMP
pin and GND pin as shown in Figure 3. The compensation
network includes C4, C5 and R3. R1 and R2 are used to
program the output voltage according to:
ω1 =
C4 + C5
1
ωZ =
R3 C4
C4 + C5
=
ωP2
R1
VO = 1.2• (1+
)
R3 C4 C5
R2
Assuming the power stage ESR (equivalent series
resistance) zero is an order of magnitude higher than
the closed loop bandwidth, which is typically one tenth of
the switching frequency, the power stage control to output
transfer function with the current loop closed (Ridley
model) for the SC4520 will be as follows:
The loop gain will be given by:
s
1+
RL
R2
1
s
ωZ
T(s) = GCOMP(s) GVD(s) = 3.655 10−3
s
ωP1
s
ωP2
C4 R1 + R2
(1+
) (1+
)
4.3 RL
Where:
GVD (s) =
s
1+
1
RL
1
RL
ωp1
=
C
C
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SC4520
POWER MANAGEMENT
Application Information (Cont.)
One integrator is added at origin to increase the DC gain. 2. Start the PCB layout by placing the power components
ωZ is used to cancel the power stage pole ωP1 so that the
loop gain has –20dB/dec rate when it reaches 0dB line.
ωP2 is placed at half switching frequency to reject high
frequency switching noises. Figure 4 gives the asymptotic
first. Arrange the power circuit to achieve a clean
power flow route. Put all power connections on one
side of the PCB with wide copper filled areas if
possible.
diagrams of the power stage with current loop closed 3. The VIN bypass capacitor should be placed next to
and its loop gain.
the VIN and GND pins.
4. The trace connecting the feedback resistors to the
output should be short, direct and far away from any
noise sources such as switching node and switching
components.
5. Minimize the loop including input capacitor, the
SC4520 and freewheeling diode D2. This loop passes
high di/dt current. Make sure the trace width is wide
enough to reduce copper losses in this loop.
6. Maximize the trace width of the loop connecting the
inductor, freewheeling diode D2 and the output
capacitor.
Loop gain T(s)
Power stage
ωp1
ωC
ωP2
ωZ
7. Connect the ground of the feedback divider and the
compensation components directly to the GND pin
of the SC4520 by using a separate ground trace.
8. Connect Pin 4 to a large copper area to remove the
IC heat and increase the power capability of the
SC4520. A few feedthrough holes are required to
connect this large copper area to a ground plane to
further improve the thermal environment of the
SC4520. The traces attached to other pins should
be as wide as possible for the same purpose.
Figure 4. Asymptotic diagrams of power stage with
current loop closed and its loop gain.
The design guidelines for the SC4520 applications are
as following:
1. Set the loop gain crossover corner frequency ωC for
given switching corner frequency ωC = 2πfC
2. Place an integrator at the origin to increase DC and
low frequency gains.
3. Select ωZ such that it is placed at ωP1 to obtain a
-20dB/dec rate to go across the 0dB line.
4. Place a high frequency compensator pole
ωP2 (ωP2 = πfs) to get the maximum attenuation of
the switching ripple and high frequency noise with
the adequate phase lag at ωC.
Layout Guidelines:
In order to achieve optimal electrical and thermal
performance for high frequency converters, special
attention must be paid to the PCB layouts. The goal of
layout optimization is to identify the high di/dt loops and
minimize them. The following guidelines should be used
to ensure proper operation of the converters.
1. A ground plane is suggested to minimize switching
noises and trace losses and maximize heat
transferring.
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SC4520
POWER MANAGEMENT
Application Information (Cont.)
Design Example: 16V to 5V at 2A
D3
C1
0.22u
VIN =16V
L1
Vo=5V
2
5
8
3
6
7
IN
SW
FB
8.2uH
C3
C2
10u
4.75k
10u
R1
52.3k
SC4520
EN
R4
FSET
COMP
Rosc=0
C4
R2
10k
3.3n
C5
180p
R3
3.4k
D2
Bill of Materials
Item
1
Qty
1
Reference
Value
Part No./Manufacturer
C1
0.22uF, 25V, 0805, X7R
Vishay
2
2
C2, C3
C4
10u, 1210, X5R, 25V
Panasonic
Vishay
3
1
3.3n, 0805, X7R, 25V
4
1
C5
180pF
5
1
D1
1N4148WS, SOD-323
6
1
D2
SS33
8.2uH
52.3K
10k
Fairchild P/N: SS33
7
1
L1
COOPER P/N:DR125-8R2
8
1
R1
9
1
R2
10
1
R3
3.4k
11
12
13
1
1
1
R4
4.75k
0
Rosc
U1
SC4520
Semtech
Unless specified, all resistors have 1% precision with 0603 package.
Resistors are +/-1% and all capacitors are +/-20%
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SC4520
POWER MANAGEMENT
Outline Drawing - SOIC-8L EDP
A
D
E
DIMENSIONS
INCHES MILLIMETERS
e
N
DIM
A
MIN NOM MAX MIN NOM MAX
-
-
-
-
-
-
-
-
-
-
.053
.069 1.35
.005 0.00
.065 1.25
.020 0.31
.010 0.17
1.75
0.13
1.65
0.51
0.25
2X E/2
A1 .000
A2 .049
E1
b
c
D
.012
.007
.189 .193 .197 4.80 4.90 5.00
1
2
E1 .150 .154 .157 3.80 3.90 4.00
E
e
.236 BSC
.050 BSC
6.00 BSC
1.27 BSC
ccc C
2X N/2 TIPS
e/2
F
H
.116 .120 .130 2.95 3.05 3.30
.085 .095 .099 2.15
2.51
0.50
2.41
B
-
-
h
.010
.020 0.25
L
.016 .028 .041 0.40 0.72 1.04
D
F
(.041)
(1.05)
L1
N
8
8
aaa
C
-
-
01
0°
8°
0°
8°
A2
A
aaa
.004
.010
.008
0.10
0.25
0.20
SEATING
PLANE
bbb
ccc
C
A1
bxN
bbb
C
A-B D
h
EXPOSED PAD
h
H
H
c
GAGE
PLANE
0.25
L
(L1)
01
DETAIL A
SEE DETAIL A
SIDE VIEW
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-
DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
3.
4. REFERENCE JEDEC STD MS-012, VARIATION BA.
Land Pattern - SOIC-8L EDP
E
D
SOLDER MASK
DIMENSIONS
DIM
INCHES
MILLIMETERS
(.205)
(5.20)
C
D
E
F
Z
(C)
.134
.201
.101
.118
.050
.024
.087
.291
3.40
5.10
2.56
3.00
1.27
0.60
2.20
7.40
G
Y
F
G
P
X
Y
Z
THERMAL VIA
Ø 0.36mm
P
X
NOTES:
1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2. REFERENCE IPC-SM-782A, RLP NO. 300A.
3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
2006 Semtech Corp.
12
www.semtech.com
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