SK100EP111LF [SEMTECH]
Low Skew Clock Driver, 100E Series, 10 True Output(s), 0 Inverted Output(s), ECL, PQFP32, LQFP-32;
| 型号： | SK100EP111LF |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | Low Skew Clock Driver, 100E Series, 10 True Output(s), 0 Inverted Output(s), ECL, PQFP32, LQFP-32 时钟驱动器 逻辑集成电路 |
| 文件： | 总4页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low-Voltage 1:10 Differential
ECL/PECL/HSTL Clock Driver
SK100EP111
SE
MTECH
Today's Results...Tomorrow's Vision
Preliminary Information
October 4, 1999
This document contains information on a new product. The
parametric information, although not fully characterized, is the result
of testing initial devices.
Low-Voltage 1:10
Differential ECL/PECL/HSTL
Clock Driver
Features
•
•
•
•
•
•
•
•
100 ps Part-to-Part Skew
35 ps Output-to-Output Skew
Differential Design
32 Lead
LQFP Package
VBB Output
Low Voltage VEE Range of –2.375 to –3.8V for ECL
Low Voltage VCC Range of +2.375 to +3.8V for PECLand HSTL
75 KΩ Input Pulldown Resistors
ECL/PECL Outputs
Logic Symbol
10
CLK0
0
1
CLK0*
Q0:9
Description
CLK1
Q0*:9*
CLK1*
VBB
CLK_SEL
The SK100EP111 is a low skew 1-to-10 diffferential driver, designed
with clock distribution in mind. It accepts two clock sources into an
input multiplexer. The ECL/PECL input signals can be either
differential or single-ended if the VBB output is used. HSTL inputs
can be used when the EP111 is operating under PECL conditions.
The selected signal is fanned out to 10 identical differential outputs.
Pinout
The SK100EP111 is specifically designed, modeled, and produced
with low skew as the key goal. Optimal design and layout serve to
minimize gate-to-gate skew within a device, and characterization is
used to determine process control limits that ensure consistent tpd
distributions from lot to lot. The net result is a dependable,
guaranteed low skew device.
24 23 22 21 20 19 18 17
25
26
27
28
29
30
31
32
VCC0
Q2*
Q2
16
VCC0
15
14
13
12
11
10
9
Q7
Q7*
Q8
Q1*
Q1
SK100EP111
Q8*
Q9
Q0*
Q0
Q9*
VCC0
VCC0
1
2
3
4
5
6
7
8
To ensure that the tight skew specification is met, it is necessary
that both sides of the differential output are terminated into 50Ω,
even if only one side is being used. In most applications, all ten
differential pairs will be used and therefore terminated. In the case
where fewer than ten pairs are used, it is necessary to terminate at
least the output pairs on the same package side as the pair(s) being
used on that side in order to maintain minimum skew. Failure to do
this will result in small degradations of propagation delay (on the
order of 10–20 ps) of the output(s) being used which, while not
being catastrophic to most designs, will mean a loss of skew margin.
Pin Names
Pin
Function
CLK0, CLK0* Differential ECL/PECL Input Pair
CLK1, CKL1* Differential HSTL Input Pair
Q0:9, Q0*:9* Differential PECL Outputs
The SK100EP111, as with most other ECLdevices, can be operated
from a positive VCC supply in PECL mode. This allows the EP111
to be used for high performance clock distribution in +3.3V or +2.5V
systems. Designers can take advantage of the EP111’s performance
to distribute low skew clocks across the backplane or the board. In
a PECL environment, series or Thevenin line terminations are
typically used as they require no additional power supplies.
CLK_SEL
VBB
Active Clock Select Input
VBB Output
Function
CLK_SEL
Active Input
0
1
CLK0, CLK0*
CLK1, CLK1*
Low-Voltage 1:10 Differential
ECL/PECL/HSTL Clock Driver
SK100EP111
SE
MTECH
Today's Results...Tomorrow's Vision
ECL DC Characteristics
o
o
o
o
-40 C
0 C
25 C
85 C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
V
V
V
V
V
V
V
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Output Reference Voltage
Power Supply Voltage
Input High Current
-1.140 -1.005 -0.880 -1.080 -0.955 -0.880 -1.080
-1.830 -1.695 -1.555 -1.810 -1.705 -1.620 -1.810
-0.880 -1.080 -0.955 -0.880
-1.620 -1.810 -1.705 -1.620
OH
OL
IH
V
-1.165
-1.810
-1.38
-1.165
-0.880 -1.165
-1.475 -1.810
-0.880 -1.165
-1.475 -1.810
-0.880
-1.475
-1.26
-3.8
V
-1.475 -1.810
V
IL
-1.26
-3.8
150
-1.38
-1.26
-3.8
150
-1.38
-1.26
-3.8
150
-1.38
V
BB
EE
-2.375
-2.375
-2.375
-2.375
V
I
IH
150
µA
I
Power Supply Current
VEE = -2.375 to -3.8V
EE
80
108
80
108
80
108
80
117
mA
VEE +
1.7
VCC - VEE +
VCC - VEE +
VCC - VEE +
VCC -
0.3
V
Common Mode Range
Minimum Input Swing
V
CMR
0.3
1.7
0.3
1.7
0.3
1.7
V
PP
500
500
500
500
mV
HSTL DC Characteristics
o
o
o
o
-40 C
0 C
25 C
85 C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
V
VEE +
0.9
VCC - VEE +
1.1
VCC - VEE +
1.1
VCC - VEE +
1.1
VCC -
1.1
V
V
Common Mode Range
Minimum Input Swing
CMR
PP
0.9
0.9
0.9
500
500
500
500
mV
Low-Voltage 1:10 Differential
ECL/PECL/HSTL Clock Driver
SK100EP111
SE
MTECH
Today's Results...Tomorrow's Vision
PECL DC Characteristics
o
o
o
o
-40 C
0 C
25 C
85 C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
V
V
V
V
V
V
V
Output HIGH Voltage (Note 1)
Output LOW Voltage (Note 1)
Input HIGH Voltage (Note 1)
Input LOW Voltage (Note 1)
Output Reference Voltage (Note 1)
Power Supply Voltage
2.160 2.295 2.420 2.220
2.420 2.220
1.680 1.490
2.420 2.135
1.825 1.490
2.420 2.220 2.345 2.420
1.680 1.490 1.595 1.680
OH
OL
IH
1.470
2.135
1.490
1.92
1.750 1.490
2.420 2.135
1.825 1.490
V
2.420 2.135
1.825 1.490
2.420
1.825
2.04
3.8
V
V
IL
2.04
3.8
1.92
2.04
3.8
1.92
2.04
3.8
1.92
V
BB
EE
2.375
2.375
2.375
2.375
V
I
Input HIGH Current
150
150
150
150
µA
IH
I
Power Supply Current
VCC = +2.375 to +3.8V
EE
60
70
70
80
70
80
80
117
mA
VEE +
1.7
VCC - VEE +
VCC - VEE +
VCC - VEE +
VCC -
0.3
V
Common Mode Range
Minimum Input Swing
V
CMR
PP
0.3
1.7
0.3
1.7
0.3
1.7
V
500
500
500
500
mV
Note 1: These values are for V
= 3.3V. Level Specifications will vary 1:1 withV .
CC
CC
AC Characteristics (V = –2.375V to –3.8V; V
= V
= GND)
CC0
EE
CC
o
o
o
o
-40 C
0 C
25 C
85 C
Symbol
Characteristic
Min
Typ
Max
Min
Typ
Max
Min
375
Typ
Max
Min
Typ
Max
Unit
t
t
ECL/PECL Prop
Delay to Output
310
390
380
440
450
480
350
410
415
460
475
500
445
480
510
520
480
460
575
550
680
550
ps
ps
PLH
PHL
430
HSTL Prop
Delay to Output
340
580
415
610
485
630
380
620
450
650
510
670
410
640
480
670
545
700
520
670
615
700
720
730
ps
ps
Within-Device Skew
Part-to-Part Skew
15
30
15
30
15
30
15
30
ps
ps
t
skew
max
100
145
100
130
100
135
100
150
f
Max Input Frequency
1500
1500
1500
1500
MHz
t , t
r
Output Rise/Fall Time
200
600
200
600
200
600
200
600
ps
f
Low-Voltage 1:10 Differential
ECL/PECL/HSTL Clock Driver
SK100EP111
SE
MTECH
Today's Results...Tomorrow's Vision
Package Information
NOTES:
1.
4 X
Dimensioning and tolerancing per ANSI
Y14.5M, 1982.
A, B
0.20 (0.008) AB T–U
Z
A1,
B1
2.
3.
Controlling Dimension: Millimeter
Datum Plane –AB– is located at bottom
of lead and is coincident with the lead
where the lead exits the plastic body at
the bottom of the parting line.
32
25
1
24
–T, U, Z –
4.
5.
6.
Datums –T–, –U–, and –Z– to be
determined at Datum Plane –AB–.
Dimensions S and V to be determined at
Seating Plane –AC–.
Dimensions A and B do not include mold
protrusion. Allowable protrusion is 0.250
(0.010) per side. Dimensions A and B
do not include mold mismatch and are
determined at Datum Plane –AB–.
Dimension D does not include Dambar
protrusion. Dambar protrusion shall not
cause the D dimension to exceed
0.520 (0.020).
S, V
S1,V1
8
17
9
16
SEE DETAIL "Y"
7.
SEE DETAIL "AD"
G
–AB–
–AC–
8.
9.
Minimum solder plate thickness shall be
0.0075 (0.0003).
Exact shape of each corner may vary
from depiction.
0.10 (0.004) AC
INCHES
MIN MAX
MILLIMETERS
MIN MAX
8x M
DIM
A
˚
R
7.000 BSC
3.500 BSC
7.000 BSC
3.500 BSC
0.276 BSC
0.138 BSC
0.276 BSC
0.138 BSC
A1
B
E
C
B1
C
1.400
0.300
1.350
0.300
1.600
0.055
0.063
0.018
0.057
0.016
W
Q
H
0.250 (0.010)
GAUGE PLANE
K
D
0.450
1.450
0.400
0.012
0.053
0.012
˚
X
E
F
G
H
0.800 BSC
0.031 BSC
DETAIL AD
0.050
0.090
0.500
0.150
0.200
0.700
0.002
0.004
0.020
0.006
0.008
0.028
J
Base Metal
K
M
N
12o REF
12o REF
N
0.090
0.160
0.004
0.006
–T–, –Ü–, –Z–
P
0.400 BSC
0.016 BSC
D
Q
R
1o
5o
1o
5o
F
AE
AE
0.150
0.250
0.006
0.010
P
S
9.000 BSC
0.354 BSC
N
S1
V
4.500 BSC
9.000 BSC
4.500 BSC
0.200 REF
1.000 REF
0.177 BSC
0.354 BSC
0.177 BSC
0.008 REF
0.039 REF
0.20 (0.008)
M
AC T–U Z
V1
W
X
SECTION AE
DETAIL Y
相关型号：
SK100EP111LFT
Low Skew Clock Driver, 100E Series, 10 True Output(s), 0 Inverted Output(s), ECL, PQFP32, LQFP-32
SEMTECH
©2020 ICPDF网 联系我们和版权申明