TS33003-M033QFNR [SEMTECH]
High Efficiency Synchronous 1/2/3A DC/DC Buck Converter, 5Mhz;
| 型号： | TS33003-M033QFNR |
| 厂家： | 
SEMTECH CORPORATION |
| 描述： | High Efficiency Synchronous 1/2/3A DC/DC Buck Converter, 5Mhz |
| 文件： | 总16页 (文件大小：345K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS33001/2/3
High Efficiency Synchronous 1/2/3
A
DC/DC Buck Converter, 5Mhz
TRIUNE PRODUCTS
Features
Description
The TS33001/2/3 (1/2/3A) are DC/DC synchronous switching
•
Fixed Output option has automatic low power PFM mode
for reduced quiescen current at light loads
5MHz +/- 10% fixed switching frequency
Fixed output voltages: 0.8V, 0.9V, 1.2V, 1.5V, 1.8V
2.5V, and 3.3V with +/- 2% output tolerance
Input voltage range: 2.5V to 5.5V
Voltage mode PWM control with input voltage feed-
Forward compensation
Voltage supervisor for VOUT reported at the PG pin
Input supply under voltage lockout
t
r
egula ors with fully integrated power switches internal
t
,
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
compensation, and full fault protection. The switching
frequency of 5MHz enables the use of extremely small filter
,
components, resulting in smaller board space and reduced
BOM costs
.
When the input current is greater than approximately 50mA,
the TS33001/2/3 utilizes PWM voltage mode feedback with input
voltage feed-forward to provide a wide input voltage range
S
of
Full protection for
and VOUT overvoltage
Less than 200nA in shutdown mode
Multiple enable pins for flexible system sequencing
Low ernal component count
t
star
t
for controlled startup with no overshoot
ov
er-cur en er-temper tur
r
t
,
ov
a
e,
without the need for external compensation.
When the input current is less than 50mA, the device uses
PFM mode to provide increasedefficiency at light loads
cross over between PFM mode and PWM is automatic and
has hysteresis to prevent oscillation between the modes
dditionally the nLP mode pin can be used to force the device
into PWM mode to reduce the output ripple if needed
a
ext
.
The
Junction operating temperature -40C to 125C
Packaged in a 16 pin QFN (3x3)
.
A
,
Applications
,
.
•
•
•
•
•
Point of load
Systems with deep submicron ASICs/FPGA
s
The TS33001/2/3 in
including input supply under-voltage lockout
voltage output er-voltage soft star
FET current limits
t
eg
rat
es a wide range of protection circuitr
y;
S
et-top box
,
output under-
Communications equipment
Portable and handheld equipment
,
ov
,
t, high side FET and low side
,
and thermal shutdown.
Typical Applications
Fixed Output
1µH
VOUT
10uF
VCC
VSW
VCC
VOUT
Sense
22uF
FB
VCC or VOUT
10 kohm
(optional)
nLP
EN
nLP
EN
PG
PG
TS33001/2/3
Final Datasheet Rev 1.6
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ech.com
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t
Proprietary &
Pinout
VSW
VCC
VSW
VCC
VCC
GND
TS33001/2/3
TEST
OUT
EN
Pin Description
Pin
1
#
Pin Name
Pin Function
Description
VSW
S
witching Voltage Node
C
onnec
Input voltage supply
Input voltage supply
t to 1.5uH inductor. Short to Pins 12, 14, & 15
2
V
CC
CC
Input
Input
V
oltage
.
Shor
Shor
t
to Pins
to Pins
3
2
&
&
11
11
3
V
Voltage
.
t
4
5
GND
FB
GND
Ground for the internal circuitry of the device
Feedback voltage for the regulator when used in adjustable mode
onnec to the output voltage resistor divider for adjustable mode
and No Connection for fixed output modes
.
Feedback
I
nput
C
t
Output Voltage Sense. equires kelvin connection to 4.7uF
output capacitor
Forcing this pin high prevents the device from going into Low
PFM mode oper tion
Power Good indicator Open-drain output
Input high voltage enables the devic Input low disables the device.
R
6
7
VOUT
S
ense
Output Voltage
nLP nput
Sense
Power
nLP
I
a
8
9
PG
EN
PG Output
Enable nput
.
I
e.
10
11
TEST OUT
Test Mode Output
Input oltage
Connect to GND. For internal testing use only.
V
CC
V
Input voltage supply
onnec to induc or
GND supply for internal low-side FET/in
.
Shor
Shor to Pins 1, 14, & 15
eg ed diode Short to Pin 16
t to Pins 2 & 3
12
13
14
15
VSW
PGND
VSW
S
witching Voltage Node
C
t
1
µ
H
t
.
t
Power GND
t
rat
.
S
witching Voltage Node
witching Voltage Node
C
onnec
onnec
t
t
to
to
1
1
µ
µ
H
H
induc
induc
t
t
or
.
Shor
Shor
t
t
to Pins 1, 12, & 15
to Pins 1, 12, & 14
VSW
S
C
or.
GND supply for internal low-side FET/in
t
egrat
ed diode
.
16
PGND
Power GND
Shor to Pin 13
t
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Proprietary &
C
Functional Block Diagram
PG
nLP
EN
VCC
MONITOR
&
Under Voltage
Protection
CONTROL
Thermal
Protection
Oscillator
VCC
Over Current
Protection
Ramp
Generator
Vref
&
Softstart
Gate
Drive
VSW
1uH
VOUT
Gate Drive
Control
10µF
Comparator
Gate
Drive
Error Amp
PGND
RTOP
Compensation
Network
(Adjustable)
RBOT
(Adjustable)
Vout
Sense
FB
GND
(Adjustable)
(Adjustable)
Figure 1: TS33001/2/3 Block Diagram for fixed and adjustable mode devices
TS33001/2/3
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Proprietary &
Absolute Maximum Rating
2)
Over operating free–air temperature range unless otherwise noted(1,
Parameter
Value
-0.3 to 6.0
-1 to 6.0
Unit
V
V
CC
VSW
V
EN, PG,FB, nLP, TEST OUT, VOUT
S
ense
-0.3 to
±2k
6
V
Electrostatic Discharge – Human Body Model
Electrostatic Discharge – Charge Device Model
V
±500
260
V
Lead Temperature (soldering
,
10 seconds)
°C
Notes:
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating con-
ditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
Thermal Characteristics
S
ymbol
θJA
Note 1: Assumes QFN16 1 in2 area of 2 oz copper and 25°C ambient temperature.
P
arameter
Value
Unit
Thermal Resistance Junction to Air (Note 1)
50
°C/W
Recommended Operating Conditions
S
ymbol
P
arameter
Input Operating oltage
orage Temperature ange
Maximum Junction emper tur
Operating Junction Temperature
Min
2.375
-65
Typ
Max
5.5
Unit
V
V
CC
V
5
TS
TJ
TJ
St
R
150
150
125
°C
TG
T
a
e
°C
MAX
R
ange
-40
0
°C
LOUT
COUT
COUT
Output Filter Inductor Typical Value (Note 1,3)
Output Filter Capacitor Typical Value (Note 2,3)
Output Filter Capacitor ESR
1
10
5
µH
µF
mΩ
µF
20
-ESR
CBY
Input Supply Bypass Capacitor Typical Value (Note 2)
22
PASS
Note 1: For best performance, an inductor with a saturation current rating higher than the maximum Vout load requirement plus the inductor
current ripple. See the inductor current ripple calculations in inductor calculations sections.
Note 2: For best performance, a low ESR ceramic capacitor should be used – X7R or X5R types should be used. Y5V should be avoided.
Note 3: Min and max listed are to account for +/-20% variation of the typical value. Typical values of 10uF and 0.47uH are recommended.
TS33001/2/3
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Proprietary &
C
haracteristics
Electrical charac
t
eristics
,
TJ
=
-40C to 125C, VCC
= 5V (unless otherwise noted)
Symbol
Parameter
Condition
Min
Typ
Max
Unit
VCC Supply Voltage
V
CC
Input Supply
uiescen cur
Normal Mode
uiescen current Low
PFM Mode
uiescen cur
Shutdown
V
oltage
2.375
5.5
V
Q
t
rent
ICC-NORM
ICC-LPM
VCC
VCC
=
=
5V, ILOAD
5V, ILOAD
VCC
=
=
0A, EN=5V, nLP=5V
18
mA
Q
t
Power
0A, EN=5V, nLP=0V
5V, EN=0V
150
µA
µA
Q
t
ren
t
ICC-SHUTDOWN
=
0.2
M
od
VCC Under Voltage
Lo
ckout
Input Supply Under
hreshold
Input Supply Under
Threshold steresis
Voltage
V
CC-UV
VCC Increasing
2.2
V
T
Voltage
VCC-UV_H
200
mV
YST
H
y
OSC
FOSC
Oscilla
t
or Frequency
4.5
5
5.5
MHz
PG Open Drain Output
TPG
PG Release
T
imer
High-Level Output Leakage
Low-Level Output oltage
EN/nLP Input Voltage Thresholds
10
ms
µA
V
IOH-PG
VPG=5V VCC=5V
IPG -0.3mA
0.1
VOL-PG
V
=
0.01
0.4
VIH-EN/nLP
High Level Input
Low Level Input
Voltage
VCC=2V to 5V
VCC=2V to 5V
2.2
V
V
VIL
Voltage
-EN/nLP
VH
Input Hysteresis
EN Input Leakage
VCC=2V to 5V
VEN=5V VCC=5V
VEN=0V VCC=5V
400
0.2
mV
µA
µA
KΩ
Y
ST-EN/nLP
IIN-EN
0.2
65
nLPPD
nLP
Pulldown
Resistor
Pulldown to GND
Thermal Shutdown
Thermal Shutdown Junction
emper tur
TS
D
150
170
10
190
C
C
T
a
e
TSDH
TSD Hysteresis
YS
T
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Proprietary &
Regulator Characteristics
Electrical charac
t
eristics
,
TJ
=
-40C to 125C, VCC
arameter
Switch Mode Regulator: L=470nH and C=10uF
= 5V (unless otherwise noted)
Symbol
P
Condition
Min
Typ
Max
Unit
VOUT
+
VOUT
2%
–
VOUT
VOUT-PWM
RDSON
IOUT
Output Voltage Tolerance in Mode
V
2%
High Side
Low Side
S
witch On
R
esistanc
e
IVSW
=
-1A (Note 1)
110
75
mΩ
mΩ
Switch On
Resistanc
e
IVSW = 1A (Note 1)
T
T
S33001
S33002
1
2
3
Output Current
A
A
TS33003
T
T
S33001
S33002
1.7
2.7
3.7
IOCDHS
Over
Over
C
urren
t
D
etec
t
HS
LS
TS33003
T
T
S33001
S33002
1.7
2.7
3.7
IOCDLS
C
urren
t
D
etec
t
A
TS33003
VCC
=
2.5V to 5V,
VOUT
Output Line
R
egulation
-10
10
mV
V
-LINE
VOUT
=
1.8V, ILOAD = 1A
ILOAD
VCC
=
=
10mA to 2A,
5V, VOUT = 1.8V
VOUT
0.5%
-
VOUT
0.6
VOUT +
0.5%
VOUT-LO
Output Load
Feedback
Regulation
AD
FBTH
R
eferenc
eferenc oleranc
urren
ime
hreshold
VOUT Power Good Hysteresis
VOUT Over Voltage hreshold
VOUT Over Voltage Hysteresis
e
FB
S
witch oin
P
t
V
FBTH-
Feedback
R
e
T
e
-1.5
1.5
%
TOL
IFB
Feedback Input
C
t
100nA
500
nA
uS
TSS
Softstar
t Ramp T
VOUT
VOUT Power Good
T
85% VOUT
2% VOUT
106% VOUT
2% VOUT
-PG
VOUT-PG_H
YST
VOUT
T
-
OV
VOUT
-
OV_HYST
Note 1: R
is characterized at 1A and tested at lower current in production.
DSON
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Proprietary &
Functional Description
Switching output, VSW
This voltage-mode
down power supply product can be used in the
industrial and automotive market segments It includes
flexibility to be used for wide range of output voltages and
is optimized for high efficiency power conversion with low
RDSON integrated synchronous switches A 5MHz internal
switching frequency facilita es low cost LC filter combinations
and improved transient esponse dditionally the fixed
output version, with integrated Power on Reset and ault
circuitry enables a minimal ernal component count
provide a complete power supply solution for a variety of
applications
Poin
t
of Load (POL) synchronous step-
This is the switching node of the
r
egula
t
or
.
It should be
wide short
It is switching between VCC and PGND at the switching
frequenc
c
onsumer
,
connec
t
ed directly to the
1
uH inductor with
a
,
,
.
trace.
a
y.
.
Ground, GND
t
This ground is used for the majorityof the device including the
r
.
A
,
analog reference, control loop, and other circuits.
F
e
x
t
to
Power Ground, PGND
This is a separ ground connection used for the low side
synchronous FET to isola switching noise from the rest of the
devic
ate
.
t
e
e.
Detailed Pin Description
Unregulated input, VCC
Enable, EN
This is an input terminal to activ
enable the internal eferenc oscilla
the fault detection circuitry to work
EN needs to low for the part to exhibit less than 200nA
quiescen cur en The input threshold is TTL/CMOS
compatible
This terminal is the unregulated input voltage source for the IC.
It is recommended that a 22uF bypass capacitor be placed
at
e
the entire devic
or and allow
orrectly Notice that the
e. This will
r
e,
t , TSD, etc,
close as possible to the VCC pins for best performance. Since
c
.
this is the main supply for the IC, good layout practices need
be followed for this connection.
to
t
r t.
.
Feedback, FB
This is the voltage feedback input terminal for the adjustable
version. For the fixed mode versions this pin should be lef
floating and not onnec ed
Theconnection on the PCB should be kept as short as
possible from the feedback esistors kept away from the VSW
connections or other switching/high frequency nodes and
should not be shared with any other connection. This should
minimize stray oupling reduce noise injection, and minimize
voltage shift cause by output load
Power Good Output, PG
,
t
This is an open drain, active high output. The switched mode
c
t
.
output voltage is monitored and the PG line will remain
r
,
low until the output voltage reaches the VOUT-UV threshold
approximately 85% of the final regulation output Once the
internal comparator detects the output voltage is above the
desired threshold an internal 10mSec delay timer is activated
and the PG line is de-asser ed to high when this delay timer
xpires In the even the output voltage decreases below VOUT
the PG line will beasser
,
,
.
c
,
,
.
t
e
.
t
To choose the resistors for the adjustable version, use the
following equation:
-
,
t
ed low immediately and remain lo
until the output rises above VOUT-UV and the delay timer times
out again. If EN is pulled low the VCC input undervoltage
trips or Thermal Shutdown is eached the PG pin will
immediately be pulled low
w
UV
VOUT
For stabilit
Output Voltage Sense,
This is the input terminal for the voltage output feedback and
is needed for both adjustable and fixed voltage versions his
should be onnec ed to the main output capacitor and the
same good layout practices should be followed as for the FB
connection. Keep this line as short as possible keep it away
from the VSW and other switching or high frequency traces
and do not share this connection with any other connection
on the PCB
= 0.6 (1 + RTOP/RB )
OT
,
y,
RTOP should be 270K Ohms to 330K Ohms
.
,
r
,
VOUT Sense
.
.
T
nLow Power Mode Output, nLP
This is an input to force the PWM mode when light load is
on the output The PFM low power mode has higher
output voltage ripple which is some applications may be
unac eptable If low ripple is needed on the output this
pin can be tied to VCC input or switched above 2.2V during
operation to force the device into normal PWM mode
c
t
,
.
,
,
,
c
.
,
.
.
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Internal Protection Details
Internal Current Limit
C
urren
High side current limit will shor
tri-state the high side dditionally,
t
limit is always active when the regulator is enabled
en the high side on time and
low side current limit will
.
t
.
A
protect the low side FET and turn off the switch if current limit
is sensed on the low side switch. Since the output is fully
synchronous, the current limit is protected on the low side in
both the positive and negative direction.
Soft
of
startup and minimize overshoot at startup
time is 3ms These values do not change with output voltage
current limit settings or adjustable/fixed mode he soft star
is re-triggered with the any rising edge that enables the
egula or including the EN input pins thermal shutdown, VCC
Undervoltage ycle
S
tar
t
S
t
star
t
ensures current limit does not prevent regulator
The typical startup
.
.
,
,
.
T
t
r
t
,
,
,
or a VCC Power
c
.
Thermal
If the temperature of the die exceeds 170C, the VSW outputs
will tri-state to protect the device from damage The PG and all
other protection circuitry will stay active to inform the system
Shutdown
.
of the failure mode
.
Once the device cools to 160C, the device
up again, following the normal soft start
will attempt to star
t
sequence with 10ms delay on PG. If the device reaches 170C,
the shutdown/restart sequence will repeat.
Output Overvoltage
If the output of the regulator exceeds 106% of the regulation
voltage the VSW outputs will tri-state to protect the device
from damage This check occurs at the star of each switching
ycle If it occurs during the middle of ycle the switching
for that cycle will omplet and the VSW outputs will tri-state
at the beginning of the next ycle
,
.
t
c
.
a
c
,
c
e,
c
.
VCC Under-Voltage
The device is held in the off sta
is a 200mV hysteresis on this input
fall below 2V before the device will disable
Lockout
t
e
until VCC reaches 2.2V.
There
,
which requires the input to
.
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Proprietary &
Typical Performance Characteristics
TJ
= -40C to 125C, VCC = 4V (unless otherwise noted)
Enable
VOUT
Fig.1 Startup Response
Fig.2 10mA to 1A Load Step (VCC=4V, VOUT=3.3V)
Fig.3 10mA to 1A Load Step (VCC=4V, VOUT=0.8V
)
Fig.4 100mA to 2A Load Step (VCC=4V, VOUT=0.8V
)
Fig.5 100mA to 2A Load Step (VCC=4V, VOUT=1.8V
)
Fig.6 Line Transient Response (VCC=4, VOUT=0.8V
)
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Proprietary &
External Component Selection
The internal compensation is optimized for a 10uF output capacitor and a 1uH induc
tor. To keep the output ripple low, a low
ESR (less than 20mOhm) ceramic is ecommended For optimal over-current protection, inductor should be able to handle the
r
.
3.7A for the 3A version, 2.7A for the 2A version and 1.7A for the 1A version without saturation.
Application Using A Multi-Layer PCB
To maximize the efficiency of this package for application on a single layer or multi-layer PCB, certain guidelines must be followed
when laying out this part on the PCB
.
The following are guidelines for mounting the exposed pad IC on
a Multi-Layer PCB with ground a plane.
Solder Pad (Land Pattern)
Package Thermal Pad
Thermal Via's
Package Outline
Package and PCB Land Configuration
For a Multi-Layer PCB
JEDEC standard FR4 PCB Cross-section:
Package Solder Pad
(square)
Component Traces
1.5038 - 1.5748 mm
Component Trace
(2oz Cu)
2 Plane
1.0142 - 1.0502 mm
Ground Plane (1oz
Cu)
1.5748mm
Thermal Via
4
Plane
0.5246 - 0.5606 mm
Power Plane (1oz
Cu)
Thermal Isolation
Power plane only
0.0 - 0.071 mm Board Base
& Bottom Pad
Package Solder Pad
(bottom trace)
Multi-Layer Board (Cross-sectional View)
In a multi-layer board application, the thermal vias are the primary method of hea
t
transfer from the package thermal pad
to
the internal ground plane The efficiency of this method depends on several fac ors
.
t
,
including die area, number of thermal vias,
thickness of copper, etc.
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Proprietary &
Mold compound
Die
Epoxy Die attach
Exposed pad
Solder
5% - 10% Cu coverage
Single Layer, 2oz Cu
Thermal Vias with Cu plating
90% Cu coverage
Ground Layer, 1oz Cu
Signal Layer, 1oz Cu
Bottom Layer, 2oz Cu
20% Cu coverage
Note: NOT to Scale
The above drawing is a representation of how the hea
t
can be conducted away from the die using an exposed pad package
.
Each
the
tures above
ted worst case power dissipation and the thermal management implementation in
application will have different requirements and limitations and therefore the user should use sufficient copper to dissipa
power in the system. The output current rating for the linear egula ors may have to be de-r ed for ambient emper
85C. The de-r value will depend on calcula
te
r
t
at
t
a
at
e
the application.
Application Using A Single Layer PCB
Use as much Copper Area
as possible for heat spread
Package Thermal Pad
Package Outline
Layout recommendations for a Single Layer PCB: utilize as much Copper Area for Power
application the thermal pad is attached to hea spreader (copper areas) by using low thermal impedance attachment method
(solder paste or thermal conductive epoxy).
Management. In a single layer board
a
t
In both of the methods mentioned above it is advisable to use as much copper traces as possible to dissipate the heat.
IMPORTANT
:
If the attachment method is NOT implemented
correctly, the functionality of the product is not guaranteed. Power dissipation
capability will beadversely affec
t
ed if the device is incorrectly mounted onto the circuit board.
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Proprietary &
Package Mechanical Drawings (all dimensions in mm)
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Number of
itch
Overall Height
tandoff
ontac
P
ins
N
e
16
P
0.50 BSC
0.90
A
0.80
0.00
1.00
0.05
S
A1
A3
D
0.02
C
t
T
hickness
0.20 REF
3.00 BSC
1.70
Overall Length
Exposed Pad Width
Overall Width
E2
E
1.55
1.80
3.00 BSC
1.70
Exposed Pad Length
D2
b
1.55
0.20
0.20
0.20
1.80
0.30
0.40
-
Contac
Contac
Contac
t
t
t
Width
0.25
Length
L
0.30
-t
o
-Exposed
Pad
K
-
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Proprietary &
Recommeded PCB Land Pattern
DIMENSIONS IN MILLIMETERS
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Contac
t
Pitch
E
0.50 BSC
Optional
Optional
C
en
t
er Pad Width
er Pad Length
W2
T2
C1
C2
X1
Y1
G
-
-
1.70
1.70
-
Cen
t
-
-
Contac
Contac
Contac
Contac
t
t
t
t
Pad Spacing
-
3.00
Pad Spacing
-
3.00
-
Pad Width (X8)
Pad Length (X8)
-
-
-
-
-
0.35
0.65
-
Distance Between
Pads
0.15
Notes:
Dimensions and tolerances per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact values shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information only.
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Proprietary &
Ordering Information
Part Number
Description
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
S33001-M008QFNR
S33001-M009QFNR
S33001-M012QFNR
S33001-M015QFNR
S33001-M018QFNR
S33001-M025QFNR
S33001-M033QFNR
S33001-M000QFNR
S33002-M008QFNR
S33002-M009QFNR
S33002-M012QFNR
S33002-M015QFNR
S33002-M018QFNR
S33002-M025QFNR
S33002-M033QFNR
S33002-M000QFNR
S33003-M008QFNR
S33003-M009QFNR
S33003-M012QFNR
S33003-M015QFNR
S33003-M018QFNR
S33003-M025QFNR
S33003-M033QFNR
S33003-M000QFNR
5MHz Sync Buck, 1A - 0.8V
5MHz Sync Buck, 1A - 0.9V
5MHz Sync Buck, 1A - 1.2V
5MHz Sync Buck, 1A - 1.5V
5MHz Sync Buck, 1A - 1.8V
5MHz Sync Buck, 1A - 2.5V
5MHz Sync Buck, 1A - 3.3V
5MHz Sync Buck, 1A – Adjustable Voltage
5MHz Sync Buck, 2A - 0.8V
5MHz Sync Buck, 2A - 0.9V
5MHz Sync Buck, 2A - 1.2V
5MHz Sync Buck, 2A - 1.5V
5MHz Sync Buck, 2A - 1.8V
5MHz Sync Buck, 2A - 2.5V
5MHz Sync Buck, 2A - 3.3V
5MHz Sync Buck, 2A – Adjustable Voltage
5MHz Sync Buck, 3A - 0.8V
5MHz Sync Buck, 3A - 0.9V
5MHz Sync Buck, 3A - 1.2V
5MHz Sync Buck, 3A - 1.5V
5MHz Sync Buck, 3A - 1.8V
5MHz Sync Buck, 3A - 2.5V
5MHz Sync Buck, 3A - 3.3V
5MHz Sync Buck, 3A – Adjustable Voltage
TS33001/2/3
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RoHS and Reach Compliance
Triune
All Triune
with RoHS (European Union Directive 2011/65/EU), REACH
SVHC Chemical estrictions (EC 1907/2006), IPC-1752 Level
ma erials declar tions and their subsequen amendments
Triune ystems maintains certified laboratory reports for
all product ma erials from all suppliers which show full
compliance to restrictions on the following:
S
ystems is fully committed to environmental qualit
y.
S
ystems ma erials and suppliers are fully compliant
t
R
3
t
a
,
t
.
S
t
,
,
•
•
•
•
•
•
•
•
•
•
•
•
Cadmium
Chlorofluorocarbons
Chlorina Hydrocarbons
Halons (Halogen free)
Hexa alen Chromium (CrVI)
Hydrobromofluorocarbons (HBFCs)
Hydrochlorofluorocarbons (HCFCs)
Lead (Pb)
(Cd)
(
CFCs)
t
e
(CHCs)
v
t
Mercury (Hg)
Perfluorocarbons (PFCs)
P
olybromina
t
ed biphenyls (PBB)
ed Diphenyl thers (PBDEs)
Polybromina
t
E
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Proprietary &
IMPORTANT NOTICE
Information relating to this product and the application or design described herein is believed to be reliable, however such information is provided as
a
guide only and Semtech assumes no liability for any errors in this document, or for the application or design described herein. Semtech reserves the right
to make changes to the product or this document at any time without notice. Buyers should obtain the latest relevant information before placing orders
and should verify that such information is current and complete. Semtech warrants performance of its products to the specifications applicable at the time
of sale, and all sales are made inaccordance with Semtech’s standard terms and conditions of sale.
SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES
OR SYSTEMS, OR IN NUCLEAR APPLICATIONS IN WHICH THE FAILURE COULD BE REASONABLY EXPECTED TO RESULT IN PERSONAL INJURY, LOSS OF LIFE
OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN
SOLELY AT THE CUSTOMER’S OWN RISK. Should
a customer purchase or use Semtech products for any such unauthorized application, the customer shall
indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney
fees which could arise.
The Semtech name and logo are registered trademarks of the Semtech Corporation. Triune Systems, L.L.C. is now
a wholly-owned subsidiary of Semtech
Corporation. The Triune Systems® name and logo, MPPT-lite™, and nanoSmart® are trademarks of Triune Systems, LLC. in the U.S.A. All other trademarks
and trade names mentioned may be marks and names of Semtech or their respective companies. Semtech reserves the right to make changes to, or
discontinue any products described in this document without further notice. Semtech makes no warranty, representation or guarantee, express or
implied, regarding the suitability of its products for any particular purpose. All rights reserved.
© Semtech 2015
Contact Information
Semtech Corporation
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111, Fax: (805) 498-3804
www.semtech.com
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Proprietary &
相关型号：
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