SGM61432 [SGMICRO]
40V/3.5A, Adjustable Switching Frequency Buck Converter with 38μA IQ;
| 型号： | SGM61432 |
| 厂家： | 
Shengbang Microelectronics Co, Ltd |
| 描述： | 40V/3.5A, Adjustable Switching Frequency Buck Converter with 38μA IQ |
| 文件： | 总20页 (文件大小：1580K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SGM61432
40V/3.5A, Adjustable Switching Frequency
Buck Converter with 38μA IQ
GENERAL DESCRIPTION
FEATURES
The SGM61432 is a current mode controlled non-
synchronous Buck converter with 4V to 40V input range
and 3.5A continuous output current. A low RDSON
N-MOSFET is integrated as high-side switch. Moreover,
the low 38μA quiescent current and low shutdown current
of only 1.3μA (TYP) make it a suitable choice for
battery-powered applications. Also, the internal loop
compensation simplifies compensation network design
and saves user design time and cost. The UVLO level
can be adjusted (increased) by an external resistor
divider. Switching frequency can be selected over a
wide range (200kHz to 2500kHz) to allow desired tradeoff
among efficiency, component sizes and conversion
voltage ratio. Protection against over-voltage transient is
provided to limit the startup or other transient
overshoots. Secure operation in overload conditions is
ensured by cycle-by-cycle current limit, frequency
fold-back and thermal shutdown protection.
● 4V to 40V Input Voltage Range
● 0.8V to 28V Adjustable Output Voltage Range
● Peak Current Mode Control
● Integrated 93mΩ High-side MOSFET Supports up
to 3.5A Continuous Output Current
● Adjustable Switching Frequency from 200kHz to
2500kHz
● Ultra-Low Quiescent Current: 38μA (TYP)
● Low Shutdown Current: 1.3μA (TYP)
● Power-Save Mode for High Light Load Efficiency
● External Soft-Start
● Frequency Synchronization to External Clock
● Programmable UVLO Threshold
● Output Over-Voltage Protection
● Cycle-by-Cycle Current Limit
● Frequency Fold-Back Protection
● Thermal Shutdown Protection
● Available in a Green SOIC-8 (Exposed Pad)
Package
The SGM61432 is available in a Green SOIC-8
(Exposed Pad) package.
APPLICATIONS
Automotive Battery Regulation
Industrial Power Supplies
Telecom and Datacom Systems
Battery Powered System
TYPICAL APPLICATION
VIN
VIN
EN
BOOT
SW
CBOOT
CIN
L
VOUT
SGM61432
COUT
D
ROUT1
SS
GND
FB
RT/CLK
CSS
Exposed Pad
RT
ROUT2
Figure 1. Typical Application Circuit
SG Micro Corp
www.sg-micro.com
MAY 2023 – REV.A.2
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
PACKAGE/ORDERING INFORMATION
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
DESCRIPTION
ORDERING
NUMBER
PACKAGE
MARKING
PACKING
OPTION
MODEL
SGM
61432XPS8
XXXXX
SGM61432 SOIC-8 (Exposed Pad)
SGM61432XPS8G/TR
Tape and Reel, 4000
-40℃ to +125℃
MARKING INFORMATION
NOTE: XXXXX = Date Code, Trace Code and Vendor Code.
X X X X X
Vendor Code
Trace Code
Date Code - Year
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
OVERSTRESS CAUTION
ABSOLUTE MAXIMUM RATINGS
Input Voltages
Stresses beyond those listed in Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods
may affect reliability. Functional operation of the device at any
conditions beyond those indicated in the Recommended
Operating Conditions section is not implied.
VIN, EN to GND.............................................. -0.3V to 44V
BOOT to GND................................................. -0.3V to 50V
SS to GND ........................................................ -0.3V to 5V
FB to GND ........................................................ -0.3V to 6V
RT/CLK to GND ............................................. -0.3V to 3.6V
Output Voltages
ESD SENSITIVITY CAUTION
BOOT to SW ........................................................6V (MAX)
SW to GND ..................................................... -0.6V to 44V
SW to GND (10ns Transient).......................... -3.5V to 44V
Package Thermal Resistance
This integrated circuit can be damaged by ESD if you don’t
pay attention to ESD protection. SGMICRO recommends that
all integrated circuits be handled with appropriate precautions.
Failureto observe proper handlingand installation procedures
can cause damage. ESD damage can range from subtle
performance degradation tocomplete device failure. Precision
integrated circuits may be more susceptible to damage
because very small parametric changes could cause the
device not to meet its published specifications.
SOIC-8 (Exposed Pad), θJA..................................... 41℃/W
Junction Temperature.................................................+150℃
Storage Temperature Range.......................-65℃ to +150℃
Lead Temperature (Soldering, 10s)............................+260℃
ESD Susceptibility
HBM.............................................................................2000V
CDM ............................................................................1000V
DISCLAIMER
SG Micro Corp reserves the right to make any change in
RECOMMENDED OPERATING CONDITIONS
Input Voltage Range...............................................4V to 40V
Output Voltage Range .........................................0.8V to 28V
Switching Frequency Range at RT Mode
circuit design, or specifications without prior notice.
................................................................ 200kHz to 2500kHz
Switching Frequency Range at SYNC Mode
................................................................ 250kHz to 2300kHz
Operating Junction Temperature Range......-40℃ to +125℃
SG Micro Corp
www.sg-micro.com
MAY 2023
2
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
PIN CONFIGURATION
(TOP VIEW)
BOOT
VIN
1
2
3
4
8
7
6
5
SW
GND
SS
GND
EN
RT/CLK
FB
SOIC-8 (Exposed Pad)
PIN DESCRIPTION
PIN
NAME
I/O
FUNCTION
Bootstrap Input (for N-MOSFET Gate Driver Supply Voltage). Connect this pin to SW pin with a
0.1μF ceramic capacitor. The MOSFET will turn off if the BOOT capacitor voltage drops below its
BOOT-UVLO level to get the capacitor voltage refreshed.
1
BOOT
O
Supply Input. Connect VIN to a power source with 4V to 40V output voltage range. Decouple VIN
to GND as close as possible to the catch diode anode and the device with a high frequency, low
ESR ceramic capacitor (X5R or higher grade is recommended).
2
VIN
P
Active High Enable Input. Float or pull up to VIN to enable, or pull down below 1.11V to disable
the device. Input UVLO level can be programmed using a resistor divider from VIN.
3
4
EN
RT/CLK
FB
I
I
Resistor Timing and External Clock. Frequency is set by the external RT resistor or external
SYNC clock, refer to Synchronization to RT/CLK Pin for more details.
Feedback Pin for Setting the Output Voltage. The SGM61432 regulates the FB pin to 0.75V.
Connect a feedback resistor divider tap to this pin.
5
I
Soft-Start Control Pin. Connect an external capacitor (CSS) between this pin and the GND to set
the soft-start time.
6
SS
O
G
P
G
7
GND
SW
Ground Pin.
Switching Node of the Converter (Source of the Internal MOSFET). Connect it to the cathode of
the external power diode (catch diode), the bootstrap capacitor and the inductor.
8
Exposed
Pad
Exposed Pad. It helps cooling the device junction and must be connected to GND pin for proper
operation.
—
NOTE: I = input, O = output, G = ground, P = power.
SG Micro Corp
www.sg-micro.com
MAY 2023
3
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
ELECTRICAL CHARACTERISTICS
(TJ = -40℃ to +125℃, VIN = 4V to 40V, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Power Supply (VIN Pin)
Operation Input Voltage
VIN
VUVLO
VUVLO_HYS
ISHDN
4
40
4
V
V
Under-Voltage Lockout Threshold
Under-Voltage Lockout Threshold Hysteresis
Shutdown Supply Current
Quiescent Current
Rising threshold
3.68
3.85
255
1.3
38
mV
μA
μA
3.8
TJ = +25℃, 4.0V ≤ VIN ≤ 40V, VEN = 0V
TJ = +25℃, VIN = 12V, VFB = 1V
IQ
Enable (EN Pin)
VENH
VENL
VEN rising
VEN falling
1.19
1.11
80
1.27
V
EN Threshold Voltage
1.05
VEN_HYS Hysteresis
Enable threshold +50mV
mV
μA
μA
-4.4
-1.0
-3.4
EN Input Current
IEN_PIN
Enable threshold -50mV
EN Hysteresis Current
External Soft-Start
SS Pin Current
IEN_HYS
ISS
3
μA
TJ = +25℃
Voltage Reference (FB Pin)
0.745
0.739
0.75
0.75
0.765
0.769
TJ = +25℃
Feedback Voltage
VFB
V
TJ = -40℃ to +125℃
High-side MOSFET
On-Resistance
RDSON
VIN = 12V, VBOOT to VSW = 5V
93
150
5.8
mΩ
High-side MOSFET Current Limit
Current Limit
ILIMT
4.4
5.1
A
TJ = +25℃, VIN = 12V, close-loop
Thermal Performance
Thermal Shutdown Threshold
Hysteresis
TSHDN
THYS
175
20
℃
℃
Switching Characteristics
Switching Frequency
fSW
RT = 49.9kΩ, 1% accuracy
470
1.7
500
30
530
0.7
kHz
V
SYNC Clock High Level Threshold
SYNC Clock Low Level Threshold
VSYNC_HI
VSYNC_LO
V
Measured at 500kHz, VSYNC_HI > 3V,
VSYNC_LO < 0.3V
Minimum SYNC Input Pulse Width
TSYNC_MIN
ns
PLL Lock in Time
tLOCK_IN
tON_MIN
DMAX
Measured at 500kHz
100
85
µs
ns
%
Minimum Controllable on Time
Maximum Duty Cycle
fSW = 200kHz
97
SG Micro Corp
www.sg-micro.com
MAY 2023
4
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
TYPICAL PERFORMANCE CHARACTERISTICS
TA = +25℃, VIN = 12V, VOUT = 5V, fSW = 500kHz, L = 6.8μH and COUT = 47μF × 2, unless otherwise noted.
Current Limit vs. Temperature
Efficiency Curve at 5V Output
6.0
5.5
5.0
4.5
4.0
100
80
60
40
20
0
— VIN = 6V
— VIN = 12V
— VIN = 24V
— VIN = 40V
0.001
0.01
0.1
1
10
-50 -25
0
25
50
75 100 125 150
Temperature (℃)
Output Current (A)
FSW vs. RTCLK Resistance
Load Regulation at 5V Output
2500
2000
1500
1000
500
0.5
0.3
0.1
-0.1
-0.3
-0.5
— VIN = 6V
— VIN = 12V
— VIN = 24V
— VIN = 40V
0
0
20
40
60
80
100 120 140
0
0.5
1
1.5
2
2.5
3
3.5
RT/CLK Resistence (kΩ)
Output Current (A)
UVLO Hysteresis vs. Junction Temperature
UVLO Rising vs. Junction Temperature
300
280
260
240
220
200
180
160
4.0
3.9
3.8
3.7
3.6
-50 -25
0
25
50
75 100 125 150
-50 -25
0
25
50
75 100 125 150
Temperature (℃)
Temperature (℃)
SG Micro Corp
www.sg-micro.com
MAY 2023
5
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
TA = +25℃, VIN = 12V, VOUT = 5V, fSW = 500kHz, L = 6.8μH and COUT = 47μF × 2, unless otherwise noted.
Quiescent Current vs. Input Voltage
Quiescent Current vs. Junction Temperature
80
60
40
20
0
80
60
40
20
0
0
5
10 15 20 25 30 35 40 45
Input Voltage (V)
-50 -25
0
25
50
75 100 125 150
Temperature (℃)
Shutdown Current vs. Input Voltage
Shutdown Current vs. Junction Temperature
5
4
3
2
1
0
5
4
3
2
1
0
0
5
10 15 20 25 30 35 40 45
Input Voltage (V)
-50 -25
0
25
50
75 100 125 150
Temperature (℃)
SG Micro Corp
www.sg-micro.com
MAY 2023
6
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
TA = +25℃, VIN = 12V, VOUT = 5V, fSW = 500kHz, L = 6.8μH and COUT = 47μF × 2, unless otherwise noted.
CCM Mode
DCM Mode
AC Coupled
AC Coupled
VOUT
VOUT
VIN
VIN
VSW
IL
VSW
IL
IOUT = 3.5A
IOUT = 100mA
Time (1μs/div)
Time (1μs/div)
PSM Mode
Load Transient
AC Coupled
AC Coupled
VOUT
VOUT
VIN
VSW
IOUT
IL
IOUT = 0A
IOUT = 0.5A to 3.5A
Time (1ms/div)
Time (200μs/div)
Synchronizing in CCM
Synchronizing in DCM
AC Coupled
AC Coupled
VOUT
VOUT
VCLK
VCLK
VSW
VSW
IL
IL
IOUT = 200mA
IOUT = 2A
Time (2μs/div)
Time (2μs/div)
SG Micro Corp
www.sg-micro.com
MAY 2023
7
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
TA = +25℃, VIN = 12V, VOUT = 5V, fSW = 500kHz, L = 6.8μH and COUT = 47μF × 2, unless otherwise noted.
Startup by VIN
Startup by VIN
VOUT
VIN
VOUT
VIN
VSW
VSW
IL
IOUT = 3.5A
IOUT = 0A
IL
Time (2ms/div)
Startup by EN
Time (2ms/div)
Startup by EN
VOUT
VEN
VOUT
VEN
VSW
VSW
IOUT = 3.5A
IOUT = 0A
IL
IL
Time (2ms/div)
Time (2ms/div)
Shutdown by VIN
Shutdown by VIN
VOUT
VOUT
VIN
VIN
VSW
VSW
IL
IOUT = 0A
IOUT = 3.5A
IL
Time (20ms/div)
Time (20ms/div)
SG Micro Corp
www.sg-micro.com
MAY 2023
8
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
TA = +25℃, VIN = 12V, VOUT = 5V, fSW = 500kHz, L = 6.8μH and COUT = 47μF × 2, unless otherwise noted.
Shutdown by EN
Shutdown by EN
VOUT
VOUT
VEN
VSW
IL
VEN
VSW
IOUT = 3.5A
IOUT = 0A
IL
Time (500ms/div)
Short-Circuit Entry
Time (50μs/div)
Short-Circuit Recovery
VOUT
VOUT
VIN
VIN
VSW
IL
VSW
IOUT = 0A
IOUT = 0A
IL
Time (50μs/div)
Time (5ms/div)
SG Micro Corp
www.sg-micro.com
MAY 2023
9
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
FUNCTIONAL BLOCK DIAGRAM
Thermal
Shutdown
1μA
3.4μA
+
EN
UVLO, Bias &
VIN
Shutdown Logic
VEN
Shutdown
OVP
Boot
UVLO
+
BOOT
PSM Mode
FB
SS
Voltage
Reference
+
+
R
Q
PWM
Control
S
+
270kΩ
SW
3.2pF
3μA
7kΩ
Oscillator
& Slope
+
+
97pF
Frequency
Fold-back
Shutdown
VFB
Discharge
Logic
8A/V Current
Sense
GND
RT/CLK
Figure 2. SGM61432 Block Diagram
DETAILED DESCRIPTION
Overview
The switching frequency is adjusted by using a resistor
to ground which is connected to the RT/CLK pin. It is
also can be synchronized to an external clock signal.
The SGM61432 is a 40V Buck converter with an
integrated N-MOSFET power switch and 3.5A
continuous output current capability. Using peak current
mode control, this device provides good line and load
transient responses with reduced output capacitance.
Over-voltage protection (OVP) circuit is designed to
minimize the output over-voltage transients. When this
comparator detects an OVP (VFB > 110% × VREF), the
switch is kept off until the VFB falls below 106% of the
The minimum operating input voltage of the device is
4V and its nominal frequency is 500kHz. The quiescent
current is 38μA. It reduces to 1.3μA if the device is
disabled. The low RDSON high-side switch (93mΩ)
allows high operating efficiency.
VREF
.
The SS pin internal current source allows soft-start time
adjustments with a small external capacitor. This
feature provides more flexibility in output filter design.
The EN pin is internally pulled up by a current source
that can keep the device enabled if EN is floating. It can
also be used to increase the input UVLO threshold
using a resistor divider.
Light load efficiency is enhanced by a special power-save
mode.
During startup and over-current, the frequency is reduced
(frequency fold-back) to allow easy maintenance of low
inductor current. The thermal shutdown provides an
additional protection in fault conditions.
The bootstrap diode is integrated and only a small
capacitor between BOOT and SW pins (CBOOT) is
needed for the MOSFET gate driving bias. A separate
UVLO circuit monitors CBOOT voltage and turns the
switch off if this voltage falls below a preset threshold.
SG Micro Corp
www.sg-micro.com
MAY 2023
10
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
DETAILED DESCRIPTION (continued)
Minimum Input Voltage (4V) and UVLO
The recommended minimum operating input voltage is
4V. It may operate with lower voltages that are above
the VIN rising UVLO threshold (3.85V TYP). If VIN falls
below its falling UVLO threshold, the device will stop
switching.
Synchronization to RT/CLK Pin
The internal oscillator can synchronize to an external
logic clock applied to the RT/CLK pin (see Figure 4) in
the 250kHz to 2300kHz range. The SW rising edge
(switch turn-on) is synchronized with the CLK falling
edge. The CLK low and high levels must be less than
0.7V and more than 1.7V and have a pulse width larger
than 30ns. So, when the CLK source is off, the DC
resistance (RT) between RT/CLK and GND pins
determines the default switching frequency.
Enable Input and UVLO Adjustment
An internal current source pull-up keeps the EN pin
voltage at high state by default. The device will enable
if the EN pin voltage exceeds the enable threshold of
1.19V and VIN exceeds its UVLO threshold. The device
will disable if the EN voltage is externally pulled low or
the VIN pin voltage falls below its UVLO threshold.
SGM61432
RT/CLK
Logic
Clock Source
RT
If an application requires a higher input UVLO threshold,
an external input UVLO adjustment circuit is
recommended in Figure 3. Figure 3 shows how UVLO
and hysteresis are increased using REN1 and REN2. A
3.4μA additional current is injected to the divider when
EN pin voltage exceeds VENH (1.19V) to provide
hysteresis and it will be removed when EN pin voltage
is below VENL (1.11V). Use Equations 1 and 2 to
calculate these resistors. VSTART is the input start
(turn-on) threshold voltage and VSTOP is the input stop
(turn-off) threshold voltage.
Figure 4. Synchronization to External Clock
Switching Frequency and Timing Resistor
(RT/CLK Pin)
The switching frequency can be set from 200kHz to
2500kHz by a timing resistor (RT) placed between the
RT/CLK and GND pins. There is an internal bias
voltage (0.5V TYP) on the RT/CLK pin during the RT
mode and must have a resistor to ground to set the
switching frequency. Use Equation 3 to find the RT
resistance for any desired switching frequency (fSW).
VSTART
V
START -VSTOP -V
×
(
)
EN_HYS
VENH
REN1
=
1μA
3.4μA+VEN_HYS
×
VENH
31928
(1)
(2)
(3)
RT kΩ =
(
)
1.042
fSW kHz
(
)
VENH
REN2
=
VSTART -V
REN1
ENH +1μA
Low Dropout Operation and Bootstrap
Gate Driving (BOOT Pin)
An internal regulator provides the bias voltage for gate
driver using a 0.1μF ceramic capacitor. X5R or better
dielectric types are recommended. The capacitor must
have a 10V or higher voltage rating.
VIN
EN
3.4µA
1µA
REN1
VEN
REN2
The SGM61432 operates at maximum duty cycle when
input voltage is closed to output voltage as long as the
bootstrap voltage (VBOOT - VSW) is greater than its UVLO
threshold. When the bootstrap voltage falls below its
UVLO, the high-side switch is turned off, and the
integrated low-side switch is turned on to recharge the
BOOT capacitor. After the recharge, the high-side switch
is turned on again to regulate the output.
Figure 3. Input UVLO Adjustment
SG Micro Corp
www.sg-micro.com
MAY 2023
11
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
DETAILED DESCRIPTION (continued)
SS Pin and Soft-Start Adjustment
the high-side switch is turned on. The sensed high-side
switch current is continuously compared with the
current limit threshold and when the high-side current
reaches to that threshold, the high-side switch is turned
off. If the output is overloaded, VOUT will drop and VCOMP
will be increased by EA to compensate that, while the
EA output (VCOMP) is clamped to a maximum value. By
limiting VCOMP (maximum peak current), the output
current can actually be limited precisely.
It is recommended to add a soft-start capacitor (CSS)
between the SS and GND pins to set the soft-start time
from 1ms to 10ms for a proper startup. The lower of the
SS pin voltage VSS and VREF is applied to the error
amplifier to regulate the output. The internal ISS = 3μA
current charges CSS and provides a linear voltage ramp
on the SS pin. Use Equation 4 to calculate the soft-start
time.
CSS (nF)× VREF (V)
The natural OCP of the peak current mode control may
not be able to provide a complete protection when an
output short-circuit occurs and an extra protection
mechanism for short-circuit is needed. During an output
short, inductor current may runaway above over-current
limits because of the high input voltage and the
minimum controllable on-time. During an output short,
the inductor current decreases slowly because a small
negative diode forward voltage appears across the
inductor during the off-time, which results in the
inductor current cannot be reset. In these conditions,
current can saturate the inductor and the current may
even increase higher until the device is damaged. In
the SGM61432, this problem is effectively solved
through increasing the off-time during short-circuit by
reducing the switching frequency (frequency fold-back).
As the output voltage drops and the FB pin voltage falls
from 0.75V to 0V, the frequency will be divided by 1, 2,
4 and 8.
(4)
tSS (ms) =
ISS (μA)
Slope Compensation
Without implementing some slope compensation, the
PWM pulse widths will be unstable and oscillatory at
duty cycles above 50%. To avoid sub-harmonic
oscillations in this device, an internal compensation
ramp is added to the measured switch current before
comparing it with the control signal by the PWM
comparator.
Power-Save Mode
At light loads, the SGM61432 employs pulse-skipping
power-save mode (PSM) to maintain its high efficiency
by reducing the number of switching pulses. When the
peak inductor current falls below the PSM current
threshold, the corresponding internal COMP voltage
(VCOMP) drops below the internal threshold. In such
cases, the device will enter PSM to conserve power
and improve efficiency.
Over-Voltage Transient Protection
When an overload or an output fault condition is
removed, large overshoots may occur on the output.
The SGM61432 includes over-voltage protection (OVP)
circuit to reduce such over-voltage transients. If VFB
voltage exceeds 110% of the VREF threshold, the
MOSFET is turned off. When it returns below 106% of
the VREF threshold, the MOSFET is released again.
After entering PSM for a delay time, some modules are
shut down to minimum input current, and the device
draws only 38μA (TYP) input quiescent current. The
device can exit PSM if VCOMP rises above the internal
threshold and the peak inductor current exceeds
current threshold. During PSM operation, the peak
inductor current is the sensed parameter for entering
the PSM, and the actual load current (DC) threshold for
PSM will depend on the output filter.
Thermal Shutdown (TSD)
If the junction temperature (TJ) exceeds +175℃, the
TSD protection circuit will stop switching to protect the
device from overheating. The device will automatically
restart with a power up sequence when the junction
Over-Current Protection and Frequency
Fold-back
Over-current protection (OCP) is naturally provided by
current mode control. In each cycle, the high-side
current sensing starts a short time (blanking time) after
temperature drops below +155℃.
SG Micro Corp
www.sg-micro.com
MAY 2023
12
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
APPLICATION INFORMATION
A typical application circuit for the SGM61432 as a Buck converter is shown in Figure 5. It is used for converting a
7V to 40V supply voltage to a lower voltage level supply voltage (5V) suitable for the system.
Typical Application
R4
0Ω
VIN = 7V to 40V
VIN
EN
BOOT
SW
C5
0.1μF
L
R1
221kΩ
C1
10μF
C2
10μF
C3
0.1μF
6.8μH
V
OUT = 5V
IOUT = 3.5A (MAX)
R2
48.7kΩ
C7
47μF
C6
47μF
SGM61432
D
R5
68kΩ
SS
GND
FB
RT/CLK
C4
22nF
R3
R6
12kΩ
49.9kΩ
Figure 5. 5V Output SGM61432 Design Example
Design Requirements
Input Capacitor Design
The design parameters given in Table 1 are used for
A high-quality ceramic capacitor (X5R or X7R or better
dielectric grade) must be used for input decoupling of
the SGM61432. At least 3μF of effective capacitance
(after deratings) is needed on the VIN input. In some
applications, additional bulk capacitance may also be
required for the VIN input, for example, when the
SGM61432 is more than 5cm away from the input
source. The VIN capacitor ripple current rating must
also be greater than the maximum input current ripple.
The input current root mean square (RMS) can be
calculated using Equation 5 and the maximum value
occurs at 50% duty cycle. Using the design example
values, IOUT = 3.5A, yields an RMS input ripple current
of 1.75A.
this design example.
Table 1. Design Parameters
Design Parameters
Input Voltage
Example Values
12V (TYP) 7V to 40V
6.74V
Start Input Voltage (Rising VIN)
Stop Input Voltage (Falling VIN)
Input Ripple Voltage
5.52V
360mV, 3% of VIN_TYP
5V
Output Voltage
Output Voltage Ripple
50mV, 1% of VOUT
3.5A
Output Current Rating
Transient Response 1.75A to 3.5A Load Step
Operation Frequency
250mV, 5% of VOUT
500kHz
V - V
VOUT
(
)
= IOUT × D ×(1−D)
IN
OUT
(5)
ICIN_RMS = IOUT
×
×
Switching Frequency Selection
V
V
IN
IN
Several parameters such as losses, inductor and
capacitors sizes and response time are considered in
selection of the switching frequency. Higher frequency
increases the switching and gate charge losses, and
lower frequency requires larger inductance and
capacitances, which results in larger overall physical
size and higher cost. Therefore, a tradeoff is needed
between losses and component size. If the application
is noise-sensitive to a frequency range, the frequency
should be selected out of that range.
For this design, a ceramic capacitor with at least 50V
voltage rating is required to support the maximum input
voltage. So, 2 × 10µF/50V capacitors in parallel are
selected for VIN to cover all DC bias, thermal and aging
deratings. The input capacitance determines the
regulator input voltage ripple. This ripple can be
calculated from Equation 6. In this example, the total
effective capacitance of the 2 × 10µF/50V capacitors is
around 10µF at 12V input, and the input voltage ripple
is 200mV.
For this design, a lower switching frequency of 500kHz
is chosen and a 49.9kΩ resistor can be chosen for R3
according to Equation 3.
IOUT ×D ×(1−D)
(6)
ΔV
=
+IOUT ×ESRCIN
IN
CIN × fSW
SG Micro Corp
www.sg-micro.com
MAY 2023
13
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
APPLICATION INFORMATION (continued)
It is recommended to place an additional small size
0.1µF ceramic capacitor right beside VIN and GND pins
(anode of the diode) for high frequency filtering.
calculated IL_PEAK. Therefore, it is always safer to
choose the inductor saturation current higher than the
switch current limit.
Inductor Design
External Diode
An external power diode between the SW and GND
pins is needed for the SGM61432 to complete the
converter. This diode must tolerate the application’s
absolute maximum ratings. The reverse blocking
voltage must be higher than VIN_MAX and its peak
current must be above the maximum inductor current.
Choose a diode with small forward voltage drop for
higher efficiency. Typically, diodes with higher voltage
and current ratings have higher forward voltages. A
diode with a minimum of 50V reverse voltage is
preferred to allow input voltage transients up to the
rated voltage of the SGM61432.
Equation 7 is conventionally used to calculate the
output inductance of a Buck converter. Generally, a
smaller inductor is preferred to allow larger bandwidth
and smaller size. The ratio of inductor current ripple (∆IL)
to the maximum output current (IOUT) is represented as
KIND factor (∆IL/IOUT). The inductor ripple current is
bypassed and filtered by the output capacitor and the
inductor DC current is passed to the output. Inductor
ripple is selected based on a few considerations. The
peak inductor current (IOUT + ∆IL/2) must have a safe
margin from the saturation current of the inductor in the
worst-case conditions, especially if a hard-saturation
core type inductor (such as ferrite) is chosen. For peak
current mode converter, selecting an inductor with
saturation current above the switch current limit is
sufficient. The ripple current also affects the selection of
the output capacitor. COUT RMS current rating must be
higher than the inductor RMS ripple. Typically, a 20% to
40% ripple is selected (KIND = 0.2 ~ 0.4). Choosing a
higher KIND value reduces the selected inductance,
however, a too high KIND factor may result in insufficient
slope compensation.
Output Capacitor
Three primary criteria must be considered for design of
the output capacitor (COUT):
1. The converter pole location.
2. The output voltage ripple.
3. The transient response to a large change in load
current.
The selected value must satisfy all of them. The desired
transient response is usually expressed as maximum
overshoot, maximum undershoot, or maximum
recovery time of VOUT in response to a large load step.
Transient response is usually a more stringent criterion
in low output voltage applications. The output capacitor
must provide the increased load current or absorb the
excess inductor current (when the load current steps
down) until the control loop can re-adjust the current of
the inductor to the new load level. Typically, it requires
two or more cycles for the loop to detect the output
change and respond (change the duty cycle). Another
requirement may also be expressed as desired hold-up
time in which the output capacitor must hold the output
voltage above a certain level for a specified period if the
input power is removed. It may also be expressed as
the maximum output voltage drop or rise when the full
load is connected or disconnected (100% load step).
V
IN_MAX - VOUT
VOUT
VIN_MAX × fSW
(7)
L =
×
IOUT ×KIND
In this example, the calculated inductance will be
6.25μH with KIND = 0.4, so the nearest larger
inductance of 6.8μH is selected. The ripple, RMS and
peak inductor current calculations are summarized in
Equations 8, 9 and 10 respectively.
V
IN_MAX - VOUT
VOUT
(8)
ΔIL =
×
L
V
IN_MAX × fSW
ΔIL2
IL _RMS = IO2 UT
+
+
(9)
12
ΔIL
(10)
IL _PEAK = IOUT
2
Note that during startup, load transients or the peak
inductor current under fault conditions may exceed the
SG Micro Corp
www.sg-micro.com
MAY 2023
14
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
APPLICATION INFORMATION (continued)
Equation 11 can be used to calculate the minimum
output capacitance that is needed to supply a current
step (ΔIOUT) for at least 2 cycles until the control loop
responds to the load change with a maximum allowed
output transient of ΔVOUT (overshoot or undershoot).
Note that the impact of output capacitor ESR on the
ripple is not considered in Equation 13. For a specific
output capacitance value, use Equation 14 to calculate
the maximum acceptable ESR of the output capacitor
to meet the output voltage ripple requirement.
2× ΔIOUT
fSW × ΔVOUT
VOUT _RIPPLE
1
(11)
(14)
COUT
>
ESRCOUT
<
−
ΔIL
8× fSW ×COUT
where:
Higher nominal capacitance value must be chosen due
to aging, temperature, and DC bias derating of the
output capacitors. In this example, 2 × 47μF/25V X5R
ceramic capacitors with 1.5mΩ of ESR are used. The
amount of ripple current that a capacitor can handle
without damage or overheating is limited. The inductor
ripple is bypassed through the output capacitor.
Equation 15 calculates the RMS current that the output
capacitor must support. In this example, it is 371mA.
ΔIOUT is the change in output current.
ΔVOUT is the allowable change in the output voltage.
For example, if the acceptable transient from 1.75A to
3.5A load step is 5%, by inserting ΔVOUT = 0.05 × 5V =
0.25V and ΔIOUT = 1.75A, the minimum required
capacitance will be 28μF. Note that the impact of output
capacitor ESR on the transient is not taken into account
in Equation 11. For ceramic capacitors, the ESR is
generally small enough to ignore its impact on the
calculation of ΔVOUT transient. However, for aluminum
electrolytic and tantalum capacitors, or high current
power supplies, the ESR contribution to ΔVOUT must be
considered.
VOUT × VIN_MAX - VOUT
(
)
(15)
ICOUT_RMS
=
12 × VIN_MAX ×L× fSW
Bootstrap Capacitor Selection
Use a 0.1μF high-quality ceramic capacitor (X7R or
X5R) with 10V or higher voltage rating for the bootstrap
capacitor (C5). A 5Ω to 10Ω resistor (R4) can be added
in series with C5 to slow down switch-on speed of the
high-side switch and reduce EMI if needed. Too high
values for R4 may cause insufficient C5 charging in high
duty-cycle applications. Slower switch-on speed will
also increase switch losses and reduce efficiency.
When the load steps down, the excess inductor current
will charge the capacitor and the output voltage will
overshoot. The catch diode current cannot discharge
COUT, so COUT must be large enough as given in
Equation 12 to absorb the excess inductor energy with
limited over-voltage. The excess energy absorbed in
the output capacitor increases the voltage on the
capacitor. The capacitor must be sized to maintain the
desired output voltage during these transient periods.
Equation 12 calculates the minimum capacitance
required to keep the output-voltage overshoot to a
desired value.
UVLO Setting
The Input UVLO can be programmed using an external
voltage divider on the EN pin of the SGM61432. In this
design R1 is connected between VIN pin and EN pin
and R2 is connected between EN pin and GND (see
Figure 5). The UVLO has two thresholds (hysteresis),
one for power-up (turn-on) when the input voltage is
rising and one for power-down (turn-off) when the
voltage is falling. In this design, the turn-on (enable to
start switching) occurs when VIN rises above 6.74V
(UVLO rising threshold). When the regulator is working,
it will not stop switching (disabled) until the input falls
below 5.52V (UVLO falling threshold). Equations 1 and
2 are provided to calculate the resistors. For this
example, the nearest standard resistor values are R1 =
221kΩ and R2 = 48.7kΩ.
IO2 UT _H -IO2 UT _L
(VOUT + ΔVOUT )2 − VO2UT
(12)
COUT > L×
For example, if the acceptable transient from 3.5A to
1.75A load step is 5%, by inserting ΔVOUT = 0.05 × 5V =
0.25V, the minimum required capacitance will be
24.4μF.
ΔIL
(13)
COUT
>
8× fSW × VOUT _RIPPLE
where:
IOUT_H is the high level of the current step.
IOUT_L is the low level of the current step.
SG Micro Corp
www.sg-micro.com
MAY 2023
15
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
APPLICATION INFORMATION (continued)
Top side GND plane that is connected to the
Feedback Resistors Setting
exposed pad provides the best heat removal path
for the IC. It should be large enough for designs
that operate with full rated loads. Thicker copper
planes can improve heat dissipation.
Use an external resistor divider (R5 and R6) to set the
output voltage using Equations 16 and 17.
REF
VOUT − V
(16)
(17)
R = R ×
5
6
VREF
Place the RT resistor (R3) as close as possible to
the RT/CLK pin with short routes.
R5
R6
VOUT = VREF
×
+1
For this example, 12kΩ was selected for R6. Using
Equation 16, R5 is calculated as 68kΩ.
Layout Considerations
PCB is an essential element of any switching power
supply. The converter operation can be significantly
disturbed due to the existence of the large and fast
rising/falling voltages that can couple through stray
capacitances to other signal paths, and also due to the
large and fast changing currents that can interact
through parasitic magnetic couplings, unless those
interferences are minimized and properly managed in
the layout design. Insufficient conductance in copper
traces for the high current paths results in high resistive
losses in the power paths and voltage errors. Following
the guidelines provided here are necessary to design a
good layout:
Bypass VIN pin to GND pin with low-ESR ceramic
capacitors (X5R or X7R or better dielectric) placed
as close as possible to VIN pin and the catch
diode anode pin.
Minimize the area and path length of the loop
formed by VIN pin, bypass capacitors connections,
SW pin and the catch diode.
Connect the device GND pin directly to the
exposed pad (Power Pad) copper area under the
IC device.
Stitch the exposed pad to the internal ground
planes and the back side of the PCB directly under
the IC using multiple thermal vias.
Use a short and wide path for routing the SW pin
to the cathode of the catch diode on the same
layer and to the output inductor.
Figure 6. Layout
Keep the SW area minimal and away from
sensitive signals like FB input and divider resistors
or RT/CLK to avoid capacitive noise coupling.
SG Micro Corp
www.sg-micro.com
MAY 2023
16
40V/3.5A, Adjustable Switching Frequency
SGM61432
Buck Converter with 38μA IQ
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
MAY 2023 ‒ REV.A.1 to REV.A.2
Page
Updated Typical Performance Characteristics and Layout.............................................................................................................................7, 16
APRIL 2023 ‒ REV.A to REV.A.1
Page
Updated Functional Block Diagram, Detailed Description and Application Information sections........................................................10, 11, 12, 13
Changes from Original (MARCH 2022) to REV.A
Page
Changed from product preview to production data.............................................................................................................................................All
SG Micro Corp
www.sg-micro.com
MAY 2023
17
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
SOIC-8 (Exposed Pad)
D
e
3.22
E1
E
E2
2.33 5.56
1.91
b
D1
1.27
0.61
RECOMMENDED LAND PATTERN (Unit: mm)
L
A
A1
c
θ
A2
Dimensions
In Millimeters
Symbol
MIN
MOD
MAX
1.700
0.150
1.650
0.510
0.250
5.100
3.420
4.000
6.200
2.530
A
A1
A2
b
0.000
1.250
0.330
0.170
4.700
3.020
3.800
5.800
2.130
-
-
-
c
-
D
-
D1
E
-
-
E1
E2
e
-
-
1.27 BSC
L
0.400
0°
-
-
1.270
8°
θ
NOTES:
1. Body dimensions do not include mode flash or protrusion.
2. This drawing is subject to change without notice.
SG Micro Corp
TX00013.002
www.sg-micro.com
PACKAGE INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
P2
P0
W
Q2
Q4
Q2
Q4
Q2
Q4
Q1
Q3
Q1
Q3
Q1
Q3
B0
Reel Diameter
P1
A0
K0
Reel Width (W1)
DIRECTION OF FEED
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF TAPE AND REEL
Reel Width
Reel
Diameter
A0
B0
K0
P0
P1
P2
W
Pin1
Package Type
W1
(mm)
(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant
SOIC-8
(Exposed Pad)
13″
12.4
6.40
5.40
2.10
4.0
8.0
2.0
12.0
Q1
SG Micro Corp
TX10000.000
www.sg-micro.com
PACKAGE INFORMATION
CARTON BOX DIMENSIONS
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF CARTON BOX
Length
(mm)
Width
(mm)
Height
(mm)
Reel Type
Pizza/Carton
13″
386
280
370
5
SG Micro Corp
www.sg-micro.com
TX20000.000
相关型号：
©2020 ICPDF网 联系我们和版权申明