CXG1126EN-T9 [SONY]
DP3T, 900MHz Min, 1500MHz Max, 0.75dB Insertion Loss-Max, PLASTIC, VQFN-10;
| 型号： | CXG1126EN-T9 |
| 厂家： | 
SONY CORPORATION |
| 描述： | DP3T, 900MHz Min, 1500MHz Max, 0.75dB Insertion Loss-Max, PLASTIC, VQFN-10 ISM频段 射频 微波 |
| 文件： | 总5页 (文件大小：65K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CXG1126EN
High Power DP3T Switch with Logic Control
For the availability of this product, please contact the sales office.
Description
10 pin VSON (Plastic)
The CXG1126EN is a high power DP3T switch
MMIC.This IC can be used in wireless communication
systems, for example, CDMA handsets with GPS.
The CXG1126EN can be operated by the CMOS
control. The Sony’s GaAs JFET process is used for
low insertion loss and on-chip logic circuit.
Features
• Low insertion loss: 0.25dB @900MHz,
0.35dB @1.5GHz
• High linearity: IIP3 (Typ.) = 70dBm
• 1 CMOS compatible control line
• Small package size: 10-pin VSON
Applications
• Dual-band cellular handsets
• CMDA with GPS, dual-band CDMA
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings (Ta = 25°C)
• Bias voltage
VDD
Vctl
7
V
V
• Control voltage
5
• Operating temperature Topr
• Storage temperature Tstg
–35 to +85
–65 to +150
°C
°C
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E01713B2X-PS
CXG1126EN
Block Diagram and Recommended Circuit
GND (recommended)
6
7
5
4
3
2
1
RF1
RF2
RF3
RF4
F1
F2
CRF (100pF)
GND
CRF (100pF)
GND
8
RF5
F3
F4
CRF (100pF)
GND
CRF (100pF)
Rctl (1kΩ)
CTL
9
Cbypass (100pF)
10
VDD
Cbypass (100pF)
CRF (100pF)
GND (recommended)
When using this IC, the following external components should be used:
Rctl:
This resistor is used to improve ESD performance. 1kΩ is recommended.
CRF:
This capacitor is used for RF de-coupling and must be used for all application.
100pF is recommended.
Cbypass: This capacitor is used for DC line filtering. 100pF is recommended.
TruthTable
CTL
L
On Pass
F1
F2
F3
F4
RF1 – RF4, RF2 – RF5
RF2 – RF4, RF3 – RF5
ON OFF ON OFF
OFF ON OFF ON
H
DC Bias Condition
(Ta = 25°C)
Item
Vctl (H)
Vctl (L)
VDD
Min.
2.0
0
Typ.
3.0
—
Max.
3.6
Unit
V
0.4
V
2.6
3.0
3.6
V
– 2 –
CXG1126EN
Electrical Characteristics
(Ta = 25°C)
Item
Symbol
Condition
Min.
Typ.
0.25
0.35
0.40
0.50
0.40
0.50
0.25
0.35
21
Max. Unit
RF1 – RF4 @900MHz
RF1 – RF4 @1.5GHz
RF2 – RF4 @900MHz
RF2 – RF4 @1.5GHz
RF2 – RF5 @900MHz
RF2 – RF5 @1.5GHz
RF3 – RF5 @900MHz
RF3 – RF5 @1.5GHz
RF1 – RF4 @900MHz
RF1 – RF4 @1.5GHz
RF2 – RF4 @900MHz
RF2 – RF4 @1.5GHz
RF2 – RF5 @900MHz
RF2 – RF5 @1.5GHz
RF3 – RF5 @900MHz
RF3 – RF5 @1.5GHz
0.50
0.60
0.65
0.75
0.65
0.75
0.50
0.60
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
—
Insertion loss
IL
18
15
27
22
27
22
18
15
18
30
25
Isolation
ISO.
30
25
21
18
VSWR
VSWR
2fo
900MHz, 1.5GHz
1.2
–75
–75
34
1
–60
–60
dBc
dBc
dBm
dBm
µs
Harmonics
1
3fo
1dB compression input power P1dB
VDD = 3.0V
2
Input IP3
IIP3
TSW
Ictl
60
70
Switching speed
Control current
Bias current
2
Vctl (High) =3V
VDD = 3V
35
70
µA
µA
IDD
90
150
Vctl (L) = 0V, Vctl (H) = 3.0V
1
Pin = 29dBm, 900MHz, VDD = 3.0V
2
Pin = 25dBm (900MHz) + 25dBm (901MHz), VDD = 3.0V
– 3 –
CXG1126EN
Package Outline
Unit: mm
10PIN VSON(PLASTIC)
+ 0.1
0.8 – 0.05
0.6
2.5
0.05
S
A
S
6
10
PIN 1 INDEX
1
5
B
x2
0.4
0.8
0.35 ± 0.1
S
0.15
B
x4
0.15
AB
S
A
B
0.05 M
S
Solder Plating
0.13 ± 0.025
+ 0.09
0.14 – 0.03
TERMINAL SECTION
1) The dimensions of the terminal section apply to the
NOTE:
ranges of 0.1mm and 0.25mm from the end of a terminal.
PACKAGE STRUCTURE
EPOXY RESIN
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
SOLDER PLATING
COPPER ALLOY
0.013g
SONY CODE
VSON-10P-01
EIAJ CODE
JEDEC CODE
PACKAGE MASS
– 4 –
CXG1126EN
Package Outline
Unit: mm
10PIN VSON(PLASTIC)
+ 0.1
0.8 – 0.05
0.6
2.5
0.05
S
A
S
6
10
PIN 1 INDEX
1
5
B
x2
0.4
0.8
0.35 ± 0.1
S
0.15
B
x4
0.15
AB
S
A
B
0.05 M
S
Solder Plating
0.13 ± 0.025
+ 0.09
0.14 – 0.03
TERMINAL SECTION
1) The dimensions of the terminal section apply to the
NOTE:
ranges of 0.1mm and 0.25mm from the end of a terminal.
PACKAGE STRUCTURE
EPOXY RESIN
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
SOLDER PLATING
COPPER ALLOY
0.013g
SONY CODE
VSON-10P-01
EIAJ CODE
JEDEC CODE
PACKAGE MASS
LEAD SPECIFICATIONS
ITEM
LEAD MATERIAL
LEAD TREATMENT
SPEC.
COPPER ALLOY
Sn-Bi 2.5%
LEAD TREATMENT THICKNESS 5-18µm
Sony Corporation
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