STP9NK80Z [STMICROELECTRONICS]

N-CHANNEL 800V -0.9ohm - 7.5A TO-220/TO-220FP Zener-Protected SuperMESH MOSFET; N沟道800V -0.9ohm - 7.5A TO- 220 / TO- 220FP齐纳保护超网MOSFET
STP9NK80Z
型号: STP9NK80Z
厂家: ST    ST
描述:

N-CHANNEL 800V -0.9ohm - 7.5A TO-220/TO-220FP Zener-Protected SuperMESH MOSFET
N沟道800V -0.9ohm - 7.5A TO- 220 / TO- 220FP齐纳保护超网MOSFET

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STP9NK80Z  
STF9NK80Z  
N-CHANNEL 800V -0.9- 7.5A TO-220/TO-220FP  
Zener-Protected SuperMESH™MOSFET  
Table 1: General Features  
Figure 1: Package  
TYPE  
V
R
I
D
Pw  
DSS  
DS(on)  
STP9NK80Z  
STF9NK80Z  
800 V  
800 V  
<1.2 7.5 A 150 W  
<1.2 7.5 A 35 W  
TYPICAL R (on) = 0.9Ω  
DS  
EXTREMELY HIGH dv/dt CAPABILITY  
IMPROVED ESD CAPABILITY  
100% AVALANCHE RATED  
3
GATE CHARGE MINIMIZED  
2
1
VERY LOW INTRINSIC CAPACITANCES  
VERY GOOD MANUFACTURING  
REPEATIBILITY  
TO-220  
TO-220FP  
DESCRIPTION  
The SuperMESH™ series is obtained through an  
extreme optimization of ST’s well established  
strip-based PowerMESH™ layout. In addition to  
pushing on-resistance significantly down, special  
care is taken to ensure a very good dv/dt capability  
for the most demanding applications. Such series  
complements ST full range of high voltage MOS-  
FETs including revolutionary MDmesh™ products.  
Figure 2: Internal Schematic Diagram  
APPLICATIONS  
HIGH CURRENT, HIGH SPEED SWITCHING  
IDEAL FOR OFF-LINE POWER SUPPLIES  
SMPS  
Table 2: Order Codes  
SALES TYPE  
STP9NK80Z  
STF9NK80Z  
MARKING  
P9NK80Z  
F9NK80Z  
PACKAGE  
TO-220  
PACKAGING  
TUBE  
TO-220FP  
TUBE  
Rev. 1  
May 2005  
1/11  
STP9NK80Z - STF9NK80Z  
Table 3: Absolute Maximum ratings  
Symbol  
Parameter  
Value  
Unit  
TO-220  
TO-220FP  
V
Drain-source Voltage (V = 0)  
800  
800  
± 30  
V
V
DS  
GS  
V
DGR  
Drain-gate Voltage (R = 20 k)  
GS  
V
GS  
Gate- source Voltage  
V
I
Drain Current (continuous) at T = 25°C  
7.5  
4.7  
7.5 (*)  
4.7 (*)  
30 (*)  
35  
A
D
C
I
D
Drain Current (continuous) at T = 100°C  
A
C
I
( )  
Drain Current (pulsed)  
30  
A
DM  
P
Total Dissipation at T = 25°C  
150  
1.20  
W
TOT  
C
Derating Factor  
0.28  
W/°C  
V
V
Gate source ESD(HBM-C=100pF, R=1.5KΩ)  
Peak Diode Recovery voltage slope  
Insulation Withstand Voltage (DC)  
4000  
4.5  
ESD(G-S)  
dv/dt (1)  
V/ns  
V
V
ISO  
-
2500  
T
T
stg  
Operating Junction Temperature  
Storage Temperature  
-55 to 150  
-55 to 150  
°C  
°C  
j
( ) Pulse width limited by safe operating area  
(1) I 7.5A, di/dt 200A/µs, V = 80% V  
(BR)DSS  
SD  
DD  
(*) Limited only by maximum temperature allowed  
Table 4: Thermal Data  
TO-220  
TO-220FP  
Rthj-case  
Rthj-amb  
Thermal Resistance Junction-case Max  
0.83  
3.6  
°C/W  
°C/W  
°C  
Thermal Resistance Junction-ambient Max  
62.5  
350  
T
Maximum Lead Temperature For Soldering  
Purpose  
l
Table 5: Avalanche Characteristics  
Symbol  
Parameter  
Max Value  
Unit  
I
Avalanche Current, Repetitive or Not-Repetitive  
7.5  
A
AR  
(pulse width limited by T max)  
j
E
Single Pulse Avalanche Energy  
350  
mJ  
AS  
(starting T = 25 °C, I = I , V = 50 V)  
j
D
AR  
DD  
Table 6: Gate-Source Zener Diode  
Symbol  
BV  
Parameter  
Gate-Source  
Breakdown Voltage  
Test Conditions  
Min.  
30  
Typ.  
Max.  
Unit  
Igs=± 1mA (Open Drain)  
V
GSO  
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES  
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the devices  
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be  
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and  
cost-effective intervention to protect the devices integrity. These integrated Zener diodes thus avoid the  
usage of external components.  
2/11  
STP9NK80Z - STF9NK80Z  
ELECTRICAL CHARACTERISTICS (T  
=25°C UNLESS OTHERWISE SPECIFIED)  
CASE  
Table 7: On/Off  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
V
Drain-source  
I
D
= 1 mA, V = 0  
800  
V
(BR)DSS  
GS  
Breakdown Voltage  
Zero Gate Voltage  
I
V
V
= Max Rating  
= Max Rating, T = 125 °C  
1
50  
µA  
µA  
DSS  
DS  
Drain Current (V = 0)  
GS  
DS  
C
I
Gate-body Leakage  
V
GS  
= ± 20V  
±10  
µA  
GSS  
Current (V = 0)  
DS  
V
V
V
= V , I = 100µA  
Gate Threshold Voltage  
3
3.75  
0.9  
4.5  
1.2  
V
GS(th)  
DS  
GS  
D
R
Static Drain-source On  
Resistance  
= 10V, I = 3.75 A  
DS(on)  
GS  
D
Table 8: DYNAMIC  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
g
fs  
(1)  
Forward Transconductance  
V
= 15 V I = 3.75 A  
7.5  
S
DS  
, D  
C
Input Capacitance  
Output Capacitance  
Reverse Transfer  
Capacitance  
V
= 25V, f = 1 MHz, V = 0  
1900  
180  
38  
pF  
pF  
pF  
iss  
DS  
GS  
C
oss  
C
rss  
C
(3) Equivalent Output  
Capacitance  
V
V
= 0V, V = 0V to 640V  
75  
pF  
oss eq.  
GS  
DS  
Turn-on Delay Time  
Rise Time  
Turn-off Delay Time  
Fall Time  
= 400 V, I = 3.75 A  
26  
19  
58  
18  
ns  
ns  
ns  
ns  
DD  
D
t
t
d(on)  
R
= 4.7V = 10 V  
GS  
G
t
r
(see Figure 19)  
d(off)  
t
f
t
V
R
= 640 V, I = 7.5A,  
Off-voltage Rise Time  
Fall Time  
Cross-over Time  
12  
10  
24  
ns  
ns  
ns  
r(Voff)  
DD  
D
t
f
= 4.7Ω, V = 10V  
G
GS  
t
(see Figure 20)  
c
Q
V
V
= 640V, I = 7.5 A,  
= 10V  
60  
12  
35  
84  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
nC  
nC  
nC  
g
DD  
D
Q
gs  
Q
gd  
GS  
(see Figure 22)  
Table 9: Source Drain Diode  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
I
7.5  
30  
A
A
Source-drain Current  
Source-drain Current (pulsed)  
SD  
(2)  
I
SDM  
V
(1)  
I
I
= 7.5 A, V = 0  
GS  
Forward On Voltage  
1.6  
V
SD  
SD  
t
= 7.5 A, di/dt = 100A/µs  
Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Current  
530  
4.5  
17  
ns  
µC  
A
rr  
SD  
Q
V
= 35V, T = 25°C  
rr  
DD  
j
I
(see Figure 20)  
RRM  
t
Q
I
V
= 7.5 A, di/dt = 100A/µs  
Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Current  
690  
6.4  
17  
ns  
µC  
A
rr  
SD  
= 35V, T = 150°C  
rr  
DD  
j
I
(see Figure 20)  
RRM  
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.  
2. Pulse width limited by safe operating area.  
3. C  
V
is defined as a constant equivalent capacitance giving the same charging time as C  
when V increases from 0 to 80%  
oss DS  
oss eq.  
.
DSS  
3/11  
STP9NK80Z - STF9NK80Z  
Figure 3: Safe Operating Area for TO-220  
Figure 6: Thermal Impedance for TO-220  
Figure 7: Thermal Impedance for TO-220FP  
Figure 8: Transfer Characteristics  
Figure 4: Safe Operating Area for TO-220FP  
Figure 5: Output Characteristics  
4/11  
STP9NK80Z - STF9NK80Z  
Figure 9: Transconductance  
Figure 12: Static Drain-source On Resistance  
Figure 10: Gate Charge vs Gate-source Voltage  
Figure 13: Capacitance Variations  
Figure 11: Normalized Gate Thereshold Volt-  
age vs Temperature  
Figure 14: Normalized BVDSS vs Temperature  
5/11  
STP9NK80Z - STF9NK80Z  
Figure 15: Normalized On Resistance vs Tem-  
peratureS  
Figure 17: Source-Drain Diode Forward Char-  
acteristics  
Figure 16: Avalanche Energy vs Temperature  
6/11  
STP9NK80Z - STF9NK80Z  
Figure 18: Unclamped Inductive Load Test Cir-  
cuit  
Figure 21: Unclamped Inductive Wafeform  
Figure 19: Switching Times Test Circuit For  
Resistive Load  
Figure 22: Gate Charge Test Circuit  
Figure 20: Test Circuit For Inductive Load  
Switching and Diode Recovery Times  
7/11  
STP9NK80Z - STF9NK80Z  
TO-220 MECHANICAL DATA  
mm.  
inch  
TYP.  
DIM.  
MIN.  
TYP  
MAX.  
4.60  
0.88  
1.70  
0.70  
15.75  
10.40  
2.70  
5.15  
1.32  
6.60  
2.72  
14  
MIN.  
0.173  
0.024  
0.045  
0.019  
0.60  
MAX.  
0.181  
0.034  
0.066  
0.027  
0.620  
0.409  
0.106  
0.202  
0.052  
0.256  
0.107  
0.551  
0.154  
A
b
4.40  
0.61  
1.15  
0.49  
15.25  
10  
b1  
c
D
E
0.393  
0.094  
0.194  
0.048  
0.244  
0.094  
0.511  
0.137  
e
2.40  
4.95  
1.23  
6.20  
2.40  
13  
e1  
F
H1  
J1  
L
L1  
L20  
L30  
øP  
Q
3.50  
3.93  
16.40  
28.90  
0.645  
1.137  
3.75  
2.65  
3.85  
2.95  
0.147  
0.104  
0.151  
0.116  
8/11  
STP9NK80Z - STF9NK80Z  
TO-220FP MECHANICAL DATA  
mm.  
inch  
DIM.  
MIN.  
4.4  
TYP  
MAX.  
4.6  
2.7  
2.75  
0.7  
1
MIN.  
0.173  
0.098  
0.098  
0.017  
0.030  
0.045  
0.045  
0.195  
0.094  
0.393  
TYP.  
MAX.  
0.181  
0.106  
0.108  
0.027  
0.039  
0.067  
0.067  
0.204  
0.106  
0.409  
A
B
2.5  
D
2.5  
E
0.45  
0.75  
1.15  
1.15  
4.95  
2.4  
F
F1  
F2  
G
1.7  
1.7  
5.2  
2.7  
10.4  
G1  
H
10  
L2  
L3  
L4  
L5  
L6  
L7  
Ø
16  
0.630  
28.6  
9.8  
2.9  
15.9  
9
30.6  
10.6  
3.6  
1.126  
.0385  
0.114  
0.626  
0.354  
0.118  
1.204  
0.417  
0.141  
0.645  
0.366  
0.126  
16.4  
9.3  
3
3.2  
L3  
L6  
L7  
1 2  
L4  
3
L5  
L2  
9/11  
STP9NK80Z - STF9NK80Z  
Table 10: Revision History  
Date  
Revision  
Description of Changes  
18-May-2005  
1
First Release.  
10/11  
STP9NK80Z - STF9NK80Z  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted  
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject  
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not  
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics  
All other names are the property of their respective owners  
© 2005 STMicroelectronics - All Rights Reserved  
STMicroelectronics group of companies  
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -  
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America  
11/11  

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