STS17NF3LL_06 [STMICROELECTRONICS]
N-channel 30V - 0.0045ohm - 17A - SO-8 STripFET II Power MOSFET for DC-DC conversion; N沟道30V - 0.0045ohm - 17A - SO- 8的STripFET II功率MOSFET的DC- DC转换器
| 型号： | STS17NF3LL_06 |
| 厂家： | 
ST |
| 描述： | N-channel 30V - 0.0045ohm - 17A - SO-8 STripFET II Power MOSFET for DC-DC conversion |
| 文件： | 总12页 (文件大小：322K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STS17NF3LL
N-channel 30V - 0.0045Ω - 17A - SO-8
STripFET™ II Power MOSFET for DC-DC conversion
General features
Type
VDSS
RDS(on)
ID
STS17NF3LL
30V
<0.0055Ω
17A
■ Optimal R
x Q trade-off @ 4.5V
g
DS(on)
■ Conduction losses reduced
■ Switching losses reduced
SO-8
Description
This application specific Power MOSFET is the
second generation of STMicroelectronis unique
"Single Feature Size™" strip-based process. The
resulting transistor shows the best trade-off
between on-resistance and gate charge. Such
features make it the best choice in high efficiency
DC-DC converters for Telecom and computer
industries.
Internal schematic diagram
Applications
■ Switching application
Order codes
Part number
Marking
Package
Packaging
STS17NF3LL
S17NF3LL
SO-8
Tape & reel
October 2006
Rev 5
1/12
www.st.com
12
Contents
STS17NF3LL
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
4
5
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
STS17NF3LL
Electrical ratings
1
Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VDS
VGS
ID
Drain-source voltage (VGS = 0)
Gate-source voltage
30
18
17
12
68
3.2
V
V
Drain current (continuous) at TC = 25°C
Drain current (continuous) at TC = 100°C
Drain current (pulsed)
A
ID
A
(1)
IDM
A
PTOT
Total dissipation at TC = 25°C
W
1. Pulse width limited by safe operating area
Table 2.
Thermal data
Rthj-amb Thermal resistance junction-ambient max (1)
47
°C/W
°C/W
°C
Rthj-lead Thermal resistance junction-leads max
16
Tj
Maximum operating junction temperature
Storage temperature
-55 to 175
-55 to175
Tstg
°C
1. When mounted on FR-4 board of 1in², 2oz Cu. t<10sec
3/12
Electrical characteristics
STS17NF3LL
2
Electrical characteristics
(T
=25°C unless otherwise specified)
CASE
Table 3.
Symbol
On/off states
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Drain-source
V(BR)DSS
ID = 250µA, VGS =0
30
V
breakdown voltage
V
DS = max rating
Zero gate voltage
1
µA
µA
IDSS
VDS =max rating,
TC = 125°C
drain current (VGS = 0)
10
Gate-body leakage
current (VDS = 0)
IGSS
VGS
=
18V
100
nA
V
VGS(th)
RDS(on)
Gate threshold voltage
VDS = VGS, ID = 250µA
1
VGS = 10V, ID = 8.5A
VGS = 4.5V, ID = 8.5A
0.0045 0.0055
0.0055 0.007
Ω
Ω
Static drain-source on
resistance
Table 4.
Symbol
Dynamic
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Forward
transconductance
(1)
gfs
VDS = 10V, ID = 8.5A
37
S
Input capacitance
Output capacitance
Ciss
Coss
Crss
2160
614
98
pF
pF
pF
VDS = 25V, f = 1MHz,
VGS = 0
Reverse transfer
capacitance
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
23.5
39
ns
ns
ns
ns
VDD = 15V, ID = 8.5A
RG = 4.7Ω VGS = 4.5V
(see Figure 13)
Turn-off delay time
Fall time
47.5
37
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 24V, ID = 12.5A,
VGS = 4.5V, RG = 4.7Ω
(see Figure 14)
26
7
35
nC
nC
nC
12
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
4/12
STS17NF3LL
Electrical characteristics
Table 5.
Source drain diode
Parameter
Symbol
Test conditions
Min.
Typ.
Max. Unit
Source-drain current
ISD
17
68
A
A
Source-drain current
(pulsed)
(1)
ISDM
(2)
VSD
Forward on voltage
ISD = 17A, VGS = 0
1.2
V
trr
Reverse recovery time
ISD = 17A, di/dt = 100A/µs,
39
45
ns
nC
A
Qrr
Reverse recovery charge VDD = 15V; Tj = 150°C
IRRM
Reverse recovery current (see Figure 15)
2.3
1. Pulse width limited by safe operating area.
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
5/12
Electrical characteristics
STS17NF3LL
2.1
Electrical characteristics (curves)
Figure 1. Safe operating area
Figure 2. Thermal impedance
Figure 3. Output characterisics
Figure 4. Transfer characteristics
Figure 5. Transconductance
Figure 6. Static drain-source on resistance
6/12
STS17NF3LL
Electrical characteristics
Figure 7. Gate charge vs gate-source voltage Figure 8. Capacitance variations
Figure 9. Normalized gate threshold voltage Figure 10. Normalized on resistance vs
vs temperature
temperature
Figure 11. Source-drain diode forward
characteristics
Figure 12. Normalized breakdown voltage vs
temperature
7/12
Test circuit
STS17NF3LL
3
Test circuit
Figure 13. Switching times test circuit for
resistive load
Figure 14. Gate charge test circuit
Figure 15. Test circuit for inductive load
switching and diode recovery times
Figure 16. Unclamped Inductive load test
circuit
Figure 17. Unclamped inductive waveform
Figure 18. Switching time waveform
8/12
STS17NF3LL
Package mechanical data
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
9/12
Package mechanical data
STS17NF3LL
SO-8 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.75
0.25
1.65
0.85
0.48
0.25
0.5
MIN.
MAX.
0.068
0.009
0.064
0.033
0.018
0.010
0.019
A
a1
a2
a3
b
0.1
0.003
0.65
0.35
0.19
0.25
0.025
0.013
0.007
0.010
b1
C
c1
D
45 (typ.)
4.8
5.8
5.0
6.2
0.188
0.228
0.196
0.244
E
1.27
3.81
e
0.050
0.150
e3
F
3.8
0.4
4.0
1.27
0.6
0.14
0.157
0.050
0.023
L
0.015
M
S
8 (max.)
10/12
STS17NF3LL
Revision history
5
Revision history
Table 6.
Date
Revision history
Revision
Changes
21-Jun-2004
04-Oct-2006
4
5
Complete document
New template, no content change
11/12
STS17NF3LL
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