5962-9153001VXA [TI]
HEX TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, CDIP24, 0.400 INCH, CERDIP-24;
| 型号： | 5962-9153001VXA |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HEX TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, CDIP24, 0.400 INCH, CERDIP-24 CD 输出元件 |
| 文件： | 总9页 (文件大小：161K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
August 1998
100324
Low Power Hex TTL-to-ECL Translator
General Description
Features
n Pin/function compatible with 100124
n Meets 100124 AC specifications
n 50% power reduction of the 100124
n Differential outputs
The 100324 is a hex translator, designed to convert TTL
logic levels to 100K ECL logic levels. The inputs are compat-
ible with standard or Schottky TTL. A common Enable (E),
when LOW, holds all inverting outputs HIGH and holds all
true outputs LOW. The differential outputs allow each circuit
to be used as an inverting/non-inverting translator, or as a
differential line driver. The output levels are voltage compen-
sated over the full −4.2V to −5.7V range.
n 2000V ESD protection
n −4.2V to −5.7V operating range
n Standard Microcircuit Drawing
(SMD) 5962-9153001
When the circuit is used in the differential mode, the 100324,
due to its high common mode rejection, overcomes voltage
gradients between the TTL and ECL ground systems. The
VEE and VTTL power may be applied in either order.
The 100324 is pin and function compatible with the 100124
with similar AC performance, but features power dissipation
roughly half of the 100124 to ease system cooling require-
ments.
Logic Diagram
Pin Names
Description
D0–D5
E
Data Inputs
Enable Input
Data Outputs
Complementary
Data Outputs
Q0–Q5
Q0–Q5
DS100313-4
© 1998 National Semiconductor Corporation
DS100313
www.national.com
Connection Diagrams
24-Pin DIP
24-Pin Quad Cerpak
DS100313-2
DS100313-1
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2
Absolute Maximum Ratings (Note 1)
ESD (Note 2)
≥2000V
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Recommended Operating
Conditions
Case Temperature (TC)
Military
Above which the useful life may be impaired.
Storage Temperature (TSTG
)
−65˚C to +150˚C
−55˚C to +125˚C
−5.7V to −4.2V
Maximum Junction Temperature (TJ)
Ceramic
Supply Voltage (VEE
)
+175˚C
−7.0V to +0.5V
−0.5V to +6.0V
−0.5V to +6.0V
−50 mA
Note 1: Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
VEE Pin Potential to Ground Pin
VTTL Pin Potential to Ground Pin
Input Voltage (DC)
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Output Current (DC Output HIGH)
Military Version
DC Electrical Characteristics
=
=
=
=
=
VEE −4.2V to −5.7V, VCC VCCA GND, TC −55˚C to +125˚C, VTTL +4.5V to +5.5V
Symbol
Parameter
Output HIGH Voltage
Min
Max
−870
Units
mV
mV
mV
mV
mV
mV
mV
mV
V
T
Conditions
Notes
C
=
V
−1025
−1085
−1830
−1830
−1035
−1085
0˚C to +125˚C
−55˚C
V
V
(Max)
or V (Min)
Loading with
50Ω to −2.0V
(Notes 3, 4, 5)
OH
IN
IH
IL
−870
V
V
V
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
−1620
−1555
0˚C to +125˚C
−55˚C
OL
=
0˚C to +125˚C
−55˚C
V
V
IH
IL
(Max)
or V (Min)
Loading with
50Ω to −2.0V
(Notes 3, 4, 5)
OHC
OLC
IN
−1610
−1555
5.0
0˚C to +125˚C
−55˚C
V
V
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Breakdown Test
Input LOW Current
Data
2.0
0.0
−55˚C to +125˚C
−55˚C to +125˚C
−55˚C to +125˚C
−55˚C to +125˚C
Over V
Over V
, V , T Range
TTL EE
(Notes 3, 4, 5, 6)
(Notes 3, 4, 5, 6)
(Notes 3, 4, 5)
IH
IL
C
0.8
V
, V , T Range
TTL EE
C
=
=
I
20
µA
V
V
+2.7V
+7.0V
IH
IN
IN
100
µA
I
IL
=
−0.9
−5.4
mA
−55˚C to +125˚C
V
+0.4V
(Notes 3, 4, 5)
IN
Enable
=
IN
V
Input Clamp Diode Voltage
−1.2
−22
38
V
−55˚C to +125˚C
−55˚C to +125˚C
−55˚C to +125˚C
I
−18 mA
(Notes 3, 4, 5)
(Notes 3, 4, 5)
(Notes 3, 4, 5)
FCD
=
=
I
V
V
Power Supply Current
Power Supply Current
−70
mA
mA
All Inputs V
All Inputs V
+4.0V
GND
EE
EE
IN
IN
I
TTL
TTL
Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case
condition at cold temperatures.
Note 4: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.
Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.
Note 6: Guaranteed by applying specified input condition and testing V /V
.
OH OL
AC Electrical Characteristics
=
=
=
=
VEE −4.2V to −5.7V, VCC VCCA GND, VTTL +4.5V to +5.5V
=
=
=
C
Symbol
Parameter
T
−55˚C
Max
T
+25˚C
Max
T
+125˚C
Max
Units
ns
Conditions
Notes
C
C
Min
Min
Min
t
Propagation Delay
0.50
3.00
0.50
2.90
0.30
3.30
(Notes 7, 8, 9)
(Note 10)
PLH
PHL
TLH
THL
t
t
t
Data and Enable to Output
Transition Time
Figures 1, 2
0.35
1.80
0.45
1.80
0.45
1.80
ns
20% to 80%, 80% to 20%
Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
Note 8: Screen tested 100% on each device at +25˚C temperature only, Subgroup A9.
Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11.
Note 10: Not tested at +25˚C, +125˚C, and −55˚C temperature (design characterization data).
3
www.national.com
Switching Waveform
DS100313-6
FIGURE 1. Propagation Delay and Transition Times
Test Circuit
DS100313-5
Note:
=
=
=
=
+5.0V, V +3.0V
IH
V
, V
CC CCA
0V, V
EE
−4.5V, V
TTL
=
L1, L2 and L3 equal length 50Ω impedance lines
=
R
50Ω terminator internal to scope
T
Decoupling 0.1 µF from GND to V , V and V
CC EE TTL
All unused outputs are loaded with 50Ω to −2V or with equivalent ECL terminator network
=
C
L
Fixture and stray capacitance ≤ 3 pF
FIGURE 2. AC Test Circuit
www.national.com
4
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Ceramic Dual-In-Line Package (0.400" Wide) (D)
NS Package Number J24E
24 Lead Quad Cerpak (F)
NS Package Number W24B
5
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CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose fail-
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Products > Military/Aerospace > Logic > ECL > 100324
Product Folder
100324
Low Power Hex TTL-to-ECL Translator
Contents
l
l
l
l
General Description
Features
Datasheet
Package Availability, Models, Samples
& Pricing
General Description
The 100324 is a hex translator, designed to convert TTL logic levels to 100K ECL logic
levels. The inputs are compatible with standard or Schottky TTL. A common Enable (E),
when LOW, holds all inverting outputs HIGH and holds all true outputs LOW. The
differential outputs allow each circuit to be used as an inverting/non-inverting translator, or
as a differential line driver. The output levels are voltage compensated over the full -4.2V to
-5.7V range.
When the circuit is used in the differential mode, the 100324, due to its high common mode
rejection, overcomes voltage gradients between the TTL and ECL ground systems. The V
EE
and V
power may be applied in either order.
TTL
The 100324 is pin and function compatible with the 100124 with similar AC performance,
but features power dissipation roughly half of the 100124 to ease system cooling
requirements.
Features
l
l
l
l
l
l
l
Pin/function compatible with 100124
Meets 100124 AC specifications
50% power reduction of the 100124
Differential outputs
2000V ESD protection
-4.2V to -5.7V operating range
Standard Microcircuit Drawing (SMD) 5962-9153001
Datasheet
Size
(in Kbytes)
Title
Date
Receive via Email
Download
View Online
100324 Low Power Hex TTL-to-ECL Translator 117 Kbytes 4-Sep-98 View Online Download Receive via Email
100324 Mil-Aero Datasheet MN100324-X
79 Kbytes
View Online Download Receive via Email
Please use Adobe Acrobat to view PDF file(s).
If you have trouble printing, see Printing Problems.
Package Availability, Models, Samples & Pricing
Samples
&
Electronic
Orders
Package
Models
Budgetary Pricing
Quantity $US each
Std
Pack
Size
Package
Marking
Part Number
Status
Type # pins
SPICE IBIS
tube [logo]¢Z¢S¢4¢A$E
.
Order Parts
5962-9153001MXA Cerdip 24 Full production N/A N/A
5962-9153001MYA Cerquad 24 Full production N/A N/A
50+
50+
$37.6000 of 100324DMQB /Q
15 5962-9153001MXA
[logo]¢Z¢S¢4¢A
tube
$40.7000 of
14
Q$E 100324
FMQB 5962
-9153001
MYA
.
Order Parts
tube [logo]¢Z¢S¢4¢A$E
5962-9153001VXA Cerdip 24 Full production N/A N/A
5962-9153001VYA Cerquad 24 Full production N/A N/A
.
.
50+
50+
$265.0000 of
100324J-QMLV
15 5962-9153001VXA
[logo]¢Z¢S¢4¢A
tube
$265.0000 of
100324W-
QMLV 5962
-9153001
Order Parts
14
VYA $E
100324 MW8
wafer
Full production N/A N/A
.
N/A
-
[Information as of 1-Sep-2000]
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