BQ24125 [TI]

SINGLE-CHIP SWITCHMODE, LI-ION AND LI-POLYMER CHARGE-MANAGEMENT IC WITH ENHANCED EMI PERFORMANCE(bqSWITCHER⑩); 单片开关模式,锂离子和锂聚合物充电管理具有增强的EMI性能的IC ( bqSWITCHER⑩ )
BQ24125
型号: BQ24125
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

SINGLE-CHIP SWITCHMODE, LI-ION AND LI-POLYMER CHARGE-MANAGEMENT IC WITH ENHANCED EMI PERFORMANCE(bqSWITCHER⑩)
单片开关模式,锂离子和锂聚合物充电管理具有增强的EMI性能的IC ( bqSWITCHER⑩ )

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bq24120  
bq24123  
Actual Size  
3,5 mm x 4,5 mm  
bq24125  
www.ti.com  
SLUS688EMARCH 2006REVISED DECEMBER 2007  
SINGLE-CHIP SWITCHMODE, LI-ION AND LI-POLYMER CHARGE-MANAGEMENT  
IC WITH ENHANCED EMI PERFORMANCE(bqSWITCHER)  
1
FEATURES  
DESCRIPTION  
2
Enhanced EMI Performance  
Integrated Power FETs For Up To 2-A Charge  
Rate  
The bqSWITCHER™ series are highly integrated  
Li-ion  
and  
Li-polymer  
switch-mode  
charge  
management devices targeted at a wide range of  
portable applications. The bqSWITCHER™ series  
offers integrated synchronous PWM controller and  
power FETs, high-accuracy current and voltage  
regulation, charge preconditioning, charge status, and  
charge termination, in a small, thermally enhanced  
QFN package.  
Suitable For 1-, 2-, or 3-Cell Li-Ion and  
Li-Polymer Battery Packs  
Synchronous Fixed-Frequency PWM  
Controller Operating at 1.1 MHz With 0% to  
100% Duty Cycle  
High-Accuracy Voltage and Current Regulation  
The bqSWITCHER charges the battery in three  
phases: conditioning, constant current, and constant  
voltage. Charge is terminated based on user-  
selectable minimum current level. A programmable  
charge timer provides a safety backup for charge  
termination. The bqSWITCHER automatically restarts  
the charge cycle if the battery voltage falls below an  
internal threshold. The bqSWITCHER automatically  
enters sleep mode when VCC supply is removed.  
Status Outputs For LED or Host Processor  
Interface Indicates Charge-In-Progress, Charge  
Completion, Fault, and AC-Adapter Present  
Conditions  
20-V Absolute Maximum Voltage Rating on IN  
and OUT Pins  
Accurate High-Side Battery Current Sensing  
Battery Temperature Monitoring  
Automatic Sleep Mode for Low Power  
Consumption  
RHL PACKAGE  
(TOP VIEW BQ24123)  
Reverse Leakage Protection Prevents Battery  
Drainage  
Thermal Shutdown and Protection  
Built-In Battery Detection  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
STAT2  
PGND  
PGND  
CE  
2
3
4
5
6
7
8
9
STAT1  
IN  
Available in 20 pin 3,5 mm x 4,5 mm QFN  
Package  
IN  
PG  
SNS  
VCC  
TTC  
ISET1  
ISET2  
APPLICATIONS  
BAT  
Handheld Products  
CELLS  
TS  
Portable Media Players  
Industrial and Medical Equipment  
Portable Equipment  
11  
10  
Portable DVD Players  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
bqSWITCHER, PowerPAD are trademarks of Texas Instruments.  
UNLESS OTHERWISE NOTED this document contains  
PRODUCTION DATA information current as of publication date.  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006–2007, Texas Instruments Incorporated  
bq24120  
bq24123  
bq24125  
www.ti.com  
SLUS688EMARCH 2006REVISED DECEMBER 2007  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
ORDERING INFORMATION(1)  
CHARGE REGULATION  
VOLTAGE (V)  
INTENDED  
APPLICATION  
TJ  
PART NUMBER(2)(3)  
MARKINGS  
BQ24120RHLR / BQ24120RHLT  
BQ24123RHLR / BQ24123RHLT  
BQU  
BQV  
CDZ  
4.2 V  
Stand-alone  
–40°C to 125°C  
4.2 V/8.4 V  
2.1 V to 15.5 V  
Externally Programmable BQ24125RHLR / BQ24125RHLT  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
Web site at www.ti.com.  
(2) The RHL package is available in the following options:  
R - taped and reeled in quantities of 3,000 devices per reel  
T - taped and reeled in quantities of 250 devices per reel  
(3) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for  
use in specified lead-free soldering processes.  
PACKAGE DISSIPATION RATINGS  
TA < 40°C  
POWER RATING  
DERATING FACTOR  
ABOVE TA = 40°C  
PACKAGE  
ΘJA  
ΘJC  
RHL(1)  
46.87°C/W  
2.15°C/W  
1.81 W  
0.021 W/°C  
(1) This data is based on using the JEDEC High-K board, and the exposed die pad is connected to a copper pad on the board. This is  
connected to the ground plane by a 2x3 via matrix.  
ABSOLUTE MAXIMUM RATINGS(1)  
over operating free-air temperature range (unless otherwise noted)  
UNIT  
Supply voltage range (with respect to VSS  
)
IN, VCC  
20 V  
–0.3 V to 20 V  
–0.7 V to 20 V  
7 V  
STAT1, STAT2, PG, CE, CELLS, SNS, BAT  
OUT  
Input voltage range (with respect to VSS and PGND)  
TS, TTC  
VTSB  
3.6 V  
ISET1, ISET2  
3.3 V  
Voltage difference between SNS and BAT inputs (VSNS - VBAT  
)
±1 V  
Output sink  
STAT1, STAT2, PG  
OUT  
10 mA  
Output current (average)  
Operating free-air temperature range  
Junction temperature range  
Storage temperature  
2.2 A  
TA  
–40°C to 85°C  
–40°C to 125°C  
–65°C to 150°C  
300°C  
TJ  
Tstg  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
RECOMMENDED OPERATING CONDITIONS  
MIN  
4.35(1)  
–40  
NOM  
MAX UNIT  
Supply voltage, VCC and IN (Tie together)  
Operating junction temperature range, TJ  
16.0(2)  
V
125  
°C  
(1) The IC continues to operate below Vmin, to 3.5 V, but these conditions are not tested, and are not specified.  
(2) The inherent switching noise voltage spikes should not exceed the absolute maximum rating on either the IN or OUT pins. A tight layout  
minimizes switching noise.  
2
Submit Documentation Feedback  
Copyright © 2006–2007, Texas Instruments Incorporated  
Product Folder Link(s): bq24120 bq24123 bq24125  
bq24120  
bq24123  
bq24125  
www.ti.com  
SLUS688EMARCH 2006REVISED DECEMBER 2007  
ELECTRICAL CHARACTERISTICS  
TJ = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
INPUT CURRENTS  
VCC > VCC(min), PWM switching  
VCC > VCC(min), PWM NOT switching  
VCC > VCC(min), CE = HIGH  
10  
mA  
IVCC(VCC)  
VCC supply current  
5
315  
µA  
0°C TJ 65°C, VI(BAT) = 4.2 V,  
VCC < V(SLP) or VCC > V(SLP) but not in charge  
3.5  
5.5  
7.7  
Battery discharge sleep current, (SNS,  
BAT, OUT pins)  
0°C TJ 65°C, VI(BAT) = 8.4 V,  
VCC < V(SLP) or VCC > V(SLP) but not in charge  
I(SLP)  
µA  
0°C TJ 65°C, VI(BAT) = 12.6 V,  
VCC < V(SLP) or VCC > V(SLP) but not in charge  
VOLTAGE REGULATION  
Output voltage, bq24123  
CELLS = Low, in voltage regulation  
CELLS = High, in voltage regulation  
Operating in voltage regulation  
4.2  
8.4  
4.2  
VOREG  
V
Output voltage, bq24120  
Feedback regulation REF for bq24125 only  
(W/FB)  
VIBAT  
IIBAT = 25 nA typical into pin  
2.1  
TA = 25°C  
–0.5%  
–1%  
0.5%  
1%  
Voltage regulation accuracy  
CURRENT REGULATION - FAST CHARGE  
V
LOWV VI(BAT) < VOREG,  
IOCHARGE  
Output current range of converter  
150  
2000  
mA  
V(VCC) - VI(BAT) > V(DO-MAX)  
(1)  
100 mV VIREG200 mV,  
1V  
RSET1  
V
+
  1000,  
IREG  
VIREG  
Voltage regulated across R(SNS) Accuracy  
–10%  
10%  
Programmed Where  
5 kΩ ≤ RSET1 10 k, Select RSET1 to  
program VIREG  
,
VIREG(measured) = IOCHARGE ×RSNS  
(–10% to 10% excludes errors due to RSET1  
and R(SNS) tolerances)  
V
(LOWV) VI(BAT) VO(REG)  
,
V(ISET1)  
K(ISET1)  
Output current set voltage  
Output current set factor  
1
V
V(VCC) VI(BAT) + V (DO-MAX)  
VLOWV VI(BAT) < VO(REG)  
,
1000  
V/A  
V(VCC) VI(BAT) + V(DO-MAX)  
PRECHARGE AND SHORT-CIRCUIT CURRENT REGULATION  
Precharge to fast-charge transition voltage  
threshold, BAT  
VLOWV  
68  
71.4  
30  
75  
%VO(REG)  
ms  
Deglitch time for precharge to fast charge  
transition  
Rising voltage;  
tRISE, tFALL = 100 ns, 2-mV overdrive  
t
20  
15  
40  
IOPRECHG  
V(ISET2)  
K(ISET2)  
Precharge range  
VI(BAT) < VLOWV, t < tPRECHG  
200  
mA  
mV  
V/A  
Precharge set voltage, ISET2  
Precharge current set factor  
VI(BAT) < VLOWV, t < tPRECHG  
100  
1000  
(1)  
10 mV VIREG-PRE 100 mV,  
0.1V  
RSET2  
V
+
  1000,  
IREG*PRE  
VIREG-PRE  
Voltage regulated across RSNS-Accuracy  
–20%  
20%  
Where  
1.0 kΩ ≤ RSET2 10 k, Select RSET2  
to program VIREG-PRE,  
VIREG-PRE (Measured) = IOPRE-CHG × RSNS  
(–20% to 20% excludes errors due to RSET2  
and RSNS tolerances)  
CHARGE TERMINATION (CURRENT TAPER) DETECTION  
ITERM Charge current termination detection range VI(BAT) > VOREG- VRCH  
15  
200  
mA  
(1) Inductor peak current should be less than 2.6 A. Use equations 12, 13, 15, 18, and 19 to make sure the peak inductor current is less  
than 2.6 A.  
Copyright © 2006–2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Link(s): bq24120 bq24123 bq24125  
bq24120  
bq24123  
bq24125  
www.ti.com  
SLUS688EMARCH 2006REVISED DECEMBER 2007  
ELECTRICAL CHARACTERISTICS (continued)  
TJ = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
100  
MAX  
UNIT  
mV  
Charge termination detection set voltage,  
ISET2  
VTERM  
VI(BAT) > VOREG- VRCH  
K(ISET2)  
Termination current set factor  
Charger termination accuracy  
1000  
V/A  
VI(BAT) > VOREG- VRCH  
–20%  
20  
20%  
40  
Both rising and falling,  
2-mV overdrive tRISE, tFALL = 100 ns  
tdg-TERM  
Deglitch time for charge termination  
30  
ms  
TEMPERATURE COMPARATOR AND VTSB BIAS REGULATOR  
VLTF  
VHTF  
VTCO  
Cold temperature threshold, TS  
Hot temperature threshold, TS  
Cutoff temperature threshold, TS  
LTF hysteresis  
72.8  
33.7  
28.7  
0.5  
73.5  
34.4  
29.3  
1.0  
74.2  
35.1  
29.9  
1.5  
Initiate Charge  
During Charge  
%VO(VTSB)  
Both rising and falling,  
2-mV overdrive tRISE, tFALL = 100 ns  
tdg-TS  
Deglitch time for temperature fault, TS  
TS bias output voltage  
20  
30  
40  
ms  
V
VCC > VIN(min)  
,
VO(VTSB)  
VO(VTSB)  
3.15  
I(VTSB) = 10 mA 0.1 µF CO(VTSB) 1 µF  
VCC  
>
,
IN(min)  
TS bias voltage regulation accuracy  
–10%  
10%  
I(VTSB) = 10 mA 0.1 µF CO(VTSB) 1 µF  
BATTERY RECHARGE THRESHOLD  
VRCH  
Recharge threshold voltage  
Deglitch time  
Below VOREG  
75  
20  
100  
30  
125  
40  
mV/cell  
ms  
VI(BAT) < decreasing below threshold,  
tFALL = 100 ns 10-mV overdrive  
tdg-RCH  
STAT1, STAT2, AND PG OUTPUTS  
VOL(STATx) Low-level output saturation voltage, STATx IO = 5 mA  
0.5  
0.1  
V
V
VOL(PG)  
Low-level output saturation voltage, PG  
IO = 10 mA  
CE , CELLS INPUTS  
VIL  
Low-level input voltage  
IIL = 5 µA  
0
0.4  
VIH  
High-level input voltage  
IIH = 20 µA  
1.3  
VCC  
TTC INPUT  
tPRECHG  
tCHARGE  
Precharge timer  
1440  
25  
1800  
2160  
572  
s
Programmable charge timer range  
Charge timer accuracy  
Timer multiplier  
t(CHG) = C(TTC) × K(TTC)  
minutes  
0.01 µF C(TTC) 0.18 µF  
-10%  
10%  
KTTC  
2.6  
min/nF  
µF  
CTTC  
Charge time capacitor range  
TTC enable threshold voltage  
0.01  
0.22  
VTTC_EN  
V(TTC) rising  
200  
mV  
SLEEP COMPARATOR  
V
CC VIBAT  
+5 mV  
V
CC VIBAT  
+75 mV  
2.3 V VI(OUT) VOREG, for 1 or 2 cells  
VSLP-ENT  
Sleep-mode entry threshold  
V
VI(OUT) = 12.6 V, RIN = 1k,  
V
CC VIBAT  
V
CC VIBAT  
+73 mV  
bq24125(2)  
–4 mV  
VSLP-EXIT  
Sleep-mode exit hysteresis,  
Deglitch time for sleep mode  
2.3 V VI(OUT)VOREG  
40  
160  
mV  
VCC decreasing below threshold,  
tFALL = 100 ns, 10-mV overdrive,  
PMOS turns off  
5
µs  
tdg-SLP  
VCC decreasing below threshold,  
tFALL = 100 ns, 10-mV overdrive,  
STATx pins turn off  
20  
30  
40  
ms  
UVLO  
VUVLO-ON  
IC active threshold voltage  
IC active hysteresis  
VCC rising  
VCC falling  
3.15  
120  
3.30  
150  
3.50  
V
mV  
(2) For bq24125 only. RIN is connected between IN and PGND pins and needed to ensure sleep entry.  
4
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Copyright © 2006–2007, Texas Instruments Incorporated  
Product Folder Link(s): bq24120 bq24123 bq24125  
bq24120  
bq24123  
bq24125  
www.ti.com  
SLUS688EMARCH 2006REVISED DECEMBER 2007  
ELECTRICAL CHARACTERISTICS (continued)  
TJ = 0°C to 125°C and recommended supply voltage range (unless otherwise stated)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
PWM  
7 V VCC VCC(max)  
400  
500  
130  
150  
Internal P-channel MOSFET on-resistance  
Internal N-channel MOSFET on-resistance  
4.5 V VCC 7 V  
7 V VCC VCC(max)  
4.5 V VCC 7 V  
mΩ  
fOSC  
Oscillator frequency  
1.1  
MHz  
Frequency accuracy  
–9%  
0%  
9%  
DMAX  
DMIN  
Maximum duty cycle  
100%  
Minimum duty cycle  
tTOD  
Switching delay time (dead time)  
Minimum synchronous FET on time  
Synchronous FET minimum current-off  
20  
60  
ns  
ns  
tsyncmin  
50  
400  
mA  
(3)  
threshold  
BATTERY DETECTION  
Battery detection current during time-out  
fault  
IDETECT  
VI(BAT) < VOREG – VRCH  
2
mA  
IDISCHRG1  
tDISCHRG1  
IWAKE  
Discharge current  
Discharge time  
Wake current  
Wake time  
VSHORT < VI(BAT) < VOREG – VRCH  
VSHORT < VI(BAT) < VOREG – VRCH  
VSHORT < VI(BAT) < VOREG – VRCH  
VSHORT < VI(BAT) < VOREG – VRCH  
Begins after termination detected,  
400  
1
µA  
s
2
mA  
s
tWAKE  
0.5  
IDISCHRG2  
tDISCHRG2  
Termination discharge current  
Termination time  
400  
262  
µA  
VI(BAT) VOREG  
ms  
OUTPUT CAPACITOR  
Required output ceramic capacitor range  
COUT  
from SNS to PGND, between inductor and  
RSNS  
4.7  
10  
47  
µF  
µF  
Required SNS capacitor (ceramic) at SNS  
pin  
CSNS  
PROTECTION  
0.1  
Threshold over VOREG to turn off P-channel  
MOSFET, STAT1, and STAT2 during charge  
or termination states  
VOVP  
OVP threshold voltage  
110  
117  
121  
%VO(REG)  
ILIMIT  
Cycle-by-cycle current limit  
Short-circuit voltage threshold, BAT  
Short-circuit current  
2.6  
1.95  
35  
3.6  
2
4.5  
2.05  
65  
A
VSHORT  
ISHORT  
TSHTDWN  
VI(BAT) falling  
V/cell  
mA  
VI(BAT) VSHORT  
Thermal trip  
165  
10  
°C  
Thermal hysteresis  
(3) N-channel always turns on for ~60 ns and then turns off if current is too low.  
Copyright © 2006–2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Link(s): bq24120 bq24123 bq24125  
bq24120  
bq24123  
bq24125  
www.ti.com  
SLUS688EMARCH 2006REVISED DECEMBER 2007  
TERMINAL FUNCTIONS  
TERMINAL  
I/O  
DESCRIPTION  
NAME  
bq24120  
bq24123  
bq24125  
Battery voltage sense input. Bypass it with a capacitor to VSS if there are long  
inductive leads to battery.  
BAT  
14  
14  
14  
I
I
Charger enable input. This active low input, if set high, suspends charge and  
places the device in the low-power sleep mode. Do not pull up this input to VTSB.  
CE  
16  
16  
13  
16  
Available on parts with selectable output voltage. Ground or float for single-cell  
operation (4.2 V). For two-cell operation (8.4 V) pull up this pin with a resistor to  
CELLS  
I
I
VIN.  
Output voltage analog feedback adjustment. Connect the output of a resistive  
voltage divider powered from the battery terminals to this node to adjust the  
output battery voltage regulation.  
FB  
13  
IN  
3, 4  
8
3, 4  
8
3, 4  
8
I
Charger input voltage. Bypass it with a 10µF capacitor from IN to PGND.  
Charger current set point 1 (fast charge). Use a resistor to ground to set this  
value.  
ISET1  
I/O  
Charge current set point 2 (precharge and termination), set by a resistor  
connected to ground.  
ISET2  
N/C  
9
9
9
I/O  
13  
1
No connection. This pin must be left floating in the application.  
1
1
O
Charge current output inductor connection. Connect a zener TVS diode between  
OUT pin and PGND to clamp the voltage spike to protect the power MOSFETs  
during abnormal conditions.  
OUT  
20  
20  
20  
O
Power-good status output (open drain). The transistor turns on when a valid VCC  
is detected. It is turned off in the sleep mode. PG can be used to drive a LED or  
communicate with a host processor.  
PG  
5
5
5
O
PGND  
SNS  
17,18  
15  
17,18  
15  
17,18  
15  
Power ground input  
Charge current-sense input. Battery current is sensed via the voltage drop  
developed on this pin by an external sense resistor in series with the battery pack.  
A 0.1µF capacitor to VSS is required.  
I
Charge status 1 (open-drain output). When the transistor turns on indicates  
charge in process. When it is off and with the condition of STAT2 indicates  
various charger conditions (See Table 1)  
STAT1  
STAT2  
TS  
2
19  
12  
7
2
19  
12  
7
2
19  
12  
7
O
O
I
Charge status 2 (open-drain output). When the transistor turns on indicates  
charge is done. When it is off and with the condition of STAT1 indicates various  
charger conditions (See Table 1)  
Temperature sense input. This input monitors its voltage against an internal  
threshold to determine if charging is allowed. Use an NTC thermistor and a  
voltage divider powered from VTSB to develop this voltage. (See Figure 13)  
Timer and termination control. Connect a capacitor from this node to VSS to set  
the bqSWITCHER timer. When this input is low, the timer and termination  
detection are disabled.  
TTC  
I
I
VCC  
VSS  
6
6
6
Analog device input. A 0.1µF capacitor to VSS is required.  
10  
10  
10  
Analog ground input  
TS internal bias regulator voltage. Connect capacitor (with a value between a  
0.1µF and 1µF) between this output and VSS.  
VTSB  
11  
11  
11  
O
There is an internal electrical connection between the exposed thermal pad and  
VSS. The exposed thermal pad must be connected to the same potential as the  
VSS pin on the printed circuit board. The power pad can be used as a star ground  
connection between VSS and PGND. A common ground plane may be used. VSS  
pin must be connected to ground at all times.  
Exposed  
Thermal  
Pad  
Pad  
Pad  
Pad  
6
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Copyright © 2006–2007, Texas Instruments Incorporated  
Product Folder Link(s): bq24120 bq24123 bq24125  
bq24120  
bq24123  
bq24125  
www.ti.com  
SLUS688EMARCH 2006REVISED DECEMBER 2007  
TYPICAL APPLICATION CIRCUITS  
ICHARGE = 1.3A, IPRECHARGE = 133mA, Charge Safety Timer = 5.0 hours, Battery Charging Qualification Temperature Range =  
0°C to 45°C  
Battery  
Pack  
LO  
BQ24120  
RSNS  
V
IN  
3
4
6
2
IN  
OUT 1  
Pack+  
C
1.5 KW  
1.5 KW  
1.5 KW  
Done  
10mH  
IN  
0.1W  
COUT  
10mF  
IN  
OUT 20  
10 mF  
Adapter  
Present  
Charge  
Pack-  
103AT  
MMBZ18VALT1  
VCC  
PGND 17  
STAT1 PGND 18  
19 STAT2  
SNS 15  
BAT 14  
5
7
PG  
7.5 KW  
R
ISET1  
VTSB  
TTC  
ISET1  
ISET2  
8
9
7.5 KW  
16 CE  
10 VSS  
13 NC  
RT1  
9.31 KW  
CTTC  
0.1 mF  
R
ISET2  
TS 12  
RT2  
VTSB 11  
0.1 mF  
442 KW  
0.1 mF  
0.1 mF  
Figure 1. Stand-Alone 1-Cell Application  
Battery  
Pack  
LO  
BQ24123  
RSNS  
V
IN  
OUT  
1
3
4
6
2
IN  
Pack+  
1.5 KW  
1.5 KW  
1.5 KW  
Done  
10 mH  
0.1W  
COUT  
10mF  
OUT 20  
IN  
C
Adapter  
Present  
Charge  
IN  
Pack-  
103AT  
10 mF  
MMBZ18VALT1  
VCC  
STAT1  
PGND 17  
PGND 18  
SNS 15  
BAT 14  
19 STAT2  
5
7
PG  
7.5 KW  
R
VTSB  
ISET1  
TTC  
ISET1  
ISET2  
8
9
RT1  
7.5 KW  
9.31 KW  
16 CE  
CTTC  
0.1 mF  
R
ISET2  
10 VSS  
13 CELLS  
TS 12  
0.1 mF  
RT2  
VTSB 11  
442 KW  
0.1 mF  
0.1 mF  
V
IN  
10 KW  
Figure 2. Stand-Alone 2-Cells Application  
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TYPICAL APPLICATION CIRCUITS (continued)  
ICHARGE = 1.3A, IPRECHARGE = 133mA, Charge Safety Timer = 5.0 hours, Battery Charging Qualification Temperature Range =  
0°C to 45°C  
Battery  
Pack  
LOUT  
BQ24125  
RSNS  
VIN  
3
4
6
2
IN  
OUT 1  
Pack+  
1.5 KW  
10 mF  
1.5 KW  
Adapter  
Present  
1.5 KW  
Done  
10 mH  
D1  
0.1W  
CIN  
COUT  
Charge  
IN  
OUT 20  
10 mF  
Pack-  
VCC  
MMBZ18VALT1  
PGND 17  
103AT  
(See Note)  
STAT1 PGND 18  
19 STAT2  
SNS 15  
BAT 14  
5
7
PG  
7.5 KW  
R
ISET1  
VTSB  
TTC  
ISET1  
ISET2  
8
9
7.5 KW  
ISET2  
RT1  
RT2  
9.31 KW  
16 CE  
10 VSS  
13 FB  
C
TTC  
R
0.1 mF  
TS 12  
0.1 mF  
VTSB 11  
442 KW  
0.1 mF  
301 KW  
100 KW  
0.1 mF  
A. Zener diode not needed for bq24125.  
Figure 3. Externally Programmable Application  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
TYPICAL OPERATING PERFORMANCE  
See Figure 1 for a 1-cell application test circuit schematic and Figure 2 for the stand-alone cells application test  
circuits schematic.  
Level [dBµV]  
BQ2412X Typical Radiated EMI Performance on EVM  
60  
VIN = 16 V  
50  
ICHARGE = 1 A  
40  
30  
20  
10  
0
-10  
30M  
50M  
70M  
100M  
Frequency [Hz]  
200M  
300M  
500M  
700M  
1G  
MES bq2412x_16v_1.0A  
Figure 4. Typical Radiated EMI Performance Measured on EVM  
100  
90  
100  
V = 9 V  
V
= 8.4 V  
I
bat  
V
= 4.2 V  
bat  
V = 5 V  
I
90  
80  
70  
V = 16 V  
I
80  
70  
V = 16 V  
I
60  
50  
60  
50  
0
1
2
0
1
2
Charge Current Ibat - A  
Charge Current Ibat - A  
Figure 5. Efficiency 1-Cell  
Figure 6. Efficiency 2-Cells  
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CH3  
CH3  
1.38 A  
200 mA/div  
CH3 = Inductor Current  
CH1 = BAT  
CH1  
CH1  
2 V/div  
3.8 V  
CH2 = OUT  
CH2  
CH2  
9 V  
5 V/div  
t = Time = 400 ns/div  
Figure 7. Switching Waveforms in Fast Charge Mode  
CH3 = Inductor Current  
CH3  
CH3  
500 mA  
500 mA/div  
CH1 = BAT  
CH1  
CH1  
8.4 V  
5 V/div  
CH2 = OUT  
CH2  
16 V  
CH2  
10 V/div  
t - Time = 400 ns/div  
Figure 8. Switching Waveforms in Voltage Regulation Mode  
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CH1 = BAT  
CH1  
CH1  
2 V/div  
4.2 V  
CH3 = Inductor Current  
CH3  
CH3  
200 mA/div  
480 mA  
CH2 = OUT  
CH2  
5 V  
CH2  
2 V/div  
20 ns  
35 ns  
t = Time = 50 ns/div  
Figure 9. Dead Time  
CH1 = BAT  
CH1  
CH1  
2 V/div  
3.8 V  
CH3 = Inductor Current  
CH3  
1.3 A  
CH2 = OUT  
CH2  
5 V  
CH3  
500 mA/div  
CH2  
5 V/div  
t = Time = 1 ms/div  
Figure 10. Soft Start Waveforms  
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FUNCTIONAL BLOCK DIAGRAM  
-
+
12  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
OPERATIONAL FLOW CHART  
POR  
Check for battery  
Presence  
Battery  
No  
Detected?  
Indicate BATTERY  
ABSENT  
Yes  
Suspend charge  
TS pin  
in LTF to HTF  
range?  
No  
Indicate CHARGE  
SUSPEND  
Yes  
Regulate  
I
PRECHG  
Reset and Start  
T30min timer  
V
<V  
Yes  
BAT  
LOWV  
Indicate Charge-  
In-Progress  
No  
Suspend charge  
TS pin  
in LTF to TCO  
range?  
Reset and Start  
FSTCHG timer  
No  
Indicate CHARGE  
SUSPEND  
No  
Regulate  
Yes  
Current or Voltage  
TS pin  
in LTF to HTF  
range?  
Indicate Charge-  
In-Progress  
No  
V
<V  
BAT LOWV  
Suspend charge  
Yes  
TS pin  
in LTF to TCO  
range?  
Yes  
No  
Indicate CHARGE  
SUSPEND  
T30min  
No  
Yes  
No  
Expired?  
TS pin  
in LTF to HTF  
range?  
FSTCHG timer  
Expired?  
Yes  
No  
- Fault Condition  
- Enable I  
DETECT  
No  
Indicate Fault  
Yes  
No  
Yes  
V
<V  
BAT LOWV  
Yes  
V
> V  
-
BAT OREG -  
V
?
RCH  
Yes  
No  
V
> V  
BAT OREG  
-
V
?
RCH  
No  
I
detection?  
TERM  
- Disable I  
DETECT  
Indicate Fault  
Yes  
Yes  
- Fault Condition  
Indicate Fault  
- Turn off charge  
- Enable I  
DISCHG2  
for t  
DISCHG2  
No  
Indicate Charge-  
In-Progress  
Battery  
Replaced?  
V
< V  
BAT OREG -  
V
?
RCH  
Charge Complete  
Indicate DONE  
V
< V  
BAT  
OREG -  
?
No  
Yes  
V
RCH  
Battery Removed  
Yes  
Indicate BATTERY  
ABSENT  
Figure 11. Operational Flow Chart  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
DETAIL DESCRIPTION  
The bqSWITCHER™ supports a precision Li-ion or Li-polymer charging system for single cell or two cell  
applications. See Figure 11 and Figure 12 for a typical charge profile.  
The bq2412X has enhanced EMI performance that helps minimize the number of components needed to meet  
the FCC-B Standard. The rise time of the OUT pin was slowed down to minimize the radiated EMI.  
Precharge  
Phase  
Voltage Regulation and  
Charge Termination Phase  
Current Regulation Phase  
Regulation V oltage  
Regulation Current  
Charge Voltage  
V
LOW  
V
SHORT  
Charge Current  
Precharge  
and Termination  
I
SHORT  
Programmable  
Safety Timer  
Precharge  
Timer  
UDG-04037  
Figure 12. Typical Charging Profile  
PWM Controller  
The bq2412X provides an integrated fixed 1MHz frequency voltage-mode controller with Feed-Forward function  
to regulate charge current or voltage. This type of controller is used to help improve line transient response,  
thereby simplifying the compensation network used for both continuous and discontinuous current conduction  
operation. The voltage and current loops are internally compensated using a Type-III compensation scheme that  
provides enough phase boost for stable operation, allowing the use of small ceramic capacitors with very low  
ESR. There is a 0.5V offset on the bottom of the PWM ramp to allow the device to operate between 0% to 100%  
duty cycle.  
The internal PWM gate drive can directly control the internal PMOS and NMOS power MOSFETs. The high-side  
gate voltage swings from VCC (when off), to VCC-6 (when on and VCC is greater than 6V) to help reduce the  
conduction losses of the converter by enhancing the gate an extra volt beyond the standard 5V. The low-side  
gate voltage swings from 6V, to turn on the NMOS, down to PGND to turn it off. The bq2412X has two back to  
back common-drain P-MOSFETs on the high side. An input P-MOSFET prevents battery discharge when IN is  
lower than BAT. The second P-MOSFET behaves as the switching control FET, eliminating the need of a  
bootstrap capacitor.  
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Cycle-by-cycle current limit is sensed through the internal high-side sense FET. The threshold is set to a nominal  
3.6A peak current. The low-side FET also has a current limit that decides if the PWM Controller will operate in  
synchronous or non-synchronous mode. This threshold is set to 100mA and it turns off the low-side NMOS  
before the current reverses, preventing the battery from discharging. Synchronous operation is used when the  
current of the low-side FET is greater than 100mA to minimize power losses.  
Temperature Qualification  
The bqSWITCHER continuously monitors battery temperature by measuring the voltage between the TS pin and  
VSS pin. A negative temperature coefficient thermistor (NTC) and an external voltage divider typically develop  
this voltage. The bqSWITCHER compares this voltage against its internal thresholds to determine if charging is  
allowed. To initiate a charge cycle, the battery temperature must be within the V(LTF)-to-V(HTF) thresholds. If  
battery temperature is outside of this range, the bqSWITCHER suspends charge and waits until the battery  
temperature is within the V(LTF)-to-V(HTF) range. During the charge cycle (both precharge and fast charge), the  
battery temperature must be within the V(LTF)-to-V(TCO) thresholds. If battery temperature is outside of this range,  
the bqSWITCHER suspends charge and waits until the battery temperature is within the V(LTF)-to-V(HTF) range.  
The bqSWITCHER suspends charge by turning off the PWM and holding the timer value (i.e., timers are not  
reset during a suspend condition). Note that the bias for the external resistor divider is provided from the VTSB  
output. Applying a constant voltage between the V(LTF)-to-V(HTF) thresholds to the TS pin disables the  
temperature-sensing feature.  
1
1
V
  RTH  
  RTH   
HOT  
ƪ
*
ƫ
O(VTSB)  
COLD  
V
V
LTF  
HTF  
RT2 +  
V
V
O(VTSB)  
O(VTSB)  
RTH  
V
 
* 1 * RTH  
 
COLD  
* 1  
ǒ Ǔ ǒ Ǔ  
HOT  
V
V
HTF  
LTF  
O(VTSB)  
* 1  
V
LTF  
RT1 +  
1
1
)
RT2 RTH  
COLD  
(1)  
V
CC  
Charge Suspend  
Charge Suspend  
V
(LTF)  
Temperature Range  
to Initiate Charge  
Temperature Range  
During Charge Cycle  
V
(HTF)  
V
(TCO)  
Charge Suspend  
Charge Suspend  
V
SS  
Figure 13. TS Pin Thresholds  
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Battery Preconditioning (Precharge)  
On power up, if the battery voltage is below the VLOWV threshold, the bqSWITCHER applies a precharge current,  
IPRECHG, to the battery. This feature revives deeply discharged cells. The bqSWITCHER activates a safety timer,  
tPRECHG, during the conditioning phase. If the VLOWV threshold is not reached within the timer period, the  
bqSWITCHER turns off the charger and enunciates FAULT on the STATx pins. In the case of a FAULT  
condition, the bqSWITCHER reduces the current to IDETECT. IDETECT is used to detect a battery replacement  
condition. Fault condition is cleared by POR or battery replacement.  
The magnitude of the precharge current, IO(PRECHG), is determined by the value of programming resistor, R(ISET2)  
,
connected to the ISET2 pin.  
K(ISET2)   V(ISET2)  
IO(PRECHG)  
+ ǒR  
Ǔ
  R(SNS)  
(ISET2)  
(2)  
where  
RSNS is the external current-sense resistor  
V(ISET2) is the output voltage of the ISET2 pin  
K(ISET2) is the V/A gain factor  
V(ISET2) and K(ISET2) are specified in the Electrical Characteristics table.  
Battery Charge Current  
The battery charge current, IO(CHARGE), is established by setting the external sense resistor, R(SNS), and the  
resistor, R(ISET1), connected to the ISET1 pin.  
In order to set the current, first choose R(SNS) based on the regulation threshold VIREG across this resistor. The  
best accuracy is achieved whe the VIREG is between 100mV and 200mV.  
V
IREG  
R
+
(SNS)  
I
OCHARGE  
(3)  
If the results is not a standard sense resistor value, choose the next larger value. Using the selected standard  
value, solve for VIREG. Once the sense resistor is selected, the ISET1 resistor can be calculated using the  
following equation:  
K
R
  V  
ISET1  
ISET1  
CHARGE  
R
+
ISET1  
  I  
SNS  
(4)  
Battery Voltage Regulation  
The voltage regulation feedback occurs through the BAT pin. This input is tied directly to the positive side of the  
battery pack. The bqSWITCHER monitors the battery-pack voltage between the BAT and VSS pins. The  
bqSWITCHER is offered in a fixed single-cell voltage version (4.2 V) and as a one-cell or two-cell version  
selected by the CELLS input. A low or floating input on the CELLS selects single-cell mode (4.2 V) while a  
high-input through a resistor selects two-cell mode (8.4 V).  
Charge Termination and Recharge  
The bqSWITCHER monitors the charging current during the voltage regulation phase. Once the termination  
threshold, ITERM, is detected, the bqSWITCHER terminates charge. The termination current level is selected by  
the value of programming resistor, R(ISET2), connected to the ISET2 pin.  
K
+ ǒR  
  V  
(ISET2)  
TERM  
I
TERM  
(SNS)Ǔ  
  R  
(ISET2)  
(5)  
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where  
R(SNS) is the external current-sense resistor  
VTERM is the output of the ISET2 pin  
K(ISET2) is the A/V gain factor  
VTERM and K(ISET2) are specified in the Electrical Characteristics table  
As a safety backup, the bqSWITCHER also provides a programmable charge timer. The charge time is  
programmed by the value of a capacitor connected between the TTC pin and GND by the following formula:  
t
CHARGE + C(TTC)   K(TTC)  
(6)  
where  
C(TTC) is the capacitor connected to the TTC pin  
K(TTC) is the multiplier  
A new charge cycle is initiated when one of the following conditions is detected:  
The battery voltage falls below the VRCH threshold.  
Power-on reset (POR), if battery voltage is below the VRCH threshold  
CE toggle  
TTC pin, described as follows.  
In order to disable the charge termination and safety timer, the user can pull the TTC input below the VTTC_EN  
threshold. Going above this threshold enables the termination and safety timer features and also resets the timer.  
Tying TTC high disables the safety timer only.  
Sleep Mode  
The bqSWITCHER enters the low-power sleep mode if the VCC pin is removed from the circuit. This feature  
prevents draining the battery during the absence of VCC.  
Charge Status Outputs  
The open-drain STAT1 and STAT2 outputs indicate various charger operations as shown in Table 1. These  
status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates that the  
open-drain transistor is turned off.  
Table 1. Status Pins Summary  
Charge State  
STAT1  
ON  
STAT2  
OFF  
ON  
Charge-in-progress  
Charge complete  
OFF  
OFF  
Charge suspend, timer fault, overvoltage, sleep mode, battery absent  
OFF  
PG Output  
The open-drain PG (power good) indicates when the AC-to-DC adapter (i.e., VCC) is present. The output turns on  
when sleep-mode exit threshold, VSLP-EXIT, is detected. This output is turned off in the sleep mode. The PG pin  
can be used to drive an LED or communicate to the host processor.  
CE Input (Charge Enable)  
The CE digital input is used to disable or enable the charge process. A low-level signal on this pin enables the  
charge and a high-level VCC signal disables the charge. A high-to-low transition on this pin also resets all timers  
and fault conditions. Note that the CE pin should not be tied to VTSB. This may create power-up issues.  
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Timer Fault Recovery  
As shown in Figure 11, bqSWITCHER provides a recovery method to deal with timer fault conditions. The  
following summarizes this method.  
Condition 1 VI(BAT) above recharge threshold (VOREG - VRCH) and timeout fault occurs.  
Recovery method: bqSWITCHER waits for the battery voltage to fall below the recharge threshold. This could  
happen as a result of a load on the battery, self-discharge or battery removal. Once the battery falls below the  
recharge threshold, the bqSWITCHER clears the fault and enters the battery absent detection routine. A POR or  
CE toggle also clears the fault.  
Condition 2 Charge voltage below recharge threshold (VOREG – VRCH) and timeout fault occurs  
Recovery method: Under this scenario, the bqSWITCHER applies the IDETECT current. This small current is used  
to detect a battery removal condition and remains on as long as the battery voltage stays below the recharge  
threshold. If the battery voltage goes above the recharge threshold, then the bqSWITCHER disables the IDETECT  
current and executes the recovery method described in Condition 1. Once the battery falls below the recharge  
threshold, the bqSWITCHER clears the fault and enters the battery absent detection routine. A POR or CE toggle  
also clears the fault.  
Output Overvoltage Protection (Applies To All Versions)  
The bqSWITCHER provides a built-in overvoltage protection to protect the device and other components against  
damages if the battery voltage gets too high, as when the battery is suddenly removed. When an overvoltage  
condition is detected, this feature turns off the PWM and STATx pins. The fault is cleared once VIBAT drops to the  
recharge threshold (VOREG - VRCH).  
Inductor, Capacitor, and Sense Resistor Selection Guidelines  
The bqSWITCHER provides internal loop compensation. With this scheme, best stability occurs when LC  
resonant frequency, fo is approximately 16 kHz (8 kHz to 32 kHz). Equation 7 can be used to calculate the value  
of the output inductor and capacitor. Table 2 provides a summary of typical component values for various charge  
rates.  
1
f0 +  
Ǹ
2p   LOUT   COUT  
(7)  
Table 2. Output Components Summary  
CHARGE CURRENT  
0.5 A  
22 µH  
4.7 µF  
0.2  
1 A  
2 A  
4.7 µH  
Output inductor, LOUT  
10 µH  
10 µF  
0.1 Ω  
Output capacitor, COUT  
Sense resistor, R(SNS)  
22 µF (or 2 × 10 µH) ceramic  
0.05 Ω  
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Battery Detection  
For applications with removable battery packs, bqSWITCHER provides a battery absent detection scheme to  
reliably detect insertion and/or removal of battery packs.  
POR or V  
RCH  
Detection routine runs on power up  
and if V drops below refresh  
BAT  
threshold due to removing battery  
or discharging battery.  
Yes  
Enable  
(DETECT)  
I
for t  
(DETECT)  
BATTERY  
PRESENT,  
No  
V
I(BAT)  
<V  
(SHORT)  
Begin Charge  
Yes  
Apply I  
(WAKE)  
(WAKE)  
for t  
BATTERY  
PRESENT,  
Begin Charge  
V
>
I(BAT)  
No  
V
O(REG)  
−V  
RCH  
Yes  
BATTERY  
ABSENT  
Figure 14. Battery Detection for bq2412x ICs  
The voltage at the BAT pin is held above the battery recharge threshold, VOREG – VRCH, by the charged battery  
following fast charging. When the voltage at the BAT pin falls to the recharge threshold, either by a load on the  
battery or due to battery removal, the bqSWITCHER begins a battery absent detection test. This test involves  
enabling a detection current, IDISCHARGE1, for a period of tDISCHARGE1 and checking to see if the battery voltage is  
below the short circuit threshold, VSHORT. Following this, the wake current, IWAKE is applied for a period of tWAKE  
and the battery voltage is checked again to ensure that it is above the recharge threshold. The purpose of this  
current is to attempt to close an open battery pack protector, if one is connected to the bqSWITCHER.  
Passing both of the discharge and charge tests indicates a battery absent fault at the STAT pins. Failure of either  
test starts a new charge cycle. For the absent battery condition, typically the voltage on the BAT pin rises and  
falls between 0V and VOVPthresholds indefinitely.  
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VBAT  
Battery  
Connected  
V
OREG  
No  
Battery  
Detected  
No  
Battery  
Detected  
Yes  
Battery  
Detected  
2V/cell  
I
WAKE  
IBAT  
- I  
DISCHRG1  
t
t
t
WAKE  
DISCHRG1  
DISCHRG1  
Figure 15. Battery Detect Timing Diagram  
Battery Detection Example  
In order to detect a no battery condition during the discharge and wake tests, the maximum output capacitance  
should not exceed the following:  
a. Discharge (IDISCHRG1 = 400 µA, tDISCHRG1 = 1s, VSHORT = 2V)  
I
  t  
DISCHRG1  
DISCHRG1  
SHORT  
C
+
+
MAX_DIS  
V
* V  
OREG  
400 mA   1s  
4.2 V * 2 V  
C
C
MAX_DIS  
MAX_DIS  
+ 182 mF  
(8)  
b. Wake (IWAKE = 2 mA, tWAKE = 0.5 s, VOREG – VRCH = 4.1V)  
I
  t  
WAKE  
WAKE  
C
+ ǒV  
RCHǓ * 0 V  
MAX_WAKE  
* V  
OREG  
2 mA   0.5s  
(4.2 V * 0.1 V) * 0V  
C
+
MAX_WAKE  
MAX_WAKE  
C
+ 244 mF  
(9)  
Based on these calculations the recommended maximum output capacitance to ensure proper operation of the  
battery detection scheme is 100 µF which will allow for process and temperature variations.  
Figure 16 shows the battery detection scheme when a battery is inserted. Channel 3 is the output signal and  
Channel 4 is the output current. The output signal switches between VOREG and GND until a battery is inserted.  
Once the battery is detected, the output current increases from 0A to 1.3A, which is the programmed charge  
current for this application.  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
Figure 16. Battery Detection Waveform When a Battery is Inserted  
Figure 17 shows the Battery Detection scheme when a battery is removed. Channel 3 is the output signal and  
Channel 4 is the output current. When the battery is removed, the output signal goes up due to the stored energy  
in the inductor and it crosses the VOREG – VRCH threshold. At this point the output current goes to 0A and the IC  
terminates the charge process and turns on the IDISCHG2 for tDISCHG2. This causes the output voltage to fall down  
below the VOREG – VRCHG threshold triggering a Battery Absent condition and starting the Battery Detection  
scheme.  
Figure 17. Battery Detection Waveform When a Battery is Removed  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
Current Sense Amplifier  
BQ2412X family offers a current sense amplifier feature that translates the charge current into a DC voltage.  
Figure 18 is a block diagram of this feature.  
OUT  
SNS  
R
SNS  
+
K
ISET2  
-
BAT  
-
+
+
FASTCHG  
-
Disable  
ISET2  
R
ISET2  
Figure 18. Current Sense Amplifer  
The voltage on the ISET2 pin can be used to calculate the charge current. Equation 10 shows the relationship  
between the ISET2 voltage and the charge current:  
V
  K  
ISET2  
(ISET2)  
ISET2  
I
+
CHARGE  
R
  R  
SNS  
(10)  
This feature can be used to monitor the charge current during the current regulation phase (Fastcharge only) and  
the voltage regulation phase. The schematics for the application circuit for this waveform is shown in Figure 2  
CH3 = Inductor Current  
CH3  
500 mA/div  
CH1 = ISET2  
CH3  
0 A  
CH1  
200 mV/div  
CH1  
CH2 = OUT  
0 V  
CH2  
16 V  
CH2  
10 V/div  
t = Time = 200 ms/div  
Figure 19. Current Sense Amplifier  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
SYSTEM DESIGN EXAMPLE AND APPLICATIONS INFORMATION  
The following section provides a detailed system design example for the bq24120.  
System Design Specifications:  
VIN = 16V  
VBAT = 4.2V (1-Cell)  
ICHARGE = 1.33 A  
IPRECHARGE = ITERM = 133 mA  
Safety Timer = 5.0 hours  
Inductor Ripple Current = 30% of Fast Charge Current  
Initiate Charge Temperature = 0°C to 45°C  
1. Determine the inductor value (LOUT) for the specified charge current ripple:  
DI + I  
  I  
Ripple  
L
CHARGE  
CHARGE  
  ǒV  
BATǓ  
V
* V  
BAT  
V
INMAX  
L
+
OUT  
  ƒ   DI  
INMAX  
L
4.2   (16 * 4.2)  
L
+
16   (1.1   106)   (1.33   0.3)  
OUT  
L
+ 7.06 mH  
OUT  
(11)  
Set the output inductor to standard 10 µH. Calculate the total ripple current with using the 10 µH inductor:  
  ǒV  
BATǓ  
V
* V  
BAT  
V
INMAX  
DI +  
L
  ƒ   L  
INMAX  
OUT  
4.2   (16 * 4.2)  
16   (1.1   106)   (10   10*6  
DI +  
L
)
DI + 0.282 A  
L
(12)  
Calculate the maximum output current (peak current):  
DI  
L
I
+ I  
)
LPK  
OUT  
2
0.282  
2
I
+ 1.33 )  
LPK  
I
+ 1.471 A  
LPK  
(13)  
Use standard 10 µH inductor with a saturation current higher than 1.471A. (i.e., Sumida CDRH74-100)  
2. Determine the output capacitor value (COUT) using 16 kHz as the resonant frequency:  
1
ƒ +  
o
2p ǸL  
  C  
OUT  
1
OUT  
C
C
+
2
4p2   ƒ   L  
OUT  
o
OUT  
1
+
4p2   (16   103)2   (10   10*6  
)
OUT  
C
+ 9.89 mF  
OUT  
Use standard value 10 µF, 25V, X5R, ±20% ceramic capacitor (i.e., Panasonic 1206 ECJ-3YB1E106M  
(14)  
23  
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3. Determine the sense resistor using the following equation:  
V
RSNS  
R
+
SNS  
I
CHARGE  
(15)  
In order to get better current regulation accuracy (±10%), let VRSNS be between 100 mV and 200 mV. Use  
VRSNS = 100 mV and calculate the value for the sense resistor.  
100 mV  
R
R
+
SNS  
SNS  
1.33 A  
+ 0.075 W  
(16)  
This value is not standard in resistors. If this happens, then choose the next larger value which in this case is  
0.1. Using the same equation (15) the actual VRSNS will be 133mV. Calculate the power dissipation on the  
sense resistor:  
2
P
+ I  
  R  
RSNS  
CHARGE  
SNS  
P
+ 1.332   0.1  
+ 176.9 mW  
RSNS  
P
RSNS  
(17)  
Select standard value 100 m, 0.25W 0805, 1206 or 2010 size, high precision sensing resistor. (i.e., Vishay  
CRCW1210-0R10F)  
4. Determine ISET 1 resistor using the following equation:  
K
  V  
ISET1  
ISET1  
CHARGE  
R
+
+
ISET1  
R
  I  
SNS  
1000   1.0  
0.1   1.33  
R
ISET1  
R
+ 7.5 kW  
ISET1  
(18)  
(19)  
(20)  
Select standard value 7.5 k, 1/16W ±1% resistor (i.e., Vishay CRCWD0603-7501-F)  
5. Determine ISET 2 resistor using the following equation:  
K
  V  
ISET2  
ISET2  
PRECHARGE  
R
+
+
ISET2  
R
  I  
SNS  
1000   0.1  
0.1   0.133  
R
ISET2  
R
+ 7.5 kW  
ISET2  
Select standard value 7.5 k, 1/16W ±1% resistor (i.e., Vishay CRCWD0603-7501-F)  
6. Determine TTC capacitor (CTTC) for the 5.0 hours safety timer using the following equation:  
t
CHARGE  
C
+
TTC  
K
TTC  
300 m  
2.6 mńnF  
C
+
TTC  
C
+ 115.4 nF  
TTC  
Select standard value 100 nF, 16V, X7R, ±10% ceramic capacitor (i.e., Panasonic ECJ-1VB1C104K). Using  
this capacitor the actual safety timer will be 4.3 hours.  
7. Determine TS resistor network for an operating temperature range from 0°C to 45°C.  
24  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
VTSB  
RT1  
RT2  
TS  
RTH  
103AT  
Figure 20. TS Resistor Network  
Assuming a 103AT NTC Thermistor on the battery pack, determine the values for RT1 and RT2 using the  
following equations:  
1
1
V
  RTH  
  RTH   
HOT  
ƪ
*
ƫ
O(VTSB)  
COLD  
V
V
LTF  
HTF  
RT2 +  
V
V
O(VTSB)  
O(VTSB)  
RTH  
V
 
* 1 * RTH  
 
COLD  
* 1  
ǒ Ǔ ǒ Ǔ  
HOT  
V
V
HTF  
LTF  
O(VTSB)  
* 1  
V
LTF  
RT1 +  
1
1
)
RT2 RTH  
COLD  
(21)  
(22)  
RTH  
+ 27.28 kW  
COLD  
RTH  
+ 4.912 kW  
HOT  
RT1 + 9.31 kW  
RT2 + 442 kW  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
APPLICATION INFORMATION  
Charging Battery and Powering System Without Affecting Battery Charge and Termination  
RSYS  
Battery  
Pack  
LO  
BQ24120  
RSNS  
VIN  
3
4
6
2
IN  
OUT 1  
Pack+  
1.5 KW  
10 mF  
1.5 KW  
Adapter  
Present  
1.5 KW  
Done  
10 mH  
0.1W  
CIN  
COUT  
Charge  
IN  
OUT 20  
10 mF  
Pack-  
103AT  
VCC  
PGND 17  
MMBZ18VALT1  
STAT1 PGND 18  
19 STAT2  
SNS 15  
BAT 14  
5
7
PG  
7.5 KW  
7.5 KW  
VTSB  
TTC  
ISET1  
ISET2  
8
9
9.31 KW  
16 CE  
10 VSS  
13 NC  
0.1 mF  
TS 12  
VTSB 11  
442 KW  
0.1 mF  
0.1 mF  
0.1 mF  
Figure 21. Application circuit for charging a battery and powering a system without affecting termination  
The bqSWITCHER was designed as a stand-alone battery charger but can be easily adapted to power a system  
load, while considering a few minor issues.  
Advantages:  
1. The charger controller is based only on what current goes through the current-sense resistor (so precharge,  
constant current, and termination all work well), and is not affected by the system load.  
2. The input voltage has been converted to a usable system voltage with good efficiency from the input.  
3. Extra external FETs are not needed to switch power source to the battery.  
4. The TTC pin can be grounded to disable termination and keep the converter running and the battery fully  
charged, or let the switcher terminate when the battery is full and then run off of the battery via the sense  
resistor.  
Other Issues:  
1. If the system load current is large (1 A), the IR drop across the battery impedance causes the battery  
voltage to drop below the refresh threshold and start a new charge. The charger would then terminate due to  
low charge current. Therefore, the charger would cycle between charging and termination. If the load is  
smaller, the battery would have to discharge down to the refresh threshold resulting in a much slower  
cycling. Note that grounding the TTC pin keeps the converter on continuously.  
2. If TTC is grounded, the battery is kept at 4.2 V (not much different than leaving a fully charged battery set  
unloaded).  
3. Efficiency declines 2-3% hit when discharging through the sense resistor to the system.  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
Using bq24125 to charge the LiFePO4 battery  
The LiFePO4 battery has many unique features such as a very high thermal runaway temperature, high  
discharge current capability, and high charge current. These special features make it attractive in many  
applications such as power tools. The recommended charge voltage is 3.6 V and termination current is 50 mA.  
Figure 22 shows an application circuit for charging one cell LiFePO4 using bq24105. The charge voltage is 3.6 V  
and recharge voltage is 3.516 V. The fast charging current is set to 1.33 A while the termination current is  
50 mA. This circuit can be easily changed to support two or three cell applications. However, only 84 mV  
difference between regulation set point and rechargeable threshold makes it frequently enter into recharge mode  
when small load current is applied. This can be solved by lower down the recharge voltage threshold to 200 mV  
to discharge more energy from the battery before it enters recharge mode again. See the application report,  
Using the bq24105/25 to Charge LiFePO4 Battery (SLUA443), for additional details. The recharge threshold  
should be selected according to real application conditions.  
Battery  
Pack  
LOUT  
BQ24125  
RSNS  
VIN  
3
4
6
2
IN  
OUT 1  
Pack+  
1.5 KW  
10 mF  
1.5 KW  
Adapter  
Present  
1.5 KW  
Done  
10 mH  
D1  
0.1W  
CIN  
COUT  
Charge  
IN  
OUT 20  
10 mF  
Pack-  
VCC  
MMBZ18VALT1  
PGND 17  
103AT  
(See Note)  
STAT1 PGND 18  
19 STAT2  
SNS 15  
BAT 14  
5
7
PG  
7.5 KW  
R
ISET1  
VTSB  
TTC  
ISET1  
ISET2  
8
9
20 KW  
ISET2  
RT1  
RT2  
9.31 KW  
16 CE  
10 VSS  
13 FB  
C
TTC  
R
0.1 mF  
TS 12  
0.1 mF  
VTSB 11  
442 KW  
0.1 mF  
143 KW  
200 KW  
0.1 mF  
A. Zener diode not needed for bq24125.  
Figure 22. 1-Cell LiFePO4 Application  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
THERMAL CONSIDERATIONS  
Thermal Considerations  
The SWITCHER is packaged in a thermally enhanced MLP package. The package includes a thermal pad to  
provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design  
guidelines for this package are provided in the application report entitled: QFN/SON PCB Attachment  
(SLUA271).  
The most common measure of package thermal performance is thermal impedance (θJA) measured (or modeled)  
from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA  
is:  
TJ * TA  
+
q(JA)  
P
(23)  
Where:  
TJ = chip junction temperature  
TA = ambient temperature  
P = device power dissipation  
Factors that can greatly influence the measurement and calculation of θJA include:  
Whether or not the device is board mounted  
Trace size, composition, thickness, and geometry  
Orientation of the device (horizontal or vertical)  
Volume of the ambient air surrounding the device under test and airflow  
Whether or not other surfaces are in close proximity to the device being tested  
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal power  
FET. It can be calculated from the following equation:  
P = [Vin × lin - Vbat × Ibat]  
Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of  
the charge cycle when the battery voltage is at its lowest. (See Figure 12.)  
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SLUS688EMARCH 2006REVISED DECEMBER 2007  
PCB LAYOUT CONSIDERATION  
It is important to pay special attention to the PCB layout. The following provides some guidelines:  
To obtain optimal performance, the power input capacitors, connected from input to PGND, should be placed  
as close as possible to the bqSWITCHER. The output inductor should be placed directly above the IC and the  
output capacitor connected between the inductor and PGND of the IC. The intent is to minimize the current  
path loop area from the OUT pin through the LC filter and back to the PGND pin. The sense resistor should  
be adjacent to the junction of the inductor and output capacitor. Route the sense leads connected across the  
RSNS back to the IC, close to each other (minimize loop area) or on top of each other on adjacent layers. BAT  
and SNS traces should be away from high di/dt traces such as the OUT pin. Use an optional capacitor  
downstream from the sense resistor if long (inductive) battery leads are used.  
Place all small-signal components (CTTC, RSET1/2 and TS) close to their respective IC pin (do not place  
components such that routing interrupts power stage currents). All small control signals should be routed  
away from the high current paths.  
The PCB should have a ground plane (return) connected directly to the return of all components through vias  
(3 vias per capacitor for power-stage capacitors, 3 vias for the IC PGND, 1 via per capacitor for small-signal  
components). A star ground design approach is typically used to keep circuit block currents isolated  
(high-power/low-power small-signal) which reduces noise-coupling and ground-bounce issues. A single  
ground plane for this design gives good results. With this small layout and a single ground plane, there is not  
a ground-bounce issue, and having the components segregated minimizes coupling between signals.  
The high-current charge paths into IN and from the OUT pins must be sized appropriately for the maximum  
charge current in order to avoid voltage drops in these traces. The PGND pins should be connected to the  
ground plane to return current through the internal low-side FET. The thermal vias in the IC PowerPAD™  
provide the return-path connection.  
The bqSWITCHER is packaged in a thermally enhanced MLP package. The package includes a thermal pad  
to provide an effective thermal contact between the IC and the PCB. Full PCB design guidelines for this  
package are provided in the application report entitled: QFN/SON PCB Attachment (SLUA271). Six 10-13 mil  
vias are a minimum number of recommended vias, placed in the IC's power pad, connecting it to a ground  
thermal plane on the opposite side of the PWB. This plane must be at the same potential as VSS and PGND  
of this IC.  
See user guide SLUU200 for an example of good layout.  
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PACKAGE OPTION ADDENDUM  
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12-Dec-2007  
PACKAGING INFORMATION  
Orderable Device  
BQ24120RHLR  
BQ24120RHLRG4  
BQ24120RHLT  
BQ24120RHLTG4  
BQ24123RHLR  
BQ24123RHLRG4  
BQ24123RHLT  
BQ24123RHLTG4  
BQ24125RHLR  
BQ24125RHLT  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
QFN  
RHL  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
QFN  
QFN  
QFN  
QFN  
QFN  
QFN  
QFN  
QFN  
QFN  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
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12-Dec-2007  
TAPE AND REEL BOX INFORMATION  
Device  
Package Pins  
Site  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) (mm) Quadrant  
(mm)  
330  
180  
330  
180  
330  
330  
180  
180  
(mm)  
12  
BQ24120RHLR  
BQ24120RHLT  
BQ24123RHLR  
BQ24123RHLT  
BQ24125RHLR  
BQ24125RHLR  
BQ24125RHLT  
BQ24125RHLT  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
20  
20  
20  
20  
20  
20  
20  
20  
SITE 41  
SITE 41  
SITE 41  
SITE 41  
SITE 48  
SITE 41  
SITE 48  
SITE 41  
3.8  
3.8  
3.8  
3.8  
3.8  
3.8  
3.8  
3.8  
4.8  
4.8  
4.8  
4.8  
4.8  
4.8  
4.8  
4.8  
1.6  
1.6  
1.6  
1.6  
1.3  
1.6  
1.3  
1.6  
8
8
8
8
8
8
8
8
12  
12  
12  
12  
12  
12  
12  
12  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
12  
12  
12  
12  
12  
12  
12  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
12-Dec-2007  
Device  
Package  
Pins  
Site  
Length (mm) Width (mm) Height (mm)  
BQ24120RHLR  
BQ24120RHLT  
BQ24123RHLR  
BQ24123RHLT  
BQ24125RHLR  
BQ24125RHLR  
BQ24125RHLT  
BQ24125RHLT  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
RHL  
20  
20  
20  
20  
20  
20  
20  
20  
SITE 41  
SITE 41  
SITE 41  
SITE 41  
SITE 48  
SITE 41  
SITE 48  
SITE 41  
346.0  
190.0  
346.0  
190.0  
370.0  
346.0  
195.0  
190.0  
346.0  
212.7  
346.0  
212.7  
355.0  
346.0  
200.0  
212.7  
29.0  
31.75  
29.0  
31.75  
55.0  
29.0  
45.0  
31.75  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,  
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.  
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and  
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s  
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this  
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily  
performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
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provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask  
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Products  
Amplifiers  
Data Converters  
DSP  
Applications  
Audio  
amplifier.ti.com  
dataconverter.ti.com  
dsp.ti.com  
www.ti.com/audio  
Automotive  
Broadband  
Digital Control  
Military  
www.ti.com/automotive  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
interface.ti.com  
logic.ti.com  
Logic  
Power Mgmt  
Microcontrollers  
RFID  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
microcontroller.ti.com  
www.ti-rfid.com  
www.ti.com/lpw  
Telephony  
Low Power  
Wireless  
Video & Imaging  
Wireless  
www.ti.com/wireless  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2007, Texas Instruments Incorporated  

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