bq24130RHLT [TI]

600-kHz Synchronous Switch-Mode Host-Controlled Battery/Supercapacitor Charger With 4-A Integrated MOSFETs; 600 - kHz的同步开关模式主机控制的电池/超级电容器充电器， 4 -A集成的MOSFET


型号：	bq24130RHLT
厂家：	TEXAS INSTRUMENTS
描述：	600-kHz Synchronous Switch-Mode Host-Controlled Battery/Supercapacitor Charger With 4-A Integrated MOSFETs 600 - kHz的同步开关模式主机控制的电池/超级电容器充电器， 4 -A集成的MOSFET 电池开关电容器
文件：	总29页 (文件大小：950K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

600-kHz Synchronous Switch-Mode Host-Controlled

Battery/Supercapacitor Charger With 4-A Integrated MOSFETs

Check for Samples: bq24130

FEATURES

•

600kHz Synchronous Switch-mode Charger

with 4 A Integrated N-MOSFETs

•

Small QFN Package

3.5 mm x 4.5 mm QFN-20 pin

–

•

Up to 96% Efficiency

APPLICATIONS

30 V Input Rating with 18V Overvoltage

Protection

•

Tablet PC

–

4.5 V to 17 V Input Operating Range

Battery Charge Voltage

1, 2,or 3-Cell With 4.2V/Cell

Netbook and Ultra-Mobile Computers

Portable Data Capture Terminals

Portable Printers

•

–

•

Constant Current Super Capacitor Charging

High Integration

Medical Diagnostics Equipment

Battery Bay Chargers

–

Integrated 20-V Switching MOSFETs

Integrated Bootstrap Diode

Internal Loop Compensation

Internal Digital Soft Start

Back-Up Systems

Li-Ion/Li-Polymer Battery and Super Capacitor

Applications

•

Safety

PVCC

AVCC

STAT

PGND

BTST

REGN

ISET2

SRP

–

Thermal Regulation Loop Throttles Back

Current to Limit T_J= 120°C

bq24130

–

Thermal Shutdown

Battery Thermistor Sense Hot/Cold Charge

Suspend

CMOD

VREF

AGND

–

Input Overvoltage Protection

Cycle by Cycle Current Limit

SRN

BAT

•

Accuracy

–

±0.5% Charge Voltage Regulation

±4% Charge Current Regulation

ISET1

CELL

Less than 15 µA Battery Current with Adapter

Removed

DESCRIPTION

The bq24130 is an integrated host-controlled Li-ion and Li-polymer switch-mode battery charge controllers with

two integrated N-channel power MOSFETs. It offers a constant-frequency synchronous PWM controller with high

accuracy regulation of charge current and voltage. The fast charge and precharge current can be either

hardwired with resistors or programmed by system power management microcontroller using a DAC or GPIOs.

Battery remote sensing provides accurate charge voltage regulation.

The bq24130 monitors the battery pack temperature to allow charger only in a preset temperature window. The

thermal regulation loop reduces the charge current to maintain the junction temperature of 120ºC during

operation.

The bq24130 automatically enters a low-quiescent current sleep mode when the input voltage falls below the

battery voltage. The bq24130 charges one, two or three cell (selected by CELL pin), supporting up to 4 A charge

current. The bq24130 is available in a 20-pin, 3.5 x 4.5 mm²thin QFN package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

PIN FUNCTIONS

NAME

TYPE

FUNCTION DESCRIPTION

Switching node, charge current output inductor connection. Connect the 0.47-µF bootstrap capacitor from

SW to BTST.

1, 20

Charger input voltage. Connect at least 10-µF ceramic capacitor from PVCC to PGND and place it as

close as possible to IC.

2, 3

PVCC

AVCC

IC power positive supply. Place a 1-µF ceramic capacitor from AVCC to AGND and place it as close as

possible to IC. Place a 10 ohm resistor from input side to AVCC pin to filter the noise. For 5 V input, a 5-Ω

resistor is recommended.

Open-drain charge status pin with 10-kΩ pull up to power rail. The STAT pin can be used to drive LED or

communicate with the host processor. It indicates various charger operations: LOW when charge in

process, HIGH when charge complete or SLEEP mode. Blinking when fault occurs, such as charge

suspend, and input overvoltage.

STAT

Temperature qualification voltage input. Connect a negative temperature coefficient thermistor. Program

the hot and cold temperature window with a resistor divider from VREF to TS to AGND. The temperature

qualification window can be set to 5-40ºC or wider. The 103AT thermister is recommended.

Charge mode selection: low (pull down to AGND) for pre-charge current as set by ISET2 pin and high (pull

up to VREF) for fast charge current as set by ISET1 pin. If the battery voltage reaches the voltage

regulation set point, IC changes to voltage regulation mode regardless of CMOD pin input.

CMOD

3.3 V reference voltage output. Place a 1-µF ceramic capacitor from VREF to AGND pin close to the IC.

This voltage could be used for programming charge current regulation on ISET1 and ISET2 pins,

programming the threshold of TS pin, and the pull-up rail of STAT pin and CELL pin.

VREF

AGND

Analog ground. Ground connection for low-current sensitive analog and digital signals. On PCB layout,

connect to the analog ground plane, and only connect to PGND through the PowerPad underneath the IC.

Fast charge current set point. Use a voltage divider from VREF to AGND to set this value.

ISET1

(

)

(CHG)

ISET1

20 ´ R_(SR)

The charger is disabled when ISET1 pin voltage is below 50mV and is enabled when ISET1 pin voltage is

above 100mV.

CELL

BAT

Cell selection pin. Set CELL pin LO for 1-cell, Float for 2-cell, and HI for 3-cell with a fixed 4.2 V per cell.

Battery voltage remote sense. Directly connect a kelvin sense trace from the battery pack positive terminal

to the BAT pin to accurately sense the battery pack voltage. Place a 0.1-µF capacitor from BAT to AGND

close to the IC to filter high frequency noise.

Charge current sense resistor, negative input. A 0.1-µF ceramic capacitor is placed from SRN to SRP to

provide differential-mode filtering. A 0.1-µF ceramic capacitor is placed from SRN pin to AGND for

common-mode filtering.

SRN

SRP

Charge current sense resistor, positive input. A 0.1-µF ceramic capacitor is placed from SRN to SRP to

provide differential-mode filtering. A 0.1-µF ceramic capacitor is placed from SRP pin to AGND for

common-mode filtering.

P/I

Pre-charge current set point. Use a voltage divider from VREF to AGND to set this value.

ISET2

(

)

ISET2

(PRECHG)

100 ´ R_(SR)

PWM low side driver positive 6V supply output. Connect a 1-µF ceramic capacitor from REGN to PGND

pin, close to the IC. Use for low side driver and high-side driver bootstrap voltage by integrated diode from

REGN to BTST.

REGN

BTST

PGND

PWM high side driver positive supply. Connect the 47 nF bootstrap capacitor from SW to BTST.

Power ground. Ground connection for high-current power converter node. On PCB layout, connect directly

to source of low-side power MOSFET, to ground connection of in put and output capacitors of the charger.

Only connect to AGND through the PowerPAD underneath the IC.

18, 19

Exposed pad beneath the IC. Always solder PowerPAD to the board, and have vias on the PowerPAD

plane star-connecting to AGND and ground plane for high-current power converter. It also serves as a

thermal pad to dissipate the heat.

PowerPAD™

Pad

ORDERING INFORMATION⁽¹⁾

PART NUMBER

MARKING

PACKAGE

ORDERING NUMBER

QUANTITY

3000

bq24130RHLR

bq24130

20-pin 3.5 x 4.5mm²QFN

bq24130RHLT

250

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

ABSOLUTE MAXIMUM RATINGS^{(1) (2)}

over operating free-air temperature range (unless otherwise noted)

VALUE

UNIT

MIN

–0.3

–2

MAX

PVCC

AVCC, STAT

SRP, SRN, BAT

Voltage

(with respect to AGND and

PGND)

REGN, TS, CELL, CMOD

BTST

–0.3

–0.5

–40

–55

VREF, ISET1, ISET2

3.6

0.5

155

Maximum difference voltage SRP–SRN

Junction temperature, T_J

°C

Storage temperature, T_stg

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage

values are with respect to the network ground terminal unless otherwise noted.

(2) All voltages are with respect to GND if not specified. Currents are positive into, negative out of the specified terminal, if not specified.

Consult Packaging Section of the data sheet for thermal limitations and considerations of packages.

THERMAL INFORMATION

bq24130

THERMAL METRIC⁽¹⁾⁽²⁾

UNITS

RHL (20 PIN)

θ_JA

Junction-to-ambient thermal resistance

N/A

0.4

9.1

2.1

θ_JCtop

θ_JB

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

ψ_JB

θ_JCbot

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.

RECOMMENDED OPERATING CONDITIONS

MIN

MAX

UNIT

Input voltage

VIN

4.5

Output voltage

BAT

13.5

Output current

I_OUT

0.6

–200

–40

Maximum difference voltage

Operating junction temperature range

SRP-SRN

T_J

200

125

°C

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

ELECTRICAL CHARACTERISTICS

4.5 V ≤ V_{(PVCC, AVCC)}≤ 17 V, -40°C < T_J< 125°C (unless otherwise noted)

PARAMETER

OPERATING CONDITIONS

V_(AVCC)AVCC Input Voltage Operating Range

QUIESCENT CURRENTS

TEST CONDITIONS

MIN

TYP

MAX

UNIT

4.5

V_(AVCC)< V_(UVLO), 0°C - 85°C

V_(AVCC)> V_(UVLO)

V_(SRN)> V_(AVCC)(SLEEP)

Battery Discharge Current

I_(BAT)

(sum of currents into AVCC, BTST, SW,

SRP, SRN, BAT)

µA

V_(AVCC)> V_(UVLO), V_(AVCC)> V_(SRN)

ISET1 < 40 mV (Charge disabled)

1.5

V_(AVCC)> V_(UVLO), V_(AVCC)> V_(SRN)

ISET1 > 120 mV (Charge enabled), Charge done

V_(AVCC)> V_(UVLO), V_(AVCC)> V_(BAT)

ISET1 < 40 mV (Charge disabled)

Adapter Supply Current (sum of currents

into AVCC)

V_(AVCC)> V_(UVLO), V_(AVCC)> V_(BAT)

ISET1 > 120 mV (Charge enabled), no switching

I_(AC)

V_(AVCC)> V_(UVLO), V_(AVCC)> V_(BAT)

ISET1 > 120 mV (Charge enabled), switching

CHARGE VOLTAGE REGULATION

bq24130, CELL to AGND

bq24130, CELL floating

bq24130, CELL to VREF

T_J= 0 to 85°C

4.2

8.4

V_{(BAT_REG)}

BAT Regulation Voltage

12.6

–0.5%

–0.7%

614

0.5%

0.7%

820

Charge Voltage Regulation Accuracy

BAT pin resistance⁽¹⁾

T_J= -40 to 125°C

R_(BAT)

717

kΩ

CURRENT REGULATION (FAST CHARGE)

V_(ISET1)

K_(ISET1)

ISET1 Voltage Range

0.12

0.8

Charge Current Set Factor (Amps of Charge

Current per Volt on ISET1 pin)

R_SENSE= 10 mΩ

A/V

V_{(IREG_CHG)}= 40 mV

V_{(IREG_CHG)}= 20 mV

V_(IREG)= 5 mV

ISET1 rising

–4%

-7%

Charge Current Regulation Accuracy (With

Schottky Diode on SW)

–25%

25%

120

ISET1 Rising Threshold to Enable Charge

ISET1 Falling to Disable Charge

Leakage Current into ISET1 pin

100

V_{(ISET1_CE)}

l_Lkg

ISET1 falling

V_(ISET1)= 2 V

100

CURRENT REGULATION – PRECHARGE

V_(ISET2)

ISET2 Voltage Range

I_{(IREG_PRECHG)}

Precharge current range

R_SENSE= 10 mΩ

0.125

Precharge Current Set Factor (Amps of

precharge Current per Volt on ISET2 pin)

K_(ISET2)

A/V

V_{(IREG_CHG)}= 10 mV, V_(SRP)= 4 V

V_{(IREG_CHG)}= 10 mV, V_(SRP)= 2.6 V

V_{(IREG_CHG)}= 4 mV

–10%

–15%

–25%

-40%

10%

15%

25%

40%

Precharge Current Regulation Accuracy

V_{(IREG_CHG)}= 2 mV

l_Lkg

Leakage Current into ISET2 pin

V_(ISET2)= 2V

100

INPUT UNDERVOLTAGE LOCK-OUT COMPARATOR (UVLO)

AC Undervoltage Rising Threshold

UVLO

Measure on AVCC

3.4

3.6

3.8

AC Undervoltage Hysteresis, falling

340

SLEEP COMPARATOR (REVERSE DISCHARGING PROTECTION)

SLEEP Falling Threshold

SLEEP Hysteresis

V_(AVCC)– V_(SRN)to enter SLEEP

200

100

150

V_(SLEEP)

SLEEP Rising Shutdown Deglitch

SLEEP Falling Power-up Deglitch

AVCC falling below SRN

AVCC rising above SRN

(1) Specified by Design

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

ELECTRICAL CHARACTERISTICS (continued)

4.5 V ≤ V_{(PVCC, AVCC)}≤ 17 V, -40°C < T_J< 125°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

BAT OVERVOLTAGE COMPARATOR

V_{(OV_RISE)}

V_{(OV_FALL)}

Overvoltage Rising Threshold

As percentage of VBAT

104%

102%

Overvoltage Falling Threshold

Overvoltage Deglitch Time to Disable

Charge

t_OV

INPUT OVERVOLTAGE COMPARATOR (ACOV)

AC Overvoltage Rising Threshold

Measure on AVCC

Measured on AVCC

540

AC Overvoltage Falling Hysteresis

V_(ACOV)

AC Overvoltage Rising Deglitch

AC Overvoltage Falling Deglitch

THERMAL REGULATION

T_J

THERMAL SHUTDOWN COMPARATOR

T_(SHUT)Thermal Shutdown Rising Temperature

Junction Temperature Regulation Accuracy ISET1 > 120 mV, Charging

120

°C

Temperature Increasing

150

°C

µs

Thermal Shutdown Hysteresis

Thermal Shutdown Rising Deglitch

Thermal Shutdown Falling Deglitch

Temperature Increasing Delay

Temperature Decreasing Delay

100

THERMISTOR COMPARATOR

Cold Temperature Threshold, TS pin

Voltage Rising Threshold

V_(LTF)

Charger suspends charge as Percentage to VREF

As Percentage to VREF

73% 73.5%

0.2% 0.4%

74%

Cold Temperature Hysteresis, TS pin

Voltage Falling

V_{(LTF_HYS)}

V_(HTF)

0.6%

Hot Temperature TS pin voltage falling

Threshold

As Percentage to VREF

46.6% 47.2% 47.8%

Cut-off Temperature TS pin voltage falling

Threshold

V_(TCO)

As Percentage to VREF

44.2% 44.7% 45.2%

Deglitch time for Temperature Out of Range

Detection

V_(TS)> V_(LTF), or V_(TS)< V_(TCO), or V_(TS)< V_(HTF)

400

Deglitch time for Temperature in Valid

Range Detection

V_(TS)< V_(LTF)– V_{(LTF_HYS)}or V_(TS)> V_(TCO), or V_(TS)

V_(HTF)

CHARGE OVERCURRENT COMPARATOR (CYCLE-BY-CYCLE)

Charge Overvurrent Rising Threshold,

V_(SRP)> 2.2V

V_(OC)

Current as percentage of V_{(IREG_CHG)}

160%

Charge Overvurrent Rising Threshold,

V_(SRP)< 2.2V

Charge Overvurrent Limit Range,

V_(SRP)> 2.2V

I_(OCP)

Charge OCP using high side sense FET

11.5

CHARGE UNDERCURRENT COMPARATOR (CYCLE-BY-CYCLE)

Switch from Sync mode to Non-Sync mode, measure

on V_(SRP-SRN)

V_(UCP)

Charge Undercurrent Falling Threshold

BAT SHORT COMPARATOR (BATSHORT)

Battery Short Falling Threshold

Measure on BAT

200

V_(BATSHT)

Battery Short Rising Hysteresis

Deglitch on Both Edge

µs

LOW CHARGE CURRENT COMPARATOR

Low Charge Current Falling Threshold

Measure on V_(SRP-SRN)

1.25

µs

V_(LC)

Low Charge Current Rising Hysteresis

Deglitch on Both Edge

VREF REGULATOR

V_{(VREF_REG)}VREF Regulator Voltage

I_{(VREF_LIM)}VREF Current Limit

V_(AVCC)> UVLO

3.267

3.3

3.333

120

V_(VREF)= 0V, V_(AVCC)> UVLO

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

ELECTRICAL CHARACTERISTICS (continued)

4.5 V ≤ V_{(PVCC, AVCC)}≤ 17 V, -40°C < T_J< 125°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

REGN REGULATOR

V_{(REGN_REG)}

REGN Regulator Voltage

REGN Current Limit

V_(AVCC)> 10 V, 0mA - 40 mA, ISET1 > 100 mV

V_(REGN)= 0 V, V_(AVCC)> UVLO

5.7

6.3

I_{(REGN_LIM)}

120

INTERNAL PWM

PWM Switching Frequency

Driver Dead Time

500

600

700

kHz

Dead time when switching between LSD and HSD,

no load

R_{(DS_HI)}

R_{(DS_LO)}

High Side MOSFET On Resistance

Low Side MOSFET On Resistance

V_(BTST)– V_(SW)= 5.5 V

mΩ

110

V_(BTST)– V_(SW)when low side refresh pulse is

requested, V_(VCC)= 4.5 V

Bootstrap Refresh Comparator Threshold

Voltage

V_(BTST)

V_(BTST)– V_(SW)when low side refresh pulse is

requested, V_(VCC)> 6 V

INTERNAL SOFT START (8 steps to regulation current I_(CHG)

)

Soft Start Steps

step

Soft Start Step Time

1.6

CHARGER SECTION POWER-UP SEQUENCING

Delay from ISET1 above 120 mV to start charging the

battery

(2)

Charge-Enable Delay after Power-up

INTEGRATED BTST DIODE

V_F

V_R

Forward Bias Voltage

I_F= 120 mA at 25°C

I_R= 2 µA at 25°C

0.85

Reverse breakdown voltage

LOGIC IO PIN CHARACTERISTICS

V_{(OUT_LO)}

V_{(CELL_LO)}

V_{(CELL_MID)}

V_{(CELL_HI)}

STAT Output Low Saturation Voltage

Sink Current = 5 mA

0.5

1.8

CELL pin input low threshold, 1 cell

CELL pin input mid threshold, 2 cells

CELL pin input high threshold, 3 cells

CELL pin voltage falling edge

CELL pin voltage rising for MIN, falling for MAX

CELL pin voltage rising edge

0.8

2.5

Resistance between CELL to ground to

keep CELL LOW [1]

R_{(CELL_GND)}

120

0.8

kΩ

V_IL

V_IH

CMOD Low-level input voltage threshold

CMOD High-level input voltage threshold

I_IL= 5 µA

I_IL= 20 µA

2.1

(2) Specified by Design

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

BLOCK DIAGRAM

bq24130

ACOV

V_ACOV

V_UVLO

UVLO

AVCC

V_SRN+V_{SLEEP_FALL}

SLEEP

EN_VREF

VREF

LDO

V_{BAT_SHT}

BAT_SHT

VREF

AGND

REGN

LDO

BAT_OVP

REGN

BTST

EN_CHRG

V_{OV_RISE}

BAT

FBO

EAI

CELL

PVCC

2.1V

EAO

LEVEL

SHIFTER

PWM

IC T_J

REGN

T_{J_REG}

20μA

PWM

CONTROL

LOGIC

SYNC

V_(SRP-SRN)

V_UCP

EN_CHRG

PGND

120mV

OCP

V_(SRP-SRN)

V_OC

REFRESH

V_SW+V_{BTST_REFRESH}

V_BTST

STAT

ISET1

ISET2

ISET1

I_{BAT_REG}

/STAT

ISET2

Selection

V_LC

V_(SRP-SRN)

CHARGE

20μA

CMOD

SRP

VREF

CMOD

LTF

V_(SRP-SRN)

20X

IC T_J

T_SHUT

TSHUT

STATE

SRN

MACHINE

LOGIC

EN_CHRG

SUSPEND

HTF

TCO

ACOV

UVLO

SLEEP

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

TYPICAL APPLICATION

ADAPTER

SYSTEM

10µ

PVCC

AVCC

1µ

AGND

VREF

L: 4.7?H

R9:10m

VBAT

(optional)

C2: 1µ

154k

47n

0.1?

ISET2

ISET1

BTST

10k

100k

ISET1<40mV

Charge Diable

C9, C10

2 x 10?

0.1?

REGN

PGND

22.2k

VREF

CMOD

CELL

CMOD

High: Fast charge ISET1

Low: Pre-charge ISET2

SRP

SRN

STAT

5.23k

1.5k

BAT

R_T

103AT

bq24130

30.1k

12 V input, 1 Cell, 3 A Charge Current, 0.2 A Pre-charge Current, 0’C - 45ºC TS

Figure 1. Typical Battery Charging Application Schematic

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

TYPICAL APPLICATION (continued)

ADAPTER

10µ

PVCC

AVCC

1µ

AGND

VREF

L: 4.7?H

R9:10m

VCAP

C2: 1µ

65k

0.1?

47n

ISET2

ISET1

232k

BTST

100k

ISET1<40mV

Charge Diable

C9, C10

2 x 10?

0.1?

32.4k

REGN

PGND

CMOD

CELL

SRP

SRN

VREF

STAT

R12

60k

2.98k

1.5k

BAT

R_T

103AT

R11

300k

bq24130

11.84k

12 V input, 5.4 V Output, 2 A Charge Current, 0°C - 60°C TS

Figure 2. Typical Super Capacitor Charging Application Schematic

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

TYPICAL CHARACTERISTICS

AVCC

10 V/div

REGN

5 V/div

PH 10 V/div

BAT

5 V/div

STAT

ICHG

10 V/div

2 A/div

t - Time - 10 ms/div

Figure 3. Power Up (BAT, STAT)

Figure 4. Power Up (PH, ICHG)

ISET1

500 mV/div

10 V/div

STAT

10 V/div

ICHG

I(IND)

2 A/div

t - Time - 10 ms/div

t - Time - 4 ms/div

Figure 5. Current Soft Start

Figure 6. ISET1 Enable and Disable Charge

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

TYPICAL CHARACTERISTICS (continued)

ISET1

500 mV/div

ISET1

500 mV/div

STAT

10 V/div

STAT

10 V/div

PH 10 V/div

ICHG

2 A/div

I(IND)

2 A/div

t - Time - 4 ms/div

t - Time - 2 ms/div

Figure 7. Charge Enable

Figure 8. Charge Disable

CMOD

5 V/div

10 V/div

ICHG

2 A/div

ICHG

1 A/div

t - Time - 10 ms/div

t - Time - 400 ns/div

Figure 9. CMOD Select Charge Current

(ISET1 2A, ISET2 0.4A)

Figure 10. Switching (CCM)

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

TYPICAL CHARACTERISTICS (continued)

BAT

5 V/div

10 V/div

PH 10 V/div

I(IND)

500 mA/div

I(IND)

2 A/div

t - Time - 400 ns/div

Figure 11. Switching (DCM)

Figure 12. Short Battery

VBAT

5 V/div

VCAP 5 V/div

AVCC

5 V/div

PH 10 V/div

IOUT

I(IND)

2 A/div

1 A/div

t - Time - 200 ms/div

Figure 14. SuperCap Charge Cycle

t - Time - 4 ms/div

Figure 13. Short Battery (zoom-in)

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

TYPICAL CHARACTERISTICS (continued)

100

V = 12 V

VBAT 7.5 V

V = 5 V

VBAT 3.6 V

V = 12 V

VBAT 3.6 V

0.5

1.5

2.5

3.5

Charge Current - A

Figure 15. Efficiency

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

DETAILED DESCRIPTION

Battery Voltage Regulation

Internally, the BAT pin has 717 kΩ to AGND. For output voltage above 4.2 V, but not 8.4 V or 12 V, the user can

use an external resistor divider from output to VBAT pin to AGND.

The bq24130 offers a high accuracy voltage regulation on charge voltage. The bq24130 uses CELL pin to select

number of cells with a fixed 4.2 V/cell. CELL pin adjusts internal resistor voltage divider from BAT pin to AGND

pin for voltage feedback and regulate to internal 2.1 V voltage reference.

Table 1.

CELL Pin

AGND

Voltage Regulation

4.2V

8.4V

Floating

VREF

12.6V

Internally, the BAT pin has 717 kΩ to AGND. For output voltage above 4.2 V, but not 8.4 V or 12 V, the user can

use an external resistor divider from output to the VBAT pin to AGND.

Battery Current Regulation

The bq24130 has two current setting inputs, ISET1 and ISET2.

A low-level signal on the CMOD pin forces the IC to charge at the pre-charge rate set on the ISET2 pin. A high-

level signal forces charge at fast-charge rate as set by the ISET1 pin. The CMOD pin cannot float.

The ISET1 input sets the maximum charging current. Battery current is sensed by current sensing resistor RSR

connected between SRP and SRN. The full-scale differential voltage between SRP and SRN is 40 mV max. The

equation for charge current is:

(ISET1)

I_(CHARGE)

20´R_(SR)

(1)

The valid input voltage range of ISET1 is up to 0.8 V. With 10 mΩ sense resistor, the maximum output current is

4 A. With 20 mΩ sense resistor, the maximum output current is 2 A.

The ISET2 input sets the pre-charge current up to 2 A on a 10 mΩ sense resistor.

(ISET2)

I_(PRECHARGE)

100´R_(SR)

(2)

The charger is disabled when ISET1 pin voltage is below 40 mV and is enabled when ISET1 pin voltage is above

120 mV. For 10 mΩ current sensing resistor, the minimum fast charge current must higher than 600 mA.

Under high ambient temperature, the charge current will fold back to keep IC temperature not exceeding 120°C

Power Up

The charger uses a SLEEP comparator to determine the source of power on the AVCC pin, since AVCC can be

supplied either from the battery or the adapter. If the AVCC voltage is greater than the SRN voltage, charger

exits SLEEP mode. If all conditions are met for charging, charger will then attempt to charge the battery (See the

Enable and Disable Charging section). If the SRN voltage is greater than AVCC, charger enters a low quiescent

current 15 µA) SLEEP mode to minimize current drain from the battery. During the SLEEP mode, the VREF

output turns off and the STAT pin goes to high impedance.

If AVCC is below the UVLO threshold, the device is disabled.

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

Enable and Disable Charging

The following conditions have to be valid before charge is enabled:

•

ISET1 pin above 120 mV

The device is not in Under Voltage Lockout (UVLO) mode (i.e. V_(AVCC)> UVLO)

The device is not in SLEEP mode (i.e. V_(AVCC)> V_(SRN)

The AVCC voltage is lower than the AC over-voltage threshold (i.e. V_(AVCC)< V_(ACOV)

50 ms delay is complete after initial power-up

The REGN and VREF LDO voltages are at the correct levels

Thermal Shut down (T_SHUT) is not valid

No T_Sfault is detected

)

One of the following conditions will stop on-going charging:

•

ISET1 pin voltage is below 40mV;

The device is in UVLO mode;

Adapter is removed, causing the device to enter SLEEP mode;

AVCC voltage is over voltage

The REGN or VREF LDO voltage is overloaded;

T_SHUTtemperature threshold is reached.

T_Svoltage goes out of range indicating the battery temperature is too hot or too cold

Automatic Internal Soft-Start Charger Current

The charger automatically soft-starts the charger regulation current every time the charger goes into fast-charge

to ensure there is no overshoot or stress on the output capacitors or the power converter. The soft-start consists

of stepping-up the charge regulation current into 8 evenly divided steps up to the programmed charge current.

Each step lasts around 1.6 ms, for a typical rise time of 12.8 ms. No external components are needed for this

function.

Converter Operation

The bq24130 employs a 600kHz constant-frequency step-down switching regulator. The fixed frequency

oscillator keeps tight control of the switching frequency under all conditions of input voltage, battery voltage,

charge current and temperature, simplifying output filter design and keeping it out of the audible noise region.

A type III compensation network allows using ceramic capacitors at the output of the converter. An internal saw-

tooth ramp is compared to the internal error control signals to vary the duty-cycle of the converter. The ramp

height is proportional to the AVCC voltage to cancel out any loop gain variation due to a change in input voltage,

and simplifies loop compensation. Internal gate drive logic allows achieving 97% duty cycle before pulse skipping

starts.

Charge Undercurrent Protection

When the voltage between BTST and SW falls below 4 V, the low-side FET turns on to provide refresh charge

up the bootstrap capacitor. After the recharge, if the SRP-SRN voltage decreases below 5 mV, the low side FET

will be turned off for the remainder of the switching cycle (i.e. non-synchronous operation). This is important to

prevent negative inductor current from causing any boost effect in which the input voltage increases as power is

transferred from the battery to the input capacitors. This can lead to an overvoltage on the AVCC node and

potentially cause damage to the system.

When the IC senses SRP-SRN average voltage drops below 1.25 mV (0.125 A of inductor current for a 10 mΩ

sense resistor) or the battery voltage is less than 2 V, the charger will enter non-synchronous mode and the low-

side n-channel power MOSFET will stay off and rely on the body diode to make converter as a standard buck.

This prevents the battery discharge current when battery is almost fully charged and current tapers down to a

lower level. The low-side n-channel power MOSFET will turn on when a bootstrap capacitor refresh pulse is

needed.

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

Charge Overcurrent Protection

The charger monitors top side MOSFET current by high side sense FET. When peak current is higher than over-

current threshold, it will turn off the top side MOSFET and keep it off until the next cycle. The charger has a

secondary cycle-to-cycle over-current protection. It monitors the charge current, and prevents the current from

exceeding 160% of the programmed charge current. The high-side gate drive turns off when the overcurrent is

detected, and automatically resumes when the current falls below the over-current threshold.

Battery Overvoltage Protection

The converter will not allow the high-side FET to turn-on until the battery voltage goes below 102% of the

regulation voltage. This allows one-cycle response to an over-voltage condition – such as occurs when the load

is removed or the battery is disconnected. An 8 mA current sink from SRP/SRN to AGND is on only during

charge and allows discharging the stored output inductor energy that is transferred to the output capacitors. If

battery overvoltage condition lasts for more than 30 ms, charge is disabled.

Battery Short Protection

When SRN pin voltage is lower than 2 V it is considered as battery short condition during charging period. The

charger will shut down immediately, then soft start back to the charging current 1.25 A max. This prevents high

current may build in output inductor and cause inductor saturation when battery terminal is shorted during

charging. The converter works in non-synchronous mode during battery short.

Input Overvoltage Protection (ACOV)

ACOV provides protection to prevent system damage due to high input voltage. In bq24130, once the voltage on

AVCC reaches the 18 V ACOV threshold, charge is disabled.

Input Under Voltage Lock Out (UVLO)

The system must have a minimum 3.85 V AVCC voltage to allow proper operation. This AVCC voltage could

come from either input adapter or battery, since a conduction path exists from the battery to AVCC through the

high side NMOS body diode. When AVCC is below the 3.85 V UVLO threshold, all circuits on the IC are

disabled.

Thermal Regulation and Shutdown Protection

The QFN package has low thermal impedance, which provides good thermal conduction from the silicon to the

ambient, to keep junctions temperatures low. The internal thermal regulation loop will adjust the charge current to

maintain the junction temperature around 120°C.

As added level of protection, the charger converter turns off and self-protects whenever the junction temperature

exceeds the T_SHUTthreshold of 150°C. The charger stays off until the junction temperature falls below 130°C.

Temperature Qualification

The controller continuously monitors battery temperature by measuring the voltage between the TS pin and

AGND. A negative temperature coefficient thermistor (NTC) and an external voltage divider typically develop this

voltage. The controller compares this voltage against its internal thresholds to determine if charging is allowed.

To initiate a charge cycle, the battery temperature must be within the V_(LTF)to V_(HTF)thresholds. If battery

temperature is outside of this range, the controller suspends charge and waits until the battery temperature is

within the V_(LTF)to V_(HTF)range. During the charge cycle the battery temperature must be within the V_(LTF)to

V_(TCO)thresholds. If battery temperature is outside of this range, the controller suspends charge and waits until

the battery temperature is within the V_(LTF)to V_(HTF)range. The controller suspends charge by turning off the

PWM charge MOSFETs. Figure 16 summarizes the operation.

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

TEMPERATURE RANGE

TO INITIATE CHARGE

DURING A CHARGE CYCLE

VREF

CHARGE SUSPENDED

(LTF)

(LTFH)

CHARGE at full C

(HTF)

(TCO)

CHARGE SUSPENDED

AGND

Figure 16. TS pin, Thermistor Sense Thresholds

Assuming a 103AT NTC thermistor on the battery pack as shown in Figure 1, the value RT1 and RT2 can be

determined by using Equation 4 and Equation 4:

V_(VREF)´RTH_(COLD)´RTH_(HOT)

çV

_(TCO)ø

(LTF)

RT2 =

(VREF)

-1

RTH_(HOT)

-1 -RTH

(COLD)

ç V

(TCO)

(LTF)

(3)

(4)

SPACER

(VREF)

-1

(LTF)

RT1=

RT2 RTH_(COLD)

Select 0°C to 45°C range for Li-ion or Li-polymer battery.

•

RTH_(COLD)= 27.28 KΩ

RTH_(HOT)= 4.911 KΩ

RT1 = 5.253 kΩ, Select Resistor 5.23k

RT2 = 31.318 kΩ, Select Resistor 30.9k

After select closest standard resistor value, by calculating the thermistor resistance at temperature threshold, the

final temperature range can be determined from thermistor data sheet temperature-resistance.

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

VREF

RT1

RT2

bq24130

RTH

103AT

Figure 17. TS Resistor Network

Inductor, Capacitor, and Sense Resistor Selection Guidelines

The IC provides internal loop compensation. With this scheme, best stability occurs when the LC resonant

frequency, f_o, is approximately 12 kHz – 17 kHz for IC per Equation 5:

f =

2p LC

(5)

Charge Status Outputs

The open-drain STAT outputs indicate various charger operations as shown in . These status pins can be used

to drive LED or communicate with the host processor. Note that OFF indicates that the open-drain transistor is

turned off.

Table 2. STAT Pin Defination

Charge State

STAT

Charge in progress

Sleep mode, Charge Disabled

OFF

Chagre suspended. Input overvoltage, Battery overvoltage

BLINK

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

APPLICATION INFORMATION

Inductor Selection

The bq24130 has 600 kHz switching frequency to allow the use of small inductor and capacitor values. The

Inductor saturation current should be higher than the charging current (I_(CHG)) plus half the ripple current

(I_(RIPPLE)):

I_(SAT)≥ I_(CHG)+ (1/2) I_(RIPPLE)

(6)

The inductor ripple current depends on input voltage (V_IN), duty cycle (D = V_OUT/V_IN), switching frequency (fs)

and inductance (L):

V ´D´(1-D)

f s´L

I_(RIPPLE)

(7)

Input Capacitor

Input capacitor should have enough ripple current rating to absorb input switching ripple current. The worst case

RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at

50% duty cycle, then the worst case capacitor RMS current I_(CIN)occurs where the duty cycle is closest to 50%

and can be estimated by Equation 8:

I_(CIN)= I_(CHG)´ D´(1-D)

(8)

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be

placed to the drain of the high side MOSFET and source of the low side MOSFET as close as possible. Voltage

rating of the capacitor must be higher than normal input voltage level. 25 V rating or higher capacitor is preferred

for 15 V input voltage. 20 μF capacitance is suggested for typical of 3 A - 4 A charging current.

Output Capacitor

Output capacitor also should have enough ripple current rating to absorb output switching ripple current. The

output capacitor RMS current I_(COUT)is given:

I_(RIPPLE)

I_(COUT)

» 0.29´I_(RIPPLE)

2´ 3

(9)

The output capacitor voltage ripple can be calculated as follows:

V_OUT

8LCf s²

V_OUT

DV_O=

(10)

At certain input/output voltage and switching frequency, the voltage ripple can be reduced by increasing the

output filter LC.

The bq24130 has internal loop compensator. To get good loop stability, the resonant frequency of the output

inductor and output capacitor should be designed between 12 kHz and 17 kHz. The preferred ceramic capacitor

is 25 V or higher rating, X7R or X5R

Input Filter Design

During adapter hot plug-in, the parasitic inductance and input capacitor from the adapter cable form a second

order system. The voltage spike at AVCC/PVCC pin may be beyond IC maximum voltage rating and damage IC.

The input filter must be carefully designed and tested to prevent overvoltage event on AVCC/PVCC pin.

There are several methods to damping or limit the overvoltage spike during adapter hot plug-in. An electrolytic

capacitor with high ESR as an input capacitor can damp the overvoltage spike well below the IC maximum pin

voltage rating. A high current capability TVS Zener diode can also limit the over voltage level to an IC safe level.

However, these two solutions may not have low cost or small size.

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

A cost effective and small size solution is shown in Figure 18. The R1 and C1 are composed of a damping RC

network to damp the hot plug-in oscillation. As a result the overvoltage spike is limited to a safe level. D1 is used

for reverse voltage protection for AVCC pin. C2 is AVCC pin decoupling capacitor and it should be place to

AVCC pin as close as possible. The R2 and C2 form a damping RC network to further protect the IC from high

dv/dt and high voltage spike. C2 value should be less than C1 value so R1 can dominant the equivalent ESR

value to get enough damping effect for hot plug-in. R1 and R2 package must be sized enough to handle inrush

current power loss according to resistor manufacturer’s data sheet. The filter components value always need to

be verified with real application and minor adjustments may need to fit in the real application circuit.

If the input is 5 V (USB host or USB adapter), the D1 can be saved. R2 has to be 5 Ω or higher to limit the

current if the input is reversely inserted.

R2 (1206)

4.7 - 30W

R1 (2010)

Adapter

Connector

VCC pin

2.2mF

0.1 - 1mF

Figure 18. Input Filter

PCB LAYOUT

The switching node rise and fall times should be minimized for minimum switching loss. Proper layout of the

components to minimize high frequency current path loop (see Figure 19) is important to prevent electrical and

magnetic field radiation and high frequency resonant problems. Here is a PCB layout priority list for proper

layout. Layout PCB according to this specific order is essential

1. Place input capacitor as close as possible to PVCC supply and ground connections and use shortest copper

trace connection. These parts should be placed on the same layer of PCB instead of on different layers and

using vias to make this connection.

2. Place inductor input terminal to SW pin as close as possible. Minimize the copper area of this trace to lower

electrical and magnetic field radiation but make the trace wide enough to carry the charging current. Do not

use multiple layers in parallel for this connection. Minimize parasitic capacitance from this area to any other

trace or plane.

3. The charging current sensing resistor should be placed right next to the inductor output. Route the sense

leads connected across the sensing resistor back to the IC in same layer, close to each other (minimize loop

area) and do not route the sense leads through a high-current path (see Figure 20 for Kelvin connection for

best current accuracy). Place decoupling capacitor on these traces next to the IC.

4. Place output capacitor next to the sensing resistor output and ground.

5. Output capacitor ground connections need to be tied to the same copper that connects to the input capacitor

ground before connecting to system ground.

6. Route analog ground separately from power ground and use single ground connection to tie charger power

ground to charger analog ground. Just beneath the IC use analog ground copper pour but avoid power pins

to reduce inductive and capacitive noise coupling. Use thermal pad as the single ground connection point to

connect analog ground and power ground together. Or using a 0 Ω resistor to tie analog ground to power

ground (thermal pad should tie to analog ground). A star-connection under thermal pad is highly

recommended.

7. It is critical that the exposed thermal pad on the backside of the IC package be soldered to the PCB ground.

Ensure that there are sufficient thermal vias directly under the IC, connecting to the ground plane on the

other layers.

8. Decoupling capacitors should be placed next to the IC pins and make trace connection as short as possible.

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

www.ti.com

SLUSAN2C –JULY 2011–REVISED JUNE 2012

9. All via size and number should be enough for a given current path.

Figure 19. High Frequency Current Path

Current Direction

R_(SNS)

Current Sensing Direction

To SRP/SRN pins

Figure 20. Sensing Resistor PCB Layout

Submit Documentation Feedback

Product Folder Link(s): bq24130

bq24130

SLUSAN2C –JULY 2011–REVISED JUNE 2012

www.ti.com

REVISION HISTORY

Changes from Original (July 2011) to Revision A

Page

•

Added the Li-Ion/Li-Polymer battery Application ................................................................................................................... 1

Changed pin BTST Description From: Connect the 0.1 µF bootstrap capacitor. To: Connect the 47 nF bootstrap

capacitor ............................................................................................................................................................................... 2

•

Changed the Min and Max values for Voltage in the ABS Max Ratings Table .................................................................... 3

Changed the RECOMMENDED OPERATING CONDITIONS table .................................................................................... 3

Changed the ELECT CHARACTERISTICS conditions statement From: 4.5 V ≤ V_{(PVCC, AVCC)}≤ 18 V To: 4.5 V ≤

V_{(PVCC, AVCC)}≤ 17 V ............................................................................................................................................................... 4

•

Changed the Electrical Characteristics table ........................................................................................................................ 4

Added Figure 2 ..................................................................................................................................................................... 9

Added the TYPICAL CHARACTERISTICS section ............................................................................................................ 10

Changed the Battery Voltage Regulation section ............................................................................................................... 14

Changed the Charge Overcurrent Protection section ......................................................................................................... 16

Changes from Revision A (August 2011) to Revision B

Page

•

Added Features Bullet: Constant Current Super Capacitor Charging .................................................................................. 1

Changed the Thermal Information Table .............................................................................................................................. 3

Changed Figure 1 ................................................................................................................................................................. 8

Changed Figure 2 ................................................................................................................................................................. 9

Changed Figure 14 ............................................................................................................................................................. 12

Changes from Revision B (August 2011) to Revision C

Page

•

Changed the value of RT1 From: RT1 = 31.23 KΩ To: RT1 = 5.253 kΩ, Select Resistor 5.23k ....................................... 17

Changed the value of RT2 From: RT2 = 5.25 KΩ To: RT2 = 31.318 kΩ, Select Resistor 30.9k ....................................... 17

Submit Documentation Feedback

Product Folder Link(s): bq24130

PACKAGE OPTION ADDENDUM

www.ti.com

26-Jun-2012

PACKAGING INFORMATION

Status ⁽¹⁾

Eco Plan ⁽²⁾

MSL Peak Temp ⁽³⁾

Samples

Orderable Device

Package Type Package

Drawing

Pins

Package Qty

Lead/

Ball Finish

(Requires Login)

BQ24130RHLR

BQ24130RHLT

ACTIVE

QFN

RHL

3000

250

Green (RoHS

& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR

Green (RoHS

& no Sb/Br)

CU NIPDAU Level-2-260C-1 YEAR

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

BQ24130RHLR

BQ24130RHLT

QFN

RHL

3000

250

330.0

180.0

12.4

3.8

4.8

1.6

8.0

12.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Jul-2012

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

BQ24130RHLR

BQ24130RHLT

QFN

RHL

3000

250

367.0

210.0

367.0

185.0

35.0

Pack Materials-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other

changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should

obtain the latest relevant information before placing orders and should verify that such information is current and complete. All

semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time

of order acknowledgment.

TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms

and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary

to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily

performed.

TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and

applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide

adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or

other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information

published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or

endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the

third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration

and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered

documentation. Information of third parties may be subject to additional restrictions.

Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service

voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.

TI is not responsible or liable for any such statements.

Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements

concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support

that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which

anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause

harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use

of any TI components in safety-critical applications.

In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to

help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and

requirements. Nonetheless, such components are subject to these terms.

No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties

have executed a special agreement specifically governing such use.

Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in

military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components

which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and

regulatory requirements in connection with such use.

TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which

have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such

components to meet such requirements.

Products

Audio

Applications

www.ti.com/audio

amplifier.ti.com

dataconverter.ti.com

www.dlp.com

Automotive and Transportation www.ti.com/automotive

Communications and Telecom www.ti.com/communications

Amplifiers

Data Converters

DLP® Products

DSP

Computers and Peripherals

Consumer Electronics

Energy and Lighting

Industrial

www.ti.com/computers

www.ti.com/consumer-apps

www.ti.com/energy

dsp.ti.com

Clocks and Timers

Interface

www.ti.com/clocks

interface.ti.com

logic.ti.com

www.ti.com/industrial

www.ti.com/medical

www.ti.com/security

Medical

Logic

Security

Power Mgmt

Microcontrollers

RFID

power.ti.com

Space, Avionics and Defense www.ti.com/space-avionics-defense

microcontroller.ti.com

www.ti-rfid.com

Video and Imaging

www.ti.com/video

OMAP Mobile Processors www.ti.com/omap

Wireless Connectivity www.ti.com/wirelessconnectivity

TI E2E Community

e2e.ti.com

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

bq24130RHLT [TI]

相关型号：

BQ24133

bq24133RGYR

bq24133RGYT

BQ24140

BQ24140YFFR

BQ24140YFFT

BQ24140_14

BQ24150

BQ24150A

BQ24150AYFFR

BQ24150AYFFT

BQ24150YFFR